Author: Jianjian Guan Date: 2026-03-27T10:09:52+08:00 New Revision: 9dbb4cf4732a78735d83d2fac701a853bd8bf3d5
URL: https://github.com/llvm/llvm-project/commit/9dbb4cf4732a78735d83d2fac701a853bd8bf3d5 DIFF: https://github.com/llvm/llvm-project/commit/9dbb4cf4732a78735d83d2fac701a853bd8bf3d5.diff LOG: [CIR][RISCV] Support zihintpause builitin codegen (#188465) Include one builtin: __builtin_riscv_pause. Added: clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zihintpause.c Modified: clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp Removed: ################################################################################ diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp index 899ba253be7c9..a6057caea135d 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp @@ -27,6 +27,20 @@ CIRGenFunction::emitRISCVBuiltinExpr(unsigned builtinID, const CallExpr *e) { getContext().BuiltinInfo.getName(builtinID)); return mlir::Value{}; } + + StringRef intrinsicName; + mlir::Type returnType; + llvm::SmallVector<mlir::Value> ops; + + // `iceArguments` is a bitmap indicating whether the argument at the i-th bit + // is required to be a constant integer expression. + unsigned iceArguments = 0; + ASTContext::GetBuiltinTypeError error; + getContext().GetBuiltinType(builtinID, error, &iceArguments); + assert(error == ASTContext::GE_None && "Should not codegen an error"); + for (auto [idx, arg] : llvm::enumerate(e->arguments())) + ops.push_back(emitScalarOrConstFoldImmArg(iceArguments, idx, arg)); + switch (builtinID) { default: llvm_unreachable("unexpected builtin ID"); @@ -69,9 +83,20 @@ CIRGenFunction::emitRISCVBuiltinExpr(unsigned builtinID, const CallExpr *e) { case RISCV::BI__builtin_riscv_ctz_64: // Zihintntl case RISCV::BI__builtin_riscv_ntl_load: - case RISCV::BI__builtin_riscv_ntl_store: + case RISCV::BI__builtin_riscv_ntl_store: { + cgm.errorNYI(e->getSourceRange(), + std::string("unimplemented RISC-V builtin call: ") + + getContext().BuiltinInfo.getName(builtinID)); + return mlir::Value{}; + } + // Zihintpause - case RISCV::BI__builtin_riscv_pause: + case RISCV::BI__builtin_riscv_pause: { + intrinsicName = "riscv.pause"; + returnType = builder.getVoidTy(); + break; + } + // XCValu case RISCV::BI__builtin_riscv_cv_alu_addN: case RISCV::BI__builtin_riscv_cv_alu_addRN: @@ -109,4 +134,7 @@ CIRGenFunction::emitRISCVBuiltinExpr(unsigned builtinID, const CallExpr *e) { // TODO: Handle vector builtins in tablegen. } + + mlir::Location loc = getLoc(e->getSourceRange()); + return builder.emitIntrinsicCallOp(loc, intrinsicName, returnType, ops); } diff --git a/clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zihintpause.c b/clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zihintpause.c new file mode 100644 index 0000000000000..b9bbaec468c8b --- /dev/null +++ b/clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zihintpause.c @@ -0,0 +1,22 @@ +// RUN: %clang_cc1 -triple riscv32 -target-feature +zihintpause -fclangir -emit-cir %s -o - | FileCheck %s --check-prefix=CIR +// RUN: %clang_cc1 -triple riscv64 -target-feature +zihintpause -fclangir -emit-cir %s -o - | FileCheck %s --check-prefix=CIR +// RUN: %clang_cc1 -triple riscv32 -target-feature +zihintpause -fclangir -emit-llvm %s -o - | FileCheck %s --check-prefix=LLVM +// RUN: %clang_cc1 -triple riscv64 -target-feature +zihintpause -fclangir -emit-llvm %s -o - | FileCheck %s --check-prefix=LLVM +// RUN: %clang_cc1 -triple riscv32 -target-feature +zihintpause -emit-llvm %s -o - | FileCheck %s --check-prefix=OGCG +// RUN: %clang_cc1 -triple riscv64 -target-feature +zihintpause -emit-llvm %s -o - | FileCheck %s --check-prefix=OGCG + +void test_builtin_pause(void) { + __builtin_riscv_pause(); +} + +// CIR-LABEL: cir.func{{.*}} @test_builtin_pause( +// CIR: {{%.*}} = cir.call_llvm_intrinsic "riscv.pause" : () -> !void +// CIR: cir.return + +// LLVM-LABEL: define dso_local void @test_builtin_pause( +// LLVM: call void @llvm.riscv.pause() +// LLVM: ret void + +// OGCG-LABEL: define dso_local void @test_builtin_pause( +// OGCG: call void @llvm.riscv.pause() +// OGCG: ret void _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
