https://github.com/YeonguChoe updated https://github.com/llvm/llvm-project/pull/188433
>From d23013f94cb4570a49de8c8dbe5111cec618bbd1 Mon Sep 17 00:00:00 2001 From: YeonguChoe <[email protected]> Date: Wed, 25 Mar 2026 04:27:42 -0400 Subject: [PATCH 1/2] [CIR][CodeGen] Implement __builtin_signbit __builtin_signbit function checks if the sign bit of a floating-point number is set to 0 or 1. --- clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp | 10 +- .../CIR/CodeGenBuiltins/builtin-signbit.c | 150 ++++++++++++++++++ 2 files changed, 159 insertions(+), 1 deletion(-) create mode 100644 clang/test/CIR/CodeGenBuiltins/builtin-signbit.c diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp index 1c62543d40bb3..6c098e50d9578 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp @@ -1865,9 +1865,17 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID, return RValue::get(nullptr); } case Builtin::BI__scoped_atomic_thread_fence: + return errorBuiltinNYI(*this, e, builtinID); case Builtin::BI__builtin_signbit: case Builtin::BI__builtin_signbitf: - case Builtin::BI__builtin_signbitl: + case Builtin::BI__builtin_signbitl: { + CIRGenFunction::CIRGenFPOptionsRAII fPOptsRAII(*this, e); + mlir::Location loc = getLoc(e->getBeginLoc()); + mlir::Value value = emitScalarExpr(e->getArg(0)); + mlir::Type resultTy = convertType(e->getType()); + mlir::Value signBit = emitSignBit(loc, *this, value); + return RValue::get(builder.createBoolToInt(signBit, resultTy)); + } case Builtin::BI__warn_memset_zero_len: case Builtin::BI__annotation: case Builtin::BI__builtin_annotation: diff --git a/clang/test/CIR/CodeGenBuiltins/builtin-signbit.c b/clang/test/CIR/CodeGenBuiltins/builtin-signbit.c new file mode 100644 index 0000000000000..3af0ff4df5da5 --- /dev/null +++ b/clang/test/CIR/CodeGenBuiltins/builtin-signbit.c @@ -0,0 +1,150 @@ +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-cir %s -o %t.cir +// RUN: FileCheck %s --check-prefix=CIR --input-file %t.cir +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-llvm %s -o %t-cir.ll +// RUN: FileCheck %s --check-prefix=LLVM --input-file %t-cir.ll +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm %s -o %t.ll +// RUN: FileCheck %s --check-prefix=OGCG --input-file %t.ll + +void test_signbit_positive_zero(){ + double positiveZero = +0.0; + int result = __builtin_signbit(positiveZero); +// CIR: %[[ALLOCA:.*]] = cir.alloca !cir.double +// CIR: %[[CONST:.*]] = cir.const #cir.fp<{{.*}}> : !cir.double +// CIR: cir.store align({{[0-9]+}}) %[[CONST]], %[[ALLOCA]] : !cir.double, !cir.ptr<!cir.double> + +// LLVM: %[[V4:[0-9]+]] = load double, ptr %[[V2:[0-9]+]] +// LLVM: %[[V5:[0-9]+]] = bitcast double %[[V4]] to i[[#BITS:]] +// LLVM: %[[V6:[0-9]+]] = icmp slt i[[#BITS]] %[[V5]], 0 +// LLVM: %[[V7:[0-9]+]] = zext i1 %[[V6]] to i{{[0-9]+}} + +// OGCG: %{{[0-9]+}} = load double, ptr %[[V0:[a-zA-Z0-9]+]] +// OGCG: %{{[0-9]+}} = bitcast double %{{[0-9]+}} to i{{[0-9]+}} +// OGCG: %{{[0-9]+}} = icmp slt i{{[0-9]+}} %{{[0-9]+}}, 0 +// OGCG: %{{[0-9]+}} = zext i1 %{{[0-9]+}} to i{{[0-9]+}} +} + +void test_signbit_negative_zero(){ + double negativeZero = -0.0; + int result = __builtin_signbit(negativeZero); +// CIR: %[[ALLOCA:.*]] = cir.alloca !cir.double +// CIR: %[[CONST:.*]] = cir.const #cir.fp<{{.*}}> : !cir.double +// CIR: cir.store align({{[0-9]+}}) %[[CONST]], %[[ALLOCA]] : !cir.double, !cir.ptr<!cir.double> + +// LLVM: %[[V4:[0-9]+]] = load double, ptr %[[V2:[0-9]+]] +// LLVM: %[[V5:[0-9]+]] = bitcast double %[[V4]] to i[[#BITS:]] +// LLVM: %[[V6:[0-9]+]] = icmp slt i[[#BITS]] %[[V5]], 0 +// LLVM: %[[V7:[0-9]+]] = zext i1 %[[V6]] to i{{[0-9]+}} + +// OGCG: %{{[0-9]+}} = load double, ptr %[[V0:[a-zA-Z0-9]+]] +// OGCG: %{{[0-9]+}} = bitcast double %{{[0-9]+}} to i{{[0-9]+}} +// OGCG: %{{[0-9]+}} = icmp slt i{{[0-9]+}} %{{[0-9]+}}, 0 +// OGCG: %{{[0-9]+}} = zext i1 %{{[0-9]+}} to i{{[0-9]+}} +} + +void test_signbit_positive_number(){ + double positiveNumber = +1.0; + int result = __builtin_signbit(positiveNumber); +// CIR: %[[ALLOCA:.*]] = cir.alloca !cir.double +// CIR: %[[CONST:.*]] = cir.const #cir.fp<{{.*}}> : !cir.double +// CIR: cir.store align({{[0-9]+}}) %[[CONST]], %[[ALLOCA]] : !cir.double, !cir.ptr<!cir.double> + +// LLVM: %[[V4:[0-9]+]] = load double, ptr %[[V2:[0-9]+]] +// LLVM: %[[V5:[0-9]+]] = bitcast double %[[V4]] to i[[#BITS:]] +// LLVM: %[[V6:[0-9]+]] = icmp slt i[[#BITS]] %[[V5]], 0 +// LLVM: %[[V7:[0-9]+]] = zext i1 %[[V6]] to i{{[0-9]+}} + +// OGCG: %{{[0-9]+}} = load double, ptr %[[V0:[a-zA-Z0-9]+]] +// OGCG: %{{[0-9]+}} = bitcast double %{{[0-9]+}} to i{{[0-9]+}} +// OGCG: %{{[0-9]+}} = icmp slt i{{[0-9]+}} %{{[0-9]+}}, 0 +// OGCG: %{{[0-9]+}} = zext i1 %{{[0-9]+}} to i{{[0-9]+}} +} + +void test_signbit_negative_number(){ + double negativeNumber = -1.0; + int result = __builtin_signbit(negativeNumber); +// CIR: %[[ALLOCA:.*]] = cir.alloca !cir.double +// CIR: %[[CONST:.*]] = cir.const #cir.fp<{{.*}}> : !cir.double +// CIR: cir.store align({{[0-9]+}}) %[[CONST]], %[[ALLOCA]] : !cir.double, !cir.ptr<!cir.double> + +// LLVM: %[[V4:[0-9]+]] = load double, ptr %[[V2:[0-9]+]] +// LLVM: %[[V5:[0-9]+]] = bitcast double %[[V4]] to i[[#BITS:]] +// LLVM: %[[V6:[0-9]+]] = icmp slt i[[#BITS]] %[[V5]], 0 +// LLVM: %[[V7:[0-9]+]] = zext i1 %[[V6]] to i{{[0-9]+}} + +// OGCG: %{{[0-9]+}} = load double, ptr %[[V0:[a-zA-Z0-9]+]] +// OGCG: %{{[0-9]+}} = bitcast double %{{[0-9]+}} to i{{[0-9]+}} +// OGCG: %{{[0-9]+}} = icmp slt i{{[0-9]+}} %{{[0-9]+}}, 0 +// OGCG: %{{[0-9]+}} = zext i1 %{{[0-9]+}} to i{{[0-9]+}} +} + +void test_signbit_positive_nan(){ + double positiveNan = +__builtin_nan(""); + int result = __builtin_signbit(positiveNan); +// CIR: %[[ALLOCA:.*]] = cir.alloca !cir.double +// CIR: %[[CONST:.*]] = cir.const #cir.fp<{{.*}}> : !cir.double +// CIR: cir.store align({{[0-9]+}}) %[[CONST]], %[[ALLOCA]] : !cir.double, !cir.ptr<!cir.double> + +// LLVM: %[[V4:[0-9]+]] = load double, ptr %[[V2:[0-9]+]] +// LLVM: %[[V5:[0-9]+]] = bitcast double %[[V4]] to i[[#BITS:]] +// LLVM: %[[V6:[0-9]+]] = icmp slt i[[#BITS]] %[[V5]], 0 +// LLVM: %[[V7:[0-9]+]] = zext i1 %[[V6]] to i{{[0-9]+}} + +// OGCG: %{{[0-9]+}} = load double, ptr %[[V0:[a-zA-Z0-9]+]] +// OGCG: %{{[0-9]+}} = bitcast double %{{[0-9]+}} to i{{[0-9]+}} +// OGCG: %{{[0-9]+}} = icmp slt i{{[0-9]+}} %{{[0-9]+}}, 0 +// OGCG: %{{[0-9]+}} = zext i1 %{{[0-9]+}} to i{{[0-9]+}} +} + +void test_signbit_negative_nan(){ + double negativeNan = -__builtin_nan(""); + int result = __builtin_signbit(negativeNan); +// CIR: %[[ALLOCA:.*]] = cir.alloca !cir.double +// CIR: %[[CONST:.*]] = cir.const #cir.fp<{{.*}}> : !cir.double +// CIR: cir.store align({{[0-9]+}}) %[[CONST]], %[[ALLOCA]] : !cir.double, !cir.ptr<!cir.double> + +// LLVM: %[[V4:[0-9]+]] = load double, ptr %[[V2:[0-9]+]] +// LLVM: %[[V5:[0-9]+]] = bitcast double %[[V4]] to i[[#BITS:]] +// LLVM: %[[V6:[0-9]+]] = icmp slt i[[#BITS]] %[[V5]], 0 +// LLVM: %[[V7:[0-9]+]] = zext i1 %[[V6]] to i{{[0-9]+}} + +// OGCG: %{{[0-9]+}} = load double, ptr %[[V0:[a-zA-Z0-9]+]] +// OGCG: %{{[0-9]+}} = bitcast double %{{[0-9]+}} to i{{[0-9]+}} +// OGCG: %{{[0-9]+}} = icmp slt i{{[0-9]+}} %{{[0-9]+}}, 0 +// OGCG: %{{[0-9]+}} = zext i1 %{{[0-9]+}} to i{{[0-9]+}} +} + +void test_signbit_positive_infinity(){ + double positiveInfinity = +__builtin_inf(); + int result = __builtin_signbit(positiveInfinity); +// CIR: %[[ALLOCA:.*]] = cir.alloca !cir.double +// CIR: %[[CONST:.*]] = cir.const #cir.fp<{{.*}}> : !cir.double +// CIR: cir.store align({{[0-9]+}}) %[[CONST]], %[[ALLOCA]] : !cir.double, !cir.ptr<!cir.double> + +// LLVM: %[[V4:[0-9]+]] = load double, ptr %[[V2:[0-9]+]] +// LLVM: %[[V5:[0-9]+]] = bitcast double %[[V4]] to i[[#BITS:]] +// LLVM: %[[V6:[0-9]+]] = icmp slt i[[#BITS]] %[[V5]], 0 +// LLVM: %[[V7:[0-9]+]] = zext i1 %[[V6]] to i{{[0-9]+}} + +// OGCG: %{{[0-9]+}} = load double, ptr %[[V0:[a-zA-Z0-9]+]] +// OGCG: %{{[0-9]+}} = bitcast double %{{[0-9]+}} to i{{[0-9]+}} +// OGCG: %{{[0-9]+}} = icmp slt i{{[0-9]+}} %{{[0-9]+}}, 0 +// OGCG: %{{[0-9]+}} = zext i1 %{{[0-9]+}} to i{{[0-9]+}} +} + +void test_signbit_negative_infinity(){ + double negativeInfinity = -__builtin_inf(); + int result = __builtin_signbit(negativeInfinity); +// CIR: %[[ALLOCA:.*]] = cir.alloca !cir.double +// CIR: %[[CONST:.*]] = cir.const #cir.fp<{{.*}}> : !cir.double +// CIR: cir.store align({{[0-9]+}}) %[[CONST]], %[[ALLOCA]] : !cir.double, !cir.ptr<!cir.double> + +// LLVM: %[[V4:[0-9]+]] = load double, ptr %[[V2:[0-9]+]] +// LLVM: %[[V5:[0-9]+]] = bitcast double %[[V4]] to i[[#BITS:]] +// LLVM: %[[V6:[0-9]+]] = icmp slt i[[#BITS]] %[[V5]], 0 +// LLVM: %[[V7:[0-9]+]] = zext i1 %[[V6]] to i{{[0-9]+}} + +// OGCG: %{{[0-9]+}} = load double, ptr %[[V0:[a-zA-Z0-9]+]] +// OGCG: %{{[0-9]+}} = bitcast double %{{[0-9]+}} to i{{[0-9]+}} +// OGCG: %{{[0-9]+}} = icmp slt i{{[0-9]+}} %{{[0-9]+}}, 0 +// OGCG: %{{[0-9]+}} = zext i1 %{{[0-9]+}} to i{{[0-9]+}} +} >From 0c5e01f1d47caf81cffda93e454e8cf56d113b44 Mon Sep 17 00:00:00 2001 From: YeonguChoe <[email protected]> Date: Wed, 1 Apr 2026 01:44:30 -0400 Subject: [PATCH 2/2] - Fix implementation to generate cir.signbit - Change FileCheck --- clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp | 7 +- .../CIR/CodeGenBuiltins/builtin-signbit.c | 218 +++++++++--------- 2 files changed, 117 insertions(+), 108 deletions(-) diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp index 6c098e50d9578..bdae39b14dc88 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp @@ -1872,9 +1872,10 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID, CIRGenFunction::CIRGenFPOptionsRAII fPOptsRAII(*this, e); mlir::Location loc = getLoc(e->getBeginLoc()); mlir::Value value = emitScalarExpr(e->getArg(0)); - mlir::Type resultTy = convertType(e->getType()); - mlir::Value signBit = emitSignBit(loc, *this, value); - return RValue::get(builder.createBoolToInt(signBit, resultTy)); + mlir::Operation *signBitOp = cir::SignBitOp::create(builder, loc, value); + mlir::Value result = builder.createBoolToInt(signBitOp->getResult(0), + convertType(e->getType())); + return RValue::get(result); } case Builtin::BI__warn_memset_zero_len: case Builtin::BI__annotation: diff --git a/clang/test/CIR/CodeGenBuiltins/builtin-signbit.c b/clang/test/CIR/CodeGenBuiltins/builtin-signbit.c index 3af0ff4df5da5..2cf7579fcf077 100644 --- a/clang/test/CIR/CodeGenBuiltins/builtin-signbit.c +++ b/clang/test/CIR/CodeGenBuiltins/builtin-signbit.c @@ -8,143 +8,151 @@ void test_signbit_positive_zero(){ double positiveZero = +0.0; int result = __builtin_signbit(positiveZero); -// CIR: %[[ALLOCA:.*]] = cir.alloca !cir.double -// CIR: %[[CONST:.*]] = cir.const #cir.fp<{{.*}}> : !cir.double -// CIR: cir.store align({{[0-9]+}}) %[[CONST]], %[[ALLOCA]] : !cir.double, !cir.ptr<!cir.double> - -// LLVM: %[[V4:[0-9]+]] = load double, ptr %[[V2:[0-9]+]] -// LLVM: %[[V5:[0-9]+]] = bitcast double %[[V4]] to i[[#BITS:]] -// LLVM: %[[V6:[0-9]+]] = icmp slt i[[#BITS]] %[[V5]], 0 -// LLVM: %[[V7:[0-9]+]] = zext i1 %[[V6]] to i{{[0-9]+}} - -// OGCG: %{{[0-9]+}} = load double, ptr %[[V0:[a-zA-Z0-9]+]] -// OGCG: %{{[0-9]+}} = bitcast double %{{[0-9]+}} to i{{[0-9]+}} -// OGCG: %{{[0-9]+}} = icmp slt i{{[0-9]+}} %{{[0-9]+}}, 0 -// OGCG: %{{[0-9]+}} = zext i1 %{{[0-9]+}} to i{{[0-9]+}} +// CIR: cir.alloca !cir.double, !cir.ptr<!cir.double>, ["positiveZero", init] +// CIR: cir.const #cir.fp<0.000000e+00> : !cir.double +// CIR: cir.signbit {{.*}} : !cir.double -> !cir.bool +// CIR: cir.cast bool_to_int {{.*}} : !cir.bool -> !s32i + +// LLVM: store double 0.000000e+00, ptr %{{.*}} +// LLVM: bitcast double %{{.*}} to i64 +// LLVM: icmp slt i64 %{{.*}}, 0 +// LLVM: zext i1 %{{.*}} to i32 + +// OGCG: store double 0.000000e+00, ptr %{{.*}} +// OGCG: bitcast double %{{.*}} to i64 +// OGCG: icmp slt i64 %{{.*}}, 0 +// OGCG: zext i1 %{{.*}} to i32 } void test_signbit_negative_zero(){ double negativeZero = -0.0; int result = __builtin_signbit(negativeZero); -// CIR: %[[ALLOCA:.*]] = cir.alloca !cir.double -// CIR: %[[CONST:.*]] = cir.const #cir.fp<{{.*}}> : !cir.double -// CIR: cir.store align({{[0-9]+}}) %[[CONST]], %[[ALLOCA]] : !cir.double, !cir.ptr<!cir.double> - -// LLVM: %[[V4:[0-9]+]] = load double, ptr %[[V2:[0-9]+]] -// LLVM: %[[V5:[0-9]+]] = bitcast double %[[V4]] to i[[#BITS:]] -// LLVM: %[[V6:[0-9]+]] = icmp slt i[[#BITS]] %[[V5]], 0 -// LLVM: %[[V7:[0-9]+]] = zext i1 %[[V6]] to i{{[0-9]+}} - -// OGCG: %{{[0-9]+}} = load double, ptr %[[V0:[a-zA-Z0-9]+]] -// OGCG: %{{[0-9]+}} = bitcast double %{{[0-9]+}} to i{{[0-9]+}} -// OGCG: %{{[0-9]+}} = icmp slt i{{[0-9]+}} %{{[0-9]+}}, 0 -// OGCG: %{{[0-9]+}} = zext i1 %{{[0-9]+}} to i{{[0-9]+}} +// CIR: cir.alloca !cir.double, !cir.ptr<!cir.double>, ["negativeZero", init] +// CIR: cir.const #cir.fp<-0.000000e+00> : !cir.double +// CIR: cir.signbit {{.*}} : !cir.double -> !cir.bool +// CIR: cir.cast bool_to_int {{.*}} : !cir.bool -> !s32i + +// LLVM: store double -0.000000e+00, ptr %{{.*}} +// LLVM: bitcast double %{{.*}} to i64 +// LLVM: icmp slt i64 %{{.*}}, 0 +// LLVM: zext i1 %{{.*}} to i32 + +// OGCG: store double -0.000000e+00, ptr %{{.*}} +// OGCG: bitcast double %{{.*}} to i64 +// OGCG: icmp slt i64 %{{.*}}, 0 +// OGCG: zext i1 %{{.*}} to i32 } void test_signbit_positive_number(){ - double positiveNumber = +1.0; + double positiveNumber = 1.0; int result = __builtin_signbit(positiveNumber); -// CIR: %[[ALLOCA:.*]] = cir.alloca !cir.double -// CIR: %[[CONST:.*]] = cir.const #cir.fp<{{.*}}> : !cir.double -// CIR: cir.store align({{[0-9]+}}) %[[CONST]], %[[ALLOCA]] : !cir.double, !cir.ptr<!cir.double> - -// LLVM: %[[V4:[0-9]+]] = load double, ptr %[[V2:[0-9]+]] -// LLVM: %[[V5:[0-9]+]] = bitcast double %[[V4]] to i[[#BITS:]] -// LLVM: %[[V6:[0-9]+]] = icmp slt i[[#BITS]] %[[V5]], 0 -// LLVM: %[[V7:[0-9]+]] = zext i1 %[[V6]] to i{{[0-9]+}} - -// OGCG: %{{[0-9]+}} = load double, ptr %[[V0:[a-zA-Z0-9]+]] -// OGCG: %{{[0-9]+}} = bitcast double %{{[0-9]+}} to i{{[0-9]+}} -// OGCG: %{{[0-9]+}} = icmp slt i{{[0-9]+}} %{{[0-9]+}}, 0 -// OGCG: %{{[0-9]+}} = zext i1 %{{[0-9]+}} to i{{[0-9]+}} +// CIR: cir.alloca !cir.double, !cir.ptr<!cir.double>, ["positiveNumber", init] +// CIR: cir.const #cir.fp<1.000000e+00> : !cir.double +// CIR: cir.signbit {{.*}} : !cir.double -> !cir.bool +// CIR: cir.cast bool_to_int {{.*}} : !cir.bool -> !s32i + +// LLVM: store double 1.000000e+00, ptr %{{.*}} +// LLVM: bitcast double %{{.*}} to i64 +// LLVM: icmp slt i64 %{{.*}}, 0 +// LLVM: zext i1 %{{.*}} to i32 + +// OGCG: store double 1.000000e+00, ptr %{{.*}} +// OGCG: bitcast double %{{.*}} to i64 +// OGCG: icmp slt i64 %{{.*}}, 0 +// OGCG: zext i1 %{{.*}} to i32 } void test_signbit_negative_number(){ double negativeNumber = -1.0; int result = __builtin_signbit(negativeNumber); -// CIR: %[[ALLOCA:.*]] = cir.alloca !cir.double -// CIR: %[[CONST:.*]] = cir.const #cir.fp<{{.*}}> : !cir.double -// CIR: cir.store align({{[0-9]+}}) %[[CONST]], %[[ALLOCA]] : !cir.double, !cir.ptr<!cir.double> - -// LLVM: %[[V4:[0-9]+]] = load double, ptr %[[V2:[0-9]+]] -// LLVM: %[[V5:[0-9]+]] = bitcast double %[[V4]] to i[[#BITS:]] -// LLVM: %[[V6:[0-9]+]] = icmp slt i[[#BITS]] %[[V5]], 0 -// LLVM: %[[V7:[0-9]+]] = zext i1 %[[V6]] to i{{[0-9]+}} - -// OGCG: %{{[0-9]+}} = load double, ptr %[[V0:[a-zA-Z0-9]+]] -// OGCG: %{{[0-9]+}} = bitcast double %{{[0-9]+}} to i{{[0-9]+}} -// OGCG: %{{[0-9]+}} = icmp slt i{{[0-9]+}} %{{[0-9]+}}, 0 -// OGCG: %{{[0-9]+}} = zext i1 %{{[0-9]+}} to i{{[0-9]+}} +// CIR: cir.alloca !cir.double, !cir.ptr<!cir.double>, ["negativeNumber", init] +// CIR: cir.const #cir.fp<-1.000000e+00> : !cir.double +// CIR: cir.signbit {{.*}} : !cir.double -> !cir.bool +// CIR: cir.cast bool_to_int {{.*}} : !cir.bool -> !s32i + +// LLVM: store double -1.000000e+00, ptr %{{.*}} +// LLVM: bitcast double %{{.*}} to i64 +// LLVM: icmp slt i64 %{{.*}}, 0 +// LLVM: zext i1 %{{.*}} to i32 + +// OGCG: store double -1.000000e+00, ptr %{{.*}} +// OGCG: bitcast double %{{.*}} to i64 +// OGCG: icmp slt i64 %{{.*}}, 0 +// OGCG: zext i1 %{{.*}} to i32 } void test_signbit_positive_nan(){ double positiveNan = +__builtin_nan(""); int result = __builtin_signbit(positiveNan); -// CIR: %[[ALLOCA:.*]] = cir.alloca !cir.double -// CIR: %[[CONST:.*]] = cir.const #cir.fp<{{.*}}> : !cir.double -// CIR: cir.store align({{[0-9]+}}) %[[CONST]], %[[ALLOCA]] : !cir.double, !cir.ptr<!cir.double> - -// LLVM: %[[V4:[0-9]+]] = load double, ptr %[[V2:[0-9]+]] -// LLVM: %[[V5:[0-9]+]] = bitcast double %[[V4]] to i[[#BITS:]] -// LLVM: %[[V6:[0-9]+]] = icmp slt i[[#BITS]] %[[V5]], 0 -// LLVM: %[[V7:[0-9]+]] = zext i1 %[[V6]] to i{{[0-9]+}} - -// OGCG: %{{[0-9]+}} = load double, ptr %[[V0:[a-zA-Z0-9]+]] -// OGCG: %{{[0-9]+}} = bitcast double %{{[0-9]+}} to i{{[0-9]+}} -// OGCG: %{{[0-9]+}} = icmp slt i{{[0-9]+}} %{{[0-9]+}}, 0 -// OGCG: %{{[0-9]+}} = zext i1 %{{[0-9]+}} to i{{[0-9]+}} +// CIR: cir.alloca !cir.double, !cir.ptr<!cir.double>, ["positiveNan", init] +// CIR: cir.const #cir.fp<0x7FF8000000000000> : !cir.double +// CIR: cir.signbit {{.*}} : !cir.double -> !cir.bool +// CIR: cir.cast bool_to_int {{.*}} : !cir.bool -> !s32i + +// LLVM: store double 0x7FF8000000000000, ptr %{{.*}} +// LLVM: bitcast double %{{.*}} to i64 +// LLVM: icmp slt i64 %{{.*}}, 0 +// LLVM: zext i1 %{{.*}} to i32 + +// OGCG: store double 0x7FF8000000000000, ptr %{{.*}} +// OGCG: bitcast double %{{.*}} to i64 +// OGCG: icmp slt i64 %{{.*}}, 0 +// OGCG: zext i1 %{{.*}} to i32 } void test_signbit_negative_nan(){ double negativeNan = -__builtin_nan(""); int result = __builtin_signbit(negativeNan); -// CIR: %[[ALLOCA:.*]] = cir.alloca !cir.double -// CIR: %[[CONST:.*]] = cir.const #cir.fp<{{.*}}> : !cir.double -// CIR: cir.store align({{[0-9]+}}) %[[CONST]], %[[ALLOCA]] : !cir.double, !cir.ptr<!cir.double> - -// LLVM: %[[V4:[0-9]+]] = load double, ptr %[[V2:[0-9]+]] -// LLVM: %[[V5:[0-9]+]] = bitcast double %[[V4]] to i[[#BITS:]] -// LLVM: %[[V6:[0-9]+]] = icmp slt i[[#BITS]] %[[V5]], 0 -// LLVM: %[[V7:[0-9]+]] = zext i1 %[[V6]] to i{{[0-9]+}} - -// OGCG: %{{[0-9]+}} = load double, ptr %[[V0:[a-zA-Z0-9]+]] -// OGCG: %{{[0-9]+}} = bitcast double %{{[0-9]+}} to i{{[0-9]+}} -// OGCG: %{{[0-9]+}} = icmp slt i{{[0-9]+}} %{{[0-9]+}}, 0 -// OGCG: %{{[0-9]+}} = zext i1 %{{[0-9]+}} to i{{[0-9]+}} +// CIR: cir.alloca !cir.double, !cir.ptr<!cir.double>, ["negativeNan", init] +// CIR: cir.const #cir.fp<0xFFF8000000000000> : !cir.double +// CIR: cir.signbit {{.*}} : !cir.double -> !cir.bool +// CIR: cir.cast bool_to_int {{.*}} : !cir.bool -> !s32i + +// LLVM: store double 0xFFF8000000000000, ptr %{{.*}} +// LLVM: bitcast double %{{.*}} to i64 +// LLVM: icmp slt i64 %{{.*}}, 0 +// LLVM: zext i1 %{{.*}} to i32 + +// OGCG: store double 0xFFF8000000000000, ptr %{{.*}} +// OGCG: bitcast double %{{.*}} to i64 +// OGCG: icmp slt i64 %{{.*}}, 0 +// OGCG: zext i1 %{{.*}} to i32 } void test_signbit_positive_infinity(){ double positiveInfinity = +__builtin_inf(); int result = __builtin_signbit(positiveInfinity); -// CIR: %[[ALLOCA:.*]] = cir.alloca !cir.double -// CIR: %[[CONST:.*]] = cir.const #cir.fp<{{.*}}> : !cir.double -// CIR: cir.store align({{[0-9]+}}) %[[CONST]], %[[ALLOCA]] : !cir.double, !cir.ptr<!cir.double> - -// LLVM: %[[V4:[0-9]+]] = load double, ptr %[[V2:[0-9]+]] -// LLVM: %[[V5:[0-9]+]] = bitcast double %[[V4]] to i[[#BITS:]] -// LLVM: %[[V6:[0-9]+]] = icmp slt i[[#BITS]] %[[V5]], 0 -// LLVM: %[[V7:[0-9]+]] = zext i1 %[[V6]] to i{{[0-9]+}} - -// OGCG: %{{[0-9]+}} = load double, ptr %[[V0:[a-zA-Z0-9]+]] -// OGCG: %{{[0-9]+}} = bitcast double %{{[0-9]+}} to i{{[0-9]+}} -// OGCG: %{{[0-9]+}} = icmp slt i{{[0-9]+}} %{{[0-9]+}}, 0 -// OGCG: %{{[0-9]+}} = zext i1 %{{[0-9]+}} to i{{[0-9]+}} +// CIR: cir.alloca !cir.double, !cir.ptr<!cir.double>, ["positiveInfinity", init] +// CIR: cir.const #cir.fp<0x7FF0000000000000> : !cir.double +// CIR: cir.signbit {{.*}} : !cir.double -> !cir.bool +// CIR: cir.cast bool_to_int {{.*}} : !cir.bool -> !s32i + +// LLVM: store double 0x7FF0000000000000, ptr %{{.*}} +// LLVM: bitcast double %{{.*}} to i64 +// LLVM: icmp slt i64 %{{.*}}, 0 +// LLVM: zext i1 %{{.*}} to i32 + +// OGCG: store double 0x7FF0000000000000, ptr %{{.*}} +// OGCG: bitcast double %{{.*}} to i64 +// OGCG: icmp slt i64 %{{.*}}, 0 +// OGCG: zext i1 %{{.*}} to i32 } void test_signbit_negative_infinity(){ double negativeInfinity = -__builtin_inf(); int result = __builtin_signbit(negativeInfinity); -// CIR: %[[ALLOCA:.*]] = cir.alloca !cir.double -// CIR: %[[CONST:.*]] = cir.const #cir.fp<{{.*}}> : !cir.double -// CIR: cir.store align({{[0-9]+}}) %[[CONST]], %[[ALLOCA]] : !cir.double, !cir.ptr<!cir.double> - -// LLVM: %[[V4:[0-9]+]] = load double, ptr %[[V2:[0-9]+]] -// LLVM: %[[V5:[0-9]+]] = bitcast double %[[V4]] to i[[#BITS:]] -// LLVM: %[[V6:[0-9]+]] = icmp slt i[[#BITS]] %[[V5]], 0 -// LLVM: %[[V7:[0-9]+]] = zext i1 %[[V6]] to i{{[0-9]+}} - -// OGCG: %{{[0-9]+}} = load double, ptr %[[V0:[a-zA-Z0-9]+]] -// OGCG: %{{[0-9]+}} = bitcast double %{{[0-9]+}} to i{{[0-9]+}} -// OGCG: %{{[0-9]+}} = icmp slt i{{[0-9]+}} %{{[0-9]+}}, 0 -// OGCG: %{{[0-9]+}} = zext i1 %{{[0-9]+}} to i{{[0-9]+}} +// CIR: cir.alloca !cir.double, !cir.ptr<!cir.double>, ["negativeInfinity", init] +// CIR: cir.const #cir.fp<0xFFF0000000000000> : !cir.double +// CIR: cir.signbit {{.*}} : !cir.double -> !cir.bool +// CIR: cir.cast bool_to_int {{.*}} : !cir.bool -> !s32i + +// LLVM: store double 0xFFF0000000000000, ptr %{{.*}} +// LLVM: bitcast double %{{.*}} to i64 +// LLVM: icmp slt i64 %{{.*}}, 0 +// LLVM: zext i1 %{{.*}} to i32 + +// OGCG: store double 0xFFF0000000000000, ptr %{{.*}} +// OGCG: bitcast double %{{.*}} to i64 +// OGCG: icmp slt i64 %{{.*}}, 0 +// OGCG: zext i1 %{{.*}} to i32 } _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
