llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-clang
Author: Nikita Terentev (Seraphimt)
<details>
<summary>Changes</summary>
This PR fix(as I hope) #<!-- -->186584
For fix I write one-use program that found and renamed volatile var in funcall.
After use tests seems valid(but more verbose) and it's pass. Except
1) builtins-systemz-i128.c autogenerated and I update it with
update_cc_test_checks.py
2) builtins-systemz-zvector-constrained.c not pass and I "false" fix it done by
analogy other line in this file. What is the best way to do this? @<!--
-->uweigand Could you help me with it ?
<details>
<summary>script</summary>
```C++
#include <filesystem>
#include <fstream>
#include <iostream>
#include <map>
#include <ranges>
#include <sstream>
#include <string>
#include <string_view>
#include <unordered_map>
struct Count {
size_t count = 0;
size_t max_count = 0;
};
std::unordered_map<std::string, Count> v_use;
std::string GetTextFromFile(std::string FilePath) {
std::ifstream file(FilePath);
if (!file.is_open()) {
return "";
}
std::ostringstream of_stream;
of_stream << file.rdbuf();
file.close();
return of_stream.str();
}
void SaveTextToFile(std::string &text, std::string FilePath) {
std::istringstream istream(text);
std::ofstream new_file(FilePath);
if (!new_file.is_open()) {
std::cout << "Error with save result into: " << FilePath
<< std::endl;
return;
}
new_file << text;
new_file.close();
}
void CollectVolatileVar(std::string &text) {
std::size_t v_pos = 0;
while (true) {
v_pos = text.find("volatile", v_pos + 1);
if (v_pos == std::string::npos) {
return;
}
auto semicolon_pos = text.find(";", v_pos);
auto decl = text.substr(v_pos, semicolon_pos - v_pos);
auto name_pos = decl.rfind(' ') + 1;
auto name = decl.substr(name_pos, semicolon_pos - name_pos);
v_use.emplace(name, Count{ 0, 0 });
}
}
void InsertIDInFuncall(std::vector<std::string> &func_call_param,
size_t curr_pos, std::string &text) {
for (auto &param : func_call_param) {
std::erase_if(
param, [](char x) { return std::isspace(x) || x == '(' || x == ')'; });
curr_pos = text.find(param, curr_pos + 1) + param.size();
auto finded = v_use.find(param);
if (finded == v_use.end()) {
continue;
}
auto var_count = &finded->second;
if (var_count->count > 0) {
text.insert(curr_pos, std::to_string(var_count->count));
}
var_count->count++;
if (var_count->count > var_count->max_count)
var_count->max_count = var_count->count;
}
}
void FixFuncalls(std::string &text) {
std::size_t curr_pos = 0;
while (true) {
auto left_bracket_pos = text.find('(', curr_pos);
if (left_bracket_pos == std::string::npos) {
break;
}
auto right_bracket_pos = text.find(')', left_bracket_pos + 1);
if (right_bracket_pos == std::string::npos) {
break;
}
auto funcall =
text.substr(left_bracket_pos, right_bracket_pos - left_bracket_pos);
auto func_call_param =
std::ranges::to<std::vector<std::string>>(
std::ranges::split_view(funcall, ','));
InsertIDInFuncall(func_call_param, left_bracket_pos, text);
for (auto &var : v_use) {
var.second.count = 0;
}
curr_pos = right_bracket_pos;
}
}
void AddNewVarDecl(std::string &text)
{
for (auto &var : v_use) {
if (var.second.max_count < 2) { continue; }
auto curr_pos = text.find(var.first, 0);
if (curr_pos > text.find("void test", 0)) { continue; } //end decl
auto begin_pos = text.rfind("\n", curr_pos) + 1;
auto end_pos = text.find(";", curr_pos) + 2 /*EL*/;
auto new_line = text.substr(begin_pos, end_pos - begin_pos);
auto insert_ID_pos = new_line.find(var.first, 0);
for (size_t i = 1; i < var.second.max_count; i++) {
auto copy_line = new_line;
copy_line.insert(insert_ID_pos + var.first.size(), std::to_string(i));
text.insert(end_pos, copy_line);
end_pos += copy_line.size();
}
}
}
int main() {
std::array<std::string, 16> files{
"CodeGen/SystemZ/builtins-systemz-i128.c"
, "CodeGen/SystemZ/builtins-systemz-vector-constrained.c"
, "CodeGen/SystemZ/builtins-systemz-vector.c"
, "CodeGen/SystemZ/builtins-systemz-vector2-constrained.c"
, "CodeGen/SystemZ/builtins-systemz-vector2.c"
, "CodeGen/SystemZ/builtins-systemz-vector3.c"
, "CodeGen/SystemZ/builtins-systemz-vector4.c"
, "CodeGen/SystemZ/builtins-systemz-vector5.c"
, "CodeGen/SystemZ/builtins-systemz-zvector-constrained.c"
, "CodeGen/SystemZ/builtins-systemz-zvector-error.c"
, "CodeGen/SystemZ/builtins-systemz-zvector.c"
, "CodeGen/SystemZ/builtins-systemz-zvector2-constrained.c"
, "CodeGen/SystemZ/builtins-systemz-zvector2.c"
, "CodeGen/SystemZ/builtins-systemz-zvector3.c"
, "CodeGen/SystemZ/builtins-systemz-zvector4.c"
, "CodeGen/SystemZ/builtins-systemz-zvector5.c"
};
std::string base_path = "";
for (auto file_path : files) {
file_path = base_path + file_path;
auto text = GetTextFromFile(file_path);
if (text == "") {
std::cout << "Error with open: " << file_path <<
std::endl;
return 1;
}
CollectVolatileVar(text);
FixFuncalls(text);
AddNewVarDecl(text);
SaveTextToFile(text, file_path);
v_use.clear();
}
}
```
</details>
Clang :: CodeGen/SystemZ/builtins-systemz-zvector-constrained.c
---
Patch is 374.09 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/190212.diff
16 Files Affected:
- (modified) clang/test/CodeGen/SystemZ/builtins-systemz-i128.c (+84-80)
- (modified) clang/test/CodeGen/SystemZ/builtins-systemz-vector-constrained.c
(+7-5)
- (modified) clang/test/CodeGen/SystemZ/builtins-systemz-vector.c (+220-200)
- (modified) clang/test/CodeGen/SystemZ/builtins-systemz-vector2-constrained.c
(+15-11)
- (modified) clang/test/CodeGen/SystemZ/builtins-systemz-vector2.c (+30-24)
- (modified) clang/test/CodeGen/SystemZ/builtins-systemz-vector3.c (+14-10)
- (modified) clang/test/CodeGen/SystemZ/builtins-systemz-vector4.c (+3-2)
- (modified) clang/test/CodeGen/SystemZ/builtins-systemz-vector5.c (+32-22)
- (modified) clang/test/CodeGen/SystemZ/builtins-systemz-zvector-constrained.c
(+29-30)
- (modified) clang/test/CodeGen/SystemZ/builtins-systemz-zvector-error.c
(+75-62)
- (modified) clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c (+897-867)
- (modified) clang/test/CodeGen/SystemZ/builtins-systemz-zvector2-constrained.c
(+70-66)
- (modified) clang/test/CodeGen/SystemZ/builtins-systemz-zvector2.c (+165-146)
- (modified) clang/test/CodeGen/SystemZ/builtins-systemz-zvector3.c (+82-66)
- (modified) clang/test/CodeGen/SystemZ/builtins-systemz-zvector4.c (+3-2)
- (modified) clang/test/CodeGen/SystemZ/builtins-systemz-zvector5.c (+148-116)
``````````diff
diff --git a/clang/test/CodeGen/SystemZ/builtins-systemz-i128.c
b/clang/test/CodeGen/SystemZ/builtins-systemz-i128.c
index 2a20607123af9..836e8609da37b 100644
--- a/clang/test/CodeGen/SystemZ/builtins-systemz-i128.c
+++ b/clang/test/CodeGen/SystemZ/builtins-systemz-i128.c
@@ -7,159 +7,163 @@
#include <vecintrin.h>
volatile vector unsigned char vuc;
+volatile vector unsigned char vuc1;
+volatile vector unsigned char vuc2;
volatile vector unsigned short vus;
volatile vector unsigned int vui;
+volatile vector unsigned int vui1;
volatile vector unsigned long long vul;
+volatile vector unsigned long long vul1;
// CHECK-LABEL: define dso_local void @test(
// CHECK-SAME: ) local_unnamed_addr #[[ATTR0:[0-9]+]] {
// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7:![0-9]+]]
-// CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
+// CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA6:![0-9]+]]
+// CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @vuc1, align 8,
!tbaa [[CHAR_TBAA6]]
// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to i128
// CHECK-NEXT: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to i128
// CHECK-NEXT: [[ADD_I:%.*]] = add nsw i128 [[TMP3]], [[TMP2]]
// CHECK-NEXT: [[TMP4:%.*]] = bitcast i128 [[ADD_I]] to <16 x i8>
-// CHECK-NEXT: store volatile <16 x i8> [[TMP4]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP5:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP6:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
+// CHECK-NEXT: store volatile <16 x i8> [[TMP4]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP5:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP6:%.*]] = load volatile <16 x i8>, ptr @vuc1, align 8,
!tbaa [[CHAR_TBAA6]]
// CHECK-NEXT: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP5]] to i128
// CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP6]] to i128
// CHECK-NEXT: [[TMP9:%.*]] = tail call i128 @llvm.s390.vaccq(i128
[[TMP7]], i128 [[TMP8]])
// CHECK-NEXT: [[TMP10:%.*]] = bitcast i128 [[TMP9]] to <16 x i8>
-// CHECK-NEXT: store volatile <16 x i8> [[TMP10]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP11:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP12:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP13:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
+// CHECK-NEXT: store volatile <16 x i8> [[TMP10]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP11:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP12:%.*]] = load volatile <16 x i8>, ptr @vuc1, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP13:%.*]] = load volatile <16 x i8>, ptr @vuc2, align 8,
!tbaa [[CHAR_TBAA6]]
// CHECK-NEXT: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP11]] to i128
// CHECK-NEXT: [[TMP15:%.*]] = bitcast <16 x i8> [[TMP12]] to i128
// CHECK-NEXT: [[TMP16:%.*]] = bitcast <16 x i8> [[TMP13]] to i128
// CHECK-NEXT: [[TMP17:%.*]] = tail call i128 @llvm.s390.vacq(i128
[[TMP14]], i128 [[TMP15]], i128 [[TMP16]])
// CHECK-NEXT: [[TMP18:%.*]] = bitcast i128 [[TMP17]] to <16 x i8>
-// CHECK-NEXT: store volatile <16 x i8> [[TMP18]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP19:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP20:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP21:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
+// CHECK-NEXT: store volatile <16 x i8> [[TMP18]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP19:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP20:%.*]] = load volatile <16 x i8>, ptr @vuc1, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP21:%.*]] = load volatile <16 x i8>, ptr @vuc2, align 8,
!tbaa [[CHAR_TBAA6]]
// CHECK-NEXT: [[TMP22:%.*]] = bitcast <16 x i8> [[TMP19]] to i128
// CHECK-NEXT: [[TMP23:%.*]] = bitcast <16 x i8> [[TMP20]] to i128
// CHECK-NEXT: [[TMP24:%.*]] = bitcast <16 x i8> [[TMP21]] to i128
// CHECK-NEXT: [[TMP25:%.*]] = tail call i128 @llvm.s390.vacccq(i128
[[TMP22]], i128 [[TMP23]], i128 [[TMP24]])
// CHECK-NEXT: [[TMP26:%.*]] = bitcast i128 [[TMP25]] to <16 x i8>
-// CHECK-NEXT: store volatile <16 x i8> [[TMP26]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP27:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP28:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
+// CHECK-NEXT: store volatile <16 x i8> [[TMP26]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP27:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP28:%.*]] = load volatile <16 x i8>, ptr @vuc1, align 8,
!tbaa [[CHAR_TBAA6]]
// CHECK-NEXT: [[TMP29:%.*]] = bitcast <16 x i8> [[TMP27]] to i128
// CHECK-NEXT: [[TMP30:%.*]] = bitcast <16 x i8> [[TMP28]] to i128
// CHECK-NEXT: [[SUB_I:%.*]] = sub nsw i128 [[TMP29]], [[TMP30]]
// CHECK-NEXT: [[TMP31:%.*]] = bitcast i128 [[SUB_I]] to <16 x i8>
-// CHECK-NEXT: store volatile <16 x i8> [[TMP31]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP32:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP33:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
+// CHECK-NEXT: store volatile <16 x i8> [[TMP31]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP32:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP33:%.*]] = load volatile <16 x i8>, ptr @vuc1, align 8,
!tbaa [[CHAR_TBAA6]]
// CHECK-NEXT: [[TMP34:%.*]] = bitcast <16 x i8> [[TMP32]] to i128
// CHECK-NEXT: [[TMP35:%.*]] = bitcast <16 x i8> [[TMP33]] to i128
// CHECK-NEXT: [[TMP36:%.*]] = tail call i128 @llvm.s390.vscbiq(i128
[[TMP34]], i128 [[TMP35]])
// CHECK-NEXT: [[TMP37:%.*]] = bitcast i128 [[TMP36]] to <16 x i8>
-// CHECK-NEXT: store volatile <16 x i8> [[TMP37]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP38:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP39:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP40:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
+// CHECK-NEXT: store volatile <16 x i8> [[TMP37]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP38:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP39:%.*]] = load volatile <16 x i8>, ptr @vuc1, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP40:%.*]] = load volatile <16 x i8>, ptr @vuc2, align 8,
!tbaa [[CHAR_TBAA6]]
// CHECK-NEXT: [[TMP41:%.*]] = bitcast <16 x i8> [[TMP38]] to i128
// CHECK-NEXT: [[TMP42:%.*]] = bitcast <16 x i8> [[TMP39]] to i128
// CHECK-NEXT: [[TMP43:%.*]] = bitcast <16 x i8> [[TMP40]] to i128
// CHECK-NEXT: [[TMP44:%.*]] = tail call i128 @llvm.s390.vsbiq(i128
[[TMP41]], i128 [[TMP42]], i128 [[TMP43]])
// CHECK-NEXT: [[TMP45:%.*]] = bitcast i128 [[TMP44]] to <16 x i8>
-// CHECK-NEXT: store volatile <16 x i8> [[TMP45]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP46:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP47:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP48:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
+// CHECK-NEXT: store volatile <16 x i8> [[TMP45]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP46:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP47:%.*]] = load volatile <16 x i8>, ptr @vuc1, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP48:%.*]] = load volatile <16 x i8>, ptr @vuc2, align 8,
!tbaa [[CHAR_TBAA6]]
// CHECK-NEXT: [[TMP49:%.*]] = bitcast <16 x i8> [[TMP46]] to i128
// CHECK-NEXT: [[TMP50:%.*]] = bitcast <16 x i8> [[TMP47]] to i128
// CHECK-NEXT: [[TMP51:%.*]] = bitcast <16 x i8> [[TMP48]] to i128
// CHECK-NEXT: [[TMP52:%.*]] = tail call i128 @llvm.s390.vsbcbiq(i128
[[TMP49]], i128 [[TMP50]], i128 [[TMP51]])
// CHECK-NEXT: [[TMP53:%.*]] = bitcast i128 [[TMP52]] to <16 x i8>
-// CHECK-NEXT: store volatile <16 x i8> [[TMP53]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP54:%.*]] = load volatile <4 x i32>, ptr @vui, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP55:%.*]] = load volatile <4 x i32>, ptr @vui, align 8,
!tbaa [[CHAR_TBAA7]]
+// CHECK-NEXT: store volatile <16 x i8> [[TMP53]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP54:%.*]] = load volatile <4 x i32>, ptr @vui, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP55:%.*]] = load volatile <4 x i32>, ptr @vui1, align 8,
!tbaa [[CHAR_TBAA6]]
// CHECK-NEXT: [[TMP56:%.*]] = tail call i128 @llvm.s390.vsumqf(<4 x i32>
[[TMP54]], <4 x i32> [[TMP55]])
// CHECK-NEXT: [[TMP57:%.*]] = bitcast i128 [[TMP56]] to <16 x i8>
-// CHECK-NEXT: store volatile <16 x i8> [[TMP57]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP58:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP59:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA7]]
+// CHECK-NEXT: store volatile <16 x i8> [[TMP57]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP58:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP59:%.*]] = load volatile <2 x i64>, ptr @vul1, align 8,
!tbaa [[CHAR_TBAA6]]
// CHECK-NEXT: [[TMP60:%.*]] = tail call i128 @llvm.s390.vsumqg(<2 x i64>
[[TMP58]], <2 x i64> [[TMP59]])
// CHECK-NEXT: [[TMP61:%.*]] = bitcast i128 [[TMP60]] to <16 x i8>
-// CHECK-NEXT: store volatile <16 x i8> [[TMP61]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP62:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP63:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA7]]
+// CHECK-NEXT: store volatile <16 x i8> [[TMP61]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP62:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP63:%.*]] = load volatile <2 x i64>, ptr @vul1, align 8,
!tbaa [[CHAR_TBAA6]]
// CHECK-NEXT: [[TMP64:%.*]] = tail call i128 @llvm.s390.vgfmg(<2 x i64>
[[TMP62]], <2 x i64> [[TMP63]])
// CHECK-NEXT: [[TMP65:%.*]] = bitcast i128 [[TMP64]] to <16 x i8>
-// CHECK-NEXT: store volatile <16 x i8> [[TMP65]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP66:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP67:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP68:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
+// CHECK-NEXT: store volatile <16 x i8> [[TMP65]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP66:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP67:%.*]] = load volatile <2 x i64>, ptr @vul1, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP68:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA6]]
// CHECK-NEXT: [[TMP69:%.*]] = bitcast <16 x i8> [[TMP68]] to i128
// CHECK-NEXT: [[TMP70:%.*]] = tail call i128 @llvm.s390.vgfmag(<2 x i64>
[[TMP66]], <2 x i64> [[TMP67]], i128 [[TMP69]])
// CHECK-NEXT: [[TMP71:%.*]] = bitcast i128 [[TMP70]] to <16 x i8>
-// CHECK-NEXT: store volatile <16 x i8> [[TMP71]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP72:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP73:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP74:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
+// CHECK-NEXT: store volatile <16 x i8> [[TMP71]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP72:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP73:%.*]] = load volatile <2 x i64>, ptr @vul1, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP74:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA6]]
// CHECK-NEXT: [[TMP75:%.*]] = bitcast <16 x i8> [[TMP74]] to i128
// CHECK-NEXT: [[TMP76:%.*]] = tail call i128 @llvm.s390.vmslg(<2 x i64>
[[TMP72]], <2 x i64> [[TMP73]], i128 [[TMP75]], i32 0)
// CHECK-NEXT: [[TMP77:%.*]] = bitcast i128 [[TMP76]] to <16 x i8>
-// CHECK-NEXT: store volatile <16 x i8> [[TMP77]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP78:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP79:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP80:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
+// CHECK-NEXT: store volatile <16 x i8> [[TMP77]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP78:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP79:%.*]] = load volatile <2 x i64>, ptr @vul1, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP80:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA6]]
// CHECK-NEXT: [[TMP81:%.*]] = bitcast <16 x i8> [[TMP80]] to i128
// CHECK-NEXT: [[TMP82:%.*]] = tail call i128 @llvm.s390.vmslg(<2 x i64>
[[TMP78]], <2 x i64> [[TMP79]], i128 [[TMP81]], i32 4)
// CHECK-NEXT: [[TMP83:%.*]] = bitcast i128 [[TMP82]] to <16 x i8>
-// CHECK-NEXT: store volatile <16 x i8> [[TMP83]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP84:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP85:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP86:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
+// CHECK-NEXT: store volatile <16 x i8> [[TMP83]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP84:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP85:%.*]] = load volatile <2 x i64>, ptr @vul1, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP86:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA6]]
// CHECK-NEXT: [[TMP87:%.*]] = bitcast <16 x i8> [[TMP86]] to i128
// CHECK-NEXT: [[TMP88:%.*]] = tail call i128 @llvm.s390.vmslg(<2 x i64>
[[TMP84]], <2 x i64> [[TMP85]], i128 [[TMP87]], i32 8)
// CHECK-NEXT: [[TMP89:%.*]] = bitcast i128 [[TMP88]] to <16 x i8>
-// CHECK-NEXT: store volatile <16 x i8> [[TMP89]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP90:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP91:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP92:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
+// CHECK-NEXT: store volatile <16 x i8> [[TMP89]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP90:%.*]] = load volatile <2 x i64>, ptr @vul, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP91:%.*]] = load volatile <2 x i64>, ptr @vul1, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP92:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA6]]
// CHECK-NEXT: [[TMP93:%.*]] = bitcast <16 x i8> [[TMP92]] to i128
// CHECK-NEXT: [[TMP94:%.*]] = tail call i128 @llvm.s390.vmslg(<2 x i64>
[[TMP90]], <2 x i64> [[TMP91]], i128 [[TMP93]], i32 12)
// CHECK-NEXT: [[TMP95:%.*]] = bitcast i128 [[TMP94]] to <16 x i8>
-// CHECK-NEXT: store volatile <16 x i8> [[TMP95]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP96:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
-// CHECK-NEXT: [[TMP97:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA7]]
+// CHECK-NEXT: store volatile <16 x i8> [[TMP95]], ptr @vuc, align 8, !tbaa
[[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP96:%.*]] = load volatile <16 x i8>, ptr @vuc, align 8,
!tbaa [[CHAR_TBAA6]]
+// CHECK-NEXT: [[TMP97:%.*]] = load volatile <16 x i8>, ptr @vuc1, align 8,
!tbaa [[CHAR_TBAA6]]
// CHECK-NEXT: [[TMP98:%.*]] = tail call <2 x i64> @llvm.s390.vbperm(<16 x
i8> [[TMP96]], <16 x i8> [[TMP97]])
-// CHECK-NEXT: store volatile <2 x i64> [[TMP98]], ptr @vul, align 8, !tbaa
[[CHAR_TBAA7]]
+// CHECK-NEXT: store volatile <2 x i64> [[TMP98]], ptr @vul, align 8, !tbaa
[[CHAR_TBAA6]]
// CHECK-NEXT: ret void
//
void test(void) {
- vuc = vec_add_u128(vuc, vuc);
- vuc = vec_addc_u128(vuc, vuc);
- vuc = vec_adde_u128(vuc, vuc, vuc);
- vuc = vec_addec_u128(vuc, vuc, vuc);
+ vuc = vec_add_u128(vuc, vuc1);
+ vuc = vec_addc_u128(vuc, vuc1);
+ vuc = vec_adde_u128(vuc, vuc1, vuc2);
+ vuc = vec_addec_u128(vuc, vuc1, vuc2);
- vuc = vec_sub_u128(vuc, vuc);
- vuc = vec_subc_u128(vuc, vuc);
- vuc = vec_sube_u128(vuc, vuc, vuc);
- vuc = vec_subec_u128(vuc, vuc, vuc);
+ vuc = vec_sub_u128(vuc, vuc1);
+ vuc = vec_subc_u128(vuc, vuc1);
+ vuc = vec_sube_u128(vuc, vuc1, vuc2);
+ vuc = vec_subec_u128(vuc, vuc1, vuc2);
- vuc = vec_sum_u128(vui, vui);
- vuc = vec_sum_u128(vul, vul);
+ vuc = vec_sum_u128(vui, vui1);
+ vuc = vec_sum_u128(vul, vul1);
- vuc = vec_gfmsum_128(vul, vul);
- vuc = vec_gfmsum_accum_128(vul, vul, vuc);
+ vuc = vec_gfmsum_128(vul, vul1);
+ vuc = vec_gfmsum_accum_128(vul, vul1, vuc);
- vuc = vec_msum_u128(vul, vul, vuc, 0);
- vuc = vec_msum_u128(vul, vul, vuc, 4);
- vuc = vec_msum_u128(vul, vul, vuc, 8);
- vuc = vec_msum_u128(vul, vul, vuc, 12);
+ vuc = vec_msum_u128(vul, vul1, vuc, 0);
+ vuc = vec_msum_u128(vul, vul1, vuc, 4);
+ vuc = vec_msum_u128(vul, vul1, vuc, 8);
+ vuc = vec_msum_u128(vul, vul1, vuc, 12);
- vul = vec_bperm_u128(vuc, vuc);
+ vul = vec_bperm_u128(vuc, vuc1);
}
//.
-// CHECK: [[META5:![0-9]+]] = !{!"omnipotent char", [[META6:![0-9]+]], i64 0}
-// CHECK: [[META6]] = !{!"Simple C/C++ TBAA"}
-// CHECK: [[CHAR_TBAA7]] = !{[[META5]], [[META5]], i64 0}
+// CHECK: [[META4:![0-9]+]] = !{!"omnipotent char", [[META5:![0-9]+]], i64 0}
+// CHECK: [[META5]] = !{!"Simple C/C++ TBAA"}
+// CHECK: [[CHAR_TBAA6]] = !{[[META4]], [[META4]], i64 0}
//.
diff --git a/clang/test/CodeGen/SystemZ/builtins-systemz-vector-constrained.c
b/clang/test/CodeGen/SystemZ/builtins-systemz-vector-constrained.c
index ff24ef9a091b7..dc0596a2c9f70 100644
--- a/clang/test/CodeGen/SystemZ/builtins-systemz-vector-constrained.c
+++ b/clang/test/CodeGen/SystemZ/builtins-systemz-vector-constrained.c
@@ -7,15 +7,17 @@ typedef __attribute__((vector_size(16))) double vec_double;
volatile vec_slong vsl;
volatile vec_double vd;
+volatile vec_double vd1;
+volatile vec_double vd2;
int cc;
void test_float(void) {
- vsl = __builtin_s390_vfcedbs(vd, vd, &cc);
+ vsl = __builtin_s390_vfcedbs(vd, vd1, &cc);
// CHECK: call { <2 x i64>, i32 } @llvm.s390.vfcedbs(<2 x double> %{{.*}},
<2 x double> %{{.*}})
- vsl = __builtin_s390_vfchdbs(vd, vd, &cc);
+ vsl = __builtin_s390_vfchdbs(vd, vd1, &cc);
// CHECK: call { <2 x i64>, i32 } @llvm.s390.vfchdbs(<2 x double> %{{.*}},
<2 x double> %{{.*}})
- vsl = __builtin_s390_vfchedbs(vd, vd, &cc);
+ vsl = __builtin_s390_vfchedbs(vd, vd1, &cc);
// CHECK: call { <2 x i64>, i32 } @llvm.s390.vfchedbs(<2 x double> %{{.*}},
<2 x double> %{{.*}})
vsl = __builtin_s390_vftcidb(vd, 0, &cc);
@@ -26,9 +28,9 @@ void test_float(void) {
vd = __builtin_s390_vfsqdb(vd);
// CHECK: call <2 x double> @llvm.experimental.constrained.sqrt....
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/190212
_______________________________________________
cfe-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
