================
@@ -700,6 +700,33 @@ CIRGenTypes::computeRecordLayout(const RecordDecl *rd,
cir::RecordType *ty) {
assert(!cir::MissingFeatures::astRecordDeclAttr());
ty->complete(lowering.fieldTypes, lowering.packed, lowering.padded);
+ // Queue ABI metadata for the module-level cir.record_layouts attribute.
+ if (ty->getName()) {
+ mlir::MLIRContext *mlirCtx = ty->getContext();
+ auto apk = cir::ArgPassingKind::CannotPassInRegs;
+ switch (rd->getArgPassingRestrictions()) {
+ case RecordArgPassingKind::CanPassInRegs:
+ apk = cir::ArgPassingKind::CanPassInRegs;
+ break;
+ case RecordArgPassingKind::CannotPassInRegs:
+ apk = cir::ArgPassingKind::CannotPassInRegs;
+ break;
+ case RecordArgPassingKind::CanNeverPassInRegs:
+ apk = cir::ArgPassingKind::CanNeverPassInRegs;
+ break;
+ }
----------------
adams381 wrote:
Done in 80d82a7.
https://github.com/llvm/llvm-project/pull/188300
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