Author: Jianjian Guan Date: 2026-05-07T10:53:12+08:00 New Revision: ddbb9704f4d246f6c2f87592dc78f347a265577e
URL: https://github.com/llvm/llvm-project/commit/ddbb9704f4d246f6c2f87592dc78f347a265577e DIFF: https://github.com/llvm/llvm-project/commit/ddbb9704f4d246f6c2f87592dc78f347a265577e.diff LOG: [CIR][RISCV] Support zknh builtin codegen (#196013) Support sha256sig0, sha256sig1, sha256sum0, sha256sum1 builtins. Added: clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zknh.c Modified: clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp Removed: ################################################################################ diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp index bbd1cd8d04401..d0d747a838176 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp @@ -95,10 +95,22 @@ CIRGenFunction::emitRISCVBuiltinExpr(unsigned builtinID, const CallExpr *e) { break; } // Zknh - case RISCV::BI__builtin_riscv_sha256sig0: - case RISCV::BI__builtin_riscv_sha256sig1: - case RISCV::BI__builtin_riscv_sha256sum0: - case RISCV::BI__builtin_riscv_sha256sum1: + case RISCV::BI__builtin_riscv_sha256sig0: { + intrinsicName = "riscv.sha256sig0"; + break; + } + case RISCV::BI__builtin_riscv_sha256sig1: { + intrinsicName = "riscv.sha256sig1"; + break; + } + case RISCV::BI__builtin_riscv_sha256sum0: { + intrinsicName = "riscv.sha256sum0"; + break; + } + case RISCV::BI__builtin_riscv_sha256sum1: { + intrinsicName = "riscv.sha256sum1"; + break; + } // Zksed case RISCV::BI__builtin_riscv_sm4ks: case RISCV::BI__builtin_riscv_sm4ed: diff --git a/clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zknh.c b/clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zknh.c new file mode 100644 index 0000000000000..05dc84571338c --- /dev/null +++ b/clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zknh.c @@ -0,0 +1,46 @@ +// RUN: %clang_cc1 -triple riscv32 -target-feature +zknh -fclangir -emit-cir %s -o - | FileCheck %s --check-prefixes=CIR +// RUN: %clang_cc1 -triple riscv64 -target-feature +zknh -fclangir -emit-cir %s -o - | FileCheck %s --check-prefixes=CIR +// RUN: %clang_cc1 -triple riscv32 -target-feature +zknh -fclangir -emit-llvm %s -o - | FileCheck %s --check-prefixes=LLVM +// RUN: %clang_cc1 -triple riscv64 -target-feature +zknh -fclangir -emit-llvm %s -o - | FileCheck %s --check-prefixes=LLVM +// RUN: %clang_cc1 -triple riscv32 -target-feature +zknh -emit-llvm %s -o - | FileCheck %s --check-prefixes=LLVM +// RUN: %clang_cc1 -triple riscv64 -target-feature +zknh -emit-llvm %s -o - | FileCheck %s --check-prefixes=LLVM + +// CIR-LABEL: cir.func{{.*}} @test_builtin_sha256sig0( +// CIR: {{%.*}} = cir.call_llvm_intrinsic "riscv.sha256sig0" {{%.*}} : (!u32i) -> !u32i +// CIR: cir.return +// LLVM-LABEL: @test_builtin_sha256sig0( +// LLVM: call i32 @llvm.riscv.sha256sig0(i32 {{%.*}}) +// LLVM: ret i32 +unsigned int test_builtin_sha256sig0(unsigned int a) { + return __builtin_riscv_sha256sig0(a); +} + +// CIR-LABEL: cir.func{{.*}} @test_builtin_sha256sig1( +// CIR: {{%.*}} = cir.call_llvm_intrinsic "riscv.sha256sig1" {{%.*}} : (!u32i) -> !u32i +// CIR: cir.return +// LLVM-LABEL: @test_builtin_sha256sig1( +// LLVM: call i32 @llvm.riscv.sha256sig1(i32 {{%.*}}) +// LLVM: ret i32 +unsigned int test_builtin_sha256sig1(unsigned int a) { + return __builtin_riscv_sha256sig1(a); +} + +// CIR-LABEL: cir.func{{.*}} @test_builtin_sha256sum0( +// CIR: {{%.*}} = cir.call_llvm_intrinsic "riscv.sha256sum0" {{%.*}} : (!u32i) -> !u32i +// CIR: cir.return +// LLVM-LABEL: @test_builtin_sha256sum0( +// LLVM: call i32 @llvm.riscv.sha256sum0(i32 {{%.*}}) +// LLVM: ret i32 +unsigned int test_builtin_sha256sum0(unsigned int a) { + return __builtin_riscv_sha256sum0(a); +} + +// CIR-LABEL: cir.func{{.*}} @test_builtin_sha256sum1( +// CIR: {{%.*}} = cir.call_llvm_intrinsic "riscv.sha256sum1" {{%.*}} : (!u32i) -> !u32i +// CIR: cir.return +// LLVM-LABEL: @test_builtin_sha256sum1( +// LLVM: call i32 @llvm.riscv.sha256sum1(i32 {{%.*}}) +// LLVM: ret i32 +unsigned int test_builtin_sha256sum1(unsigned int a) { + return __builtin_riscv_sha256sum1(a); +} _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
