https://github.com/akmistry-msft updated https://github.com/llvm/llvm-project/pull/193508
>From 02c8a2798e9a0a3439ef78910942edf1fe23f728 Mon Sep 17 00:00:00 2001 From: Anand Mistry <[email protected]> Date: Wed, 22 Apr 2026 07:32:35 +0100 Subject: [PATCH] [Mips] Allow const pointers for the MSA load intrinsics This matches the prototypes of the GCC builtins. --- clang/include/clang/Basic/BuiltinsMips.def | 8 ++++---- clang/test/CodeGen/Mips/msa-const-ld.c | 24 ++++++++++++++++++++++ 2 files changed, 28 insertions(+), 4 deletions(-) create mode 100644 clang/test/CodeGen/Mips/msa-const-ld.c diff --git a/clang/include/clang/Basic/BuiltinsMips.def b/clang/include/clang/Basic/BuiltinsMips.def index 2aca4cb226bc2..4315a5ea4b986 100644 --- a/clang/include/clang/Basic/BuiltinsMips.def +++ b/clang/include/clang/Basic/BuiltinsMips.def @@ -630,10 +630,10 @@ BUILTIN(__builtin_msa_insve_h, "V8SsV8SsIUiV8Ss", "nc") BUILTIN(__builtin_msa_insve_w, "V4SiV4SiIUiV4Si", "nc") BUILTIN(__builtin_msa_insve_d, "V2SLLiV2SLLiIUiV2SLLi", "nc") -BUILTIN(__builtin_msa_ld_b, "V16Scv*Ii", "nc") -BUILTIN(__builtin_msa_ld_h, "V8Ssv*Ii", "nc") -BUILTIN(__builtin_msa_ld_w, "V4Siv*Ii", "nc") -BUILTIN(__builtin_msa_ld_d, "V2SLLiv*Ii", "nc") +BUILTIN(__builtin_msa_ld_b, "V16ScvC*Ii", "nc") +BUILTIN(__builtin_msa_ld_h, "V8SsvC*Ii", "nc") +BUILTIN(__builtin_msa_ld_w, "V4SivC*Ii", "nc") +BUILTIN(__builtin_msa_ld_d, "V2SLLivC*Ii", "nc") BUILTIN(__builtin_msa_ldr_d, "V2SLLiv*Ii", "nc") BUILTIN(__builtin_msa_ldr_w, "V4Siv*Ii", "nc") diff --git a/clang/test/CodeGen/Mips/msa-const-ld.c b/clang/test/CodeGen/Mips/msa-const-ld.c new file mode 100644 index 0000000000000..e587e089b9001 --- /dev/null +++ b/clang/test/CodeGen/Mips/msa-const-ld.c @@ -0,0 +1,24 @@ +// REQUIRES: mips-registered-target +// RUN: %clang_cc1 -triple mips-unknown-linux-gnu -emit-llvm %s \ +// RUN: -Werror \ +// RUN: -target-feature +msa -target-feature +fp64 \ +// RUN: -mfloat-abi hard -o - | FileCheck %s + +#include <msa.h> + +void test(void) { + const v16i8 v16i8_a = (v16i8) {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}; + v16i8 v16i8_r; + const v8i16 v8i16_a = (v8i16) {0, 1, 2, 3, 4, 5, 6, 7}; + v8i16 v8i16_r; + const v4i32 v4i32_a = (v4i32) {0, 1, 2, 3}; + v4i32 v4i32_r; + const v2i64 v2i64_a = (v2i64) {0, 1}; + v2i64 v2i64_r; + + v16i8_r = __msa_ld_b(&v16i8_a, 1); // CHECK: call <16 x i8> @llvm.mips.ld.b( + v8i16_r = __msa_ld_h(&v8i16_a, 2); // CHECK: call <8 x i16> @llvm.mips.ld.h( + v4i32_r = __msa_ld_w(&v4i32_a, 4); // CHECK: call <4 x i32> @llvm.mips.ld.w( + v2i64_r = __msa_ld_d(&v2i64_a, 8); // CHECK: call <2 x i64> @llvm.mips.ld.d( + +} _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
