================
@@ -13798,17 +13801,17 @@ inline QualType Sema::CheckBitwiseOperands(ExprResult 
&LHS, ExprResult &RHS,
     return InvalidOperands(Loc, LHS, RHS);
   }
 
-  if (LHS.get()->getType()->isSveVLSBuiltinType() ||
-      RHS.get()->getType()->isSveVLSBuiltinType()) {
+  if (LHS.get()->getType()->isVLSBuiltinType() ||
+      RHS.get()->getType()->isVLSBuiltinType()) {
     if (LHS.get()->getType()->hasIntegerRepresentation() &&
         RHS.get()->getType()->hasIntegerRepresentation())
       return CheckSizelessVectorOperands(LHS, RHS, Loc, IsCompAssign,
                                          ArithConvKind::BitwiseOp);
     return InvalidOperands(Loc, LHS, RHS);
   }
 
-  if (LHS.get()->getType()->isSveVLSBuiltinType() ||
-      RHS.get()->getType()->isSveVLSBuiltinType()) {
+  if (LHS.get()->getType()->isVLSBuiltinType() ||
+      RHS.get()->getType()->isVLSBuiltinType()) {
     if (LHS.get()->getType()->hasIntegerRepresentation() &&
----------------
DavidTruby wrote:

Not sure if this was my mistake in the original SVE patch or the code has 
changed since, but you can't actually get here because the if condition is the 
same as the one directly above... I guess this whole block can just be removed?

https://github.com/llvm/llvm-project/pull/192722
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