Author: Chaitanya Date: 2026-05-11T12:43:52+05:30 New Revision: 52b6343c5380ec5e4649f18542dfcdb35c58f98e
URL: https://github.com/llvm/llvm-project/commit/52b6343c5380ec5e4649f18542dfcdb35c58f98e DIFF: https://github.com/llvm/llvm-project/commit/52b6343c5380ec5e4649f18542dfcdb35c58f98e.diff LOG: [CIR][AMDGPU] Add lowering for amdgcn ds swizzle builtin. (#196011) Upstreaming clangIR PR: https://github.com/llvm/clangir/pull/2052 This PR adds support for lowering of _builtin_amdgcn_ds_swizzle* amdgpu builtin to clangIR. Added: Modified: clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip Removed: ################################################################################ diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp index 929cdf8e88789..04ab1c29b0d63 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp @@ -161,7 +161,13 @@ CIRGenFunction::emitAMDGPUBuiltinExpr(unsigned builtinId, .getResult(); return result; } - case AMDGPU::BI__builtin_amdgcn_ds_swizzle: + case AMDGPU::BI__builtin_amdgcn_ds_swizzle: { + mlir::Value src0 = emitScalarExpr(expr->getArg(0)); + mlir::Value src1 = emitScalarExpr(expr->getArg(1)); + return builder.emitIntrinsicCallOp(getLoc(expr->getExprLoc()), + "amdgcn.ds.swizzle", src0.getType(), + mlir::ValueRange{src0, src1}); + } case AMDGPU::BI__builtin_amdgcn_mov_dpp8: case AMDGPU::BI__builtin_amdgcn_mov_dpp: case AMDGPU::BI__builtin_amdgcn_update_dpp: { diff --git a/clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip b/clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip index d374479e6182e..4a61fde7aa90c 100644 --- a/clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip +++ b/clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip @@ -63,3 +63,11 @@ __device__ void test_div_fmas_f32(double* out, float a, float b, float c, int d) __device__ void test_div_fmas_f64(double* out, double a, double b, double c, int d) { *out = __builtin_amdgcn_div_fmas(a, b, c, d); } + +// CIR-LABEL: @_Z15test_ds_swizzlePii +// CIR: cir.call_llvm_intrinsic "amdgcn.ds.swizzle" {{.*}} : (!s32i, !s32i) -> !s32i +// LLVM: define{{.*}} void @_Z15test_ds_swizzlePii +// LLVM: call{{.*}} i32 @llvm.amdgcn.ds.swizzle(i32 %{{.*}}, i32 32) +__device__ void test_ds_swizzle(int* out, int a) { + *out = __builtin_amdgcn_ds_swizzle(a, 32); +} _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
