Author: Andrzej Warzyński Date: 2026-05-24T18:57:47+01:00 New Revision: eceae62c84049e07b945d4912654c04c33d2c5ae
URL: https://github.com/llvm/llvm-project/commit/eceae62c84049e07b945d4912654c04c33d2c5ae DIFF: https://github.com/llvm/llvm-project/commit/eceae62c84049e07b945d4912654c04c33d2c5ae.diff LOG: [clang][CIR][nfc] Remove redundant code + update run lines (#199049) This is just a minor clean-up post #186119. Added: Modified: clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp clang/test/CodeGen/AArch64/neon/getset.c Removed: ################################################################################ diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp index 5333c1b5c0277..811959eca7124 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp @@ -2393,8 +2393,6 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned builtinID, const CallExpr *expr, case NEON::BI__builtin_neon_vdupb_lane_mf8: case NEON::BI__builtin_neon_vgetq_lane_mf8: case NEON::BI__builtin_neon_vdupb_laneq_mf8: - return cir::VecExtractOp::create(builder, loc, ops[0], - emitScalarExpr(expr->getArg(1))); case NEON::BI__builtin_neon_vget_lane_i16: case NEON::BI__builtin_neon_vduph_lane_i16: case NEON::BI__builtin_neon_vgetq_lane_i16: @@ -2409,8 +2407,6 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned builtinID, const CallExpr *expr, case NEON::BI__builtin_neon_vdupd_lane_f64: case NEON::BI__builtin_neon_vgetq_lane_i64: case NEON::BI__builtin_neon_vdupd_laneq_i64: - return cir::VecExtractOp::create(builder, loc, ops[0], - emitScalarExpr(expr->getArg(1))); case NEON::BI__builtin_neon_vget_lane_f32: case NEON::BI__builtin_neon_vget_lane_f64: case NEON::BI__builtin_neon_vgetq_lane_f32: diff --git a/clang/test/CodeGen/AArch64/neon/getset.c b/clang/test/CodeGen/AArch64/neon/getset.c index 1b9087f22fe81..6368de7665f26 100644 --- a/clang/test/CodeGen/AArch64/neon/getset.c +++ b/clang/test/CodeGen/AArch64/neon/getset.c @@ -1,8 +1,8 @@ // REQUIRES: aarch64-registered-target || arm-registered-target -// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -disable-O0-optnone -flax-vector-conversions=none -emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefixes=ALL,LLVM -// RUN: %if cir-enabled %{%clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -disable-O0-optnone -flax-vector-conversions=none -fclangir -emit-llvm -o - %s | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefixes=ALL,LLVM %} -// RUN: %if cir-enabled %{%clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -disable-O0-optnone -flax-vector-conversions=none -fclangir -emit-cir -o - %s | FileCheck %s --check-prefixes=ALL,CIR %} +// RUN: %clang_cc1_cg_arm64_neon -emit-llvm %s -disable-O0-optnone | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefixes=ALL,LLVM +// RUN: %if cir-enabled %{%clang_cc1_cg_arm64_neon -fclangir -emit-llvm %s -disable-O0-optnone | opt -S -passes=mem2reg,sroa | FileCheck %s --check-prefixes=ALL,LLVM %} +// RUN: %if cir-enabled %{%clang_cc1_cg_arm64_neon -fclangir -emit-cir %s -disable-O0-optnone | FileCheck %s --check-prefixes=ALL,CIR %} //============================================================================= // NOTES _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
