================
@@ -205,8 +205,13 @@ BitVector HexagonRegisterInfo::getReservedRegs(const
MachineFunction &MF)
for (auto Reg : Hexagon_MC::GetVectRegRev())
Reserved.set(Reg);
- if (MF.getSubtarget<HexagonSubtarget>().hasReservedR19())
- Reserved.set(Hexagon::R19);
+ static const MCPhysReg RRegs[] = {
----------------
quic-santdas wrote:
MCPhysReg has lesser storage requirements vs Register class. The LLVM
convention is that for static tables with known physical registers, we use
MCPhysReg. Functionally they should be same.
https://github.com/llvm/llvm-project/pull/197208
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