llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-x86 Author: SiHuaN (sihuan) <details> <summary>Changes</summary> Add header wrappers for pmseq/pmsne/pmslt[u]/pmsgt[u]/pmsge[u]/pmsle[u] as element-wise vector comparisons cast to the unsigned result type. --- Patch is 90.62 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/203191.diff 3 Files Affected: - (modified) clang/lib/Headers/riscv_packed_simd.h (+71) - (modified) clang/test/CodeGen/RISCV/rvp-intrinsics.c (+1444) - (modified) cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c (+444) ``````````diff diff --git a/clang/lib/Headers/riscv_packed_simd.h b/clang/lib/Headers/riscv_packed_simd.h index 828cb90f8034a..39f2f4cd2c704 100644 --- a/clang/lib/Headers/riscv_packed_simd.h +++ b/clang/lib/Headers/riscv_packed_simd.h @@ -86,6 +86,12 @@ typedef uint32_t uint32x2_t __attribute__((__vector_size__(8))); __builtin_elementwise_add_sat(__rs1, __rs1), __rs2); \ } +#define __packed_cmp(name, ty, rty, op) \ + static __inline__ rty __DEFAULT_FN_ATTRS __riscv_##name(ty __rs1, \ + ty __rs2) { \ + return (rty)(__rs1 op __rs2); \ + } + // clang-format off: macro call sites have no trailing semicolons, which // confuses clang-format into a deeply nested expression. @@ -213,6 +219,70 @@ __packed_binary_builtin(pmaxu_u8x8, uint8x8_t, __builtin_elementwise_max) __packed_binary_builtin(pmaxu_u16x4, uint16x4_t, __builtin_elementwise_max) __packed_binary_builtin(pmaxu_u32x2, uint32x2_t, __builtin_elementwise_max) +/* Packed Comparison (32-bit) */ +__packed_cmp(pmseq_i8x4_u8x4, int8x4_t, uint8x4_t, ==) +__packed_cmp(pmseq_u8x4_u8x4, uint8x4_t, uint8x4_t, ==) +__packed_cmp(pmsne_i8x4_u8x4, int8x4_t, uint8x4_t, !=) +__packed_cmp(pmsne_u8x4_u8x4, uint8x4_t, uint8x4_t, !=) +__packed_cmp(pmslt_u8x4, int8x4_t, uint8x4_t, <) +__packed_cmp(pmsltu_u8x4, uint8x4_t, uint8x4_t, <) +__packed_cmp(pmsgt_u8x4, int8x4_t, uint8x4_t, >) +__packed_cmp(pmsgtu_u8x4, uint8x4_t, uint8x4_t, >) +__packed_cmp(pmsge_u8x4, int8x4_t, uint8x4_t, >=) +__packed_cmp(pmsgeu_u8x4, uint8x4_t, uint8x4_t, >=) +__packed_cmp(pmsle_u8x4, int8x4_t, uint8x4_t, <=) +__packed_cmp(pmsleu_u8x4, uint8x4_t, uint8x4_t, <=) +__packed_cmp(pmseq_i16x2_u16x2, int16x2_t, uint16x2_t, ==) +__packed_cmp(pmseq_u16x2_u16x2, uint16x2_t, uint16x2_t, ==) +__packed_cmp(pmsne_i16x2_u16x2, int16x2_t, uint16x2_t, !=) +__packed_cmp(pmsne_u16x2_u16x2, uint16x2_t, uint16x2_t, !=) +__packed_cmp(pmslt_u16x2, int16x2_t, uint16x2_t, <) +__packed_cmp(pmsltu_u16x2, uint16x2_t, uint16x2_t, <) +__packed_cmp(pmsgt_u16x2, int16x2_t, uint16x2_t, >) +__packed_cmp(pmsgtu_u16x2, uint16x2_t, uint16x2_t, >) +__packed_cmp(pmsge_u16x2, int16x2_t, uint16x2_t, >=) +__packed_cmp(pmsgeu_u16x2, uint16x2_t, uint16x2_t, >=) +__packed_cmp(pmsle_u16x2, int16x2_t, uint16x2_t, <=) +__packed_cmp(pmsleu_u16x2, uint16x2_t, uint16x2_t, <=) + +/* Packed Comparison (64-bit) */ +__packed_cmp(pmseq_i8x8_u8x8, int8x8_t, uint8x8_t, ==) +__packed_cmp(pmseq_u8x8_u8x8, uint8x8_t, uint8x8_t, ==) +__packed_cmp(pmsne_i8x8_u8x8, int8x8_t, uint8x8_t, !=) +__packed_cmp(pmsne_u8x8_u8x8, uint8x8_t, uint8x8_t, !=) +__packed_cmp(pmslt_u8x8, int8x8_t, uint8x8_t, <) +__packed_cmp(pmsltu_u8x8, uint8x8_t, uint8x8_t, <) +__packed_cmp(pmsgt_u8x8, int8x8_t, uint8x8_t, >) +__packed_cmp(pmsgtu_u8x8, uint8x8_t, uint8x8_t, >) +__packed_cmp(pmsge_u8x8, int8x8_t, uint8x8_t, >=) +__packed_cmp(pmsgeu_u8x8, uint8x8_t, uint8x8_t, >=) +__packed_cmp(pmsle_u8x8, int8x8_t, uint8x8_t, <=) +__packed_cmp(pmsleu_u8x8, uint8x8_t, uint8x8_t, <=) +__packed_cmp(pmseq_i16x4_u16x4, int16x4_t, uint16x4_t, ==) +__packed_cmp(pmseq_u16x4_u16x4, uint16x4_t, uint16x4_t, ==) +__packed_cmp(pmsne_i16x4_u16x4, int16x4_t, uint16x4_t, !=) +__packed_cmp(pmsne_u16x4_u16x4, uint16x4_t, uint16x4_t, !=) +__packed_cmp(pmslt_u16x4, int16x4_t, uint16x4_t, <) +__packed_cmp(pmsltu_u16x4, uint16x4_t, uint16x4_t, <) +__packed_cmp(pmsgt_u16x4, int16x4_t, uint16x4_t, >) +__packed_cmp(pmsgtu_u16x4, uint16x4_t, uint16x4_t, >) +__packed_cmp(pmsge_u16x4, int16x4_t, uint16x4_t, >=) +__packed_cmp(pmsgeu_u16x4, uint16x4_t, uint16x4_t, >=) +__packed_cmp(pmsle_u16x4, int16x4_t, uint16x4_t, <=) +__packed_cmp(pmsleu_u16x4, uint16x4_t, uint16x4_t, <=) +__packed_cmp(pmseq_i32x2_u32x2, int32x2_t, uint32x2_t, ==) +__packed_cmp(pmseq_u32x2_u32x2, uint32x2_t, uint32x2_t, ==) +__packed_cmp(pmsne_i32x2_u32x2, int32x2_t, uint32x2_t, !=) +__packed_cmp(pmsne_u32x2_u32x2, uint32x2_t, uint32x2_t, !=) +__packed_cmp(pmslt_u32x2, int32x2_t, uint32x2_t, <) +__packed_cmp(pmsltu_u32x2, uint32x2_t, uint32x2_t, <) +__packed_cmp(pmsgt_u32x2, int32x2_t, uint32x2_t, >) +__packed_cmp(pmsgtu_u32x2, uint32x2_t, uint32x2_t, >) +__packed_cmp(pmsge_u32x2, int32x2_t, uint32x2_t, >=) +__packed_cmp(pmsgeu_u32x2, uint32x2_t, uint32x2_t, >=) +__packed_cmp(pmsle_u32x2, int32x2_t, uint32x2_t, <=) +__packed_cmp(pmsleu_u32x2, uint32x2_t, uint32x2_t, <=) + /* Packed Shifts (32-bit) */ __packed_shift8(psll_s_u8x4, uint8x4_t, <<) __packed_shift8(psll_s_i8x4, int8x4_t, <<) @@ -297,6 +367,7 @@ __packed_unary_op(pnot_u32x2, uint32x2_t, ~) #undef __packed_binary_builtin #undef __packed_sh1add #undef __packed_sh1sadd +#undef __packed_cmp #undef __DEFAULT_FN_ATTRS #if defined(__cplusplus) diff --git a/clang/test/CodeGen/RISCV/rvp-intrinsics.c b/clang/test/CodeGen/RISCV/rvp-intrinsics.c index 73db0bee19def..71fb5eb1f0e25 100644 --- a/clang/test/CodeGen/RISCV/rvp-intrinsics.c +++ b/clang/test/CodeGen/RISCV/rvp-intrinsics.c @@ -2107,6 +2107,1450 @@ uint16x4_t test_pmaxu_u16x4(uint16x4_t a, uint16x4_t b) { uint32x2_t test_pmaxu_u32x2(uint32x2_t a, uint32x2_t b) { return __riscv_pmaxu_u32x2(a, b); } +/* Packed Comparison (32-bit) */ + +// RV32-LABEL: define dso_local i32 @test_pmseq_i8x4_u8x4( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV32-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV32-NEXT: [[CMP_I:%.*]] = icmp eq <4 x i8> [[TMP0]], [[TMP1]] +// RV32-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV32-NEXT: ret i32 [[TMP2]] +// +// RV64-LABEL: define dso_local i32 @test_pmseq_i8x4_u8x4( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV64-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV64-NEXT: [[CMP_I:%.*]] = icmp eq <4 x i8> [[TMP0]], [[TMP1]] +// RV64-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV64-NEXT: ret i32 [[TMP2]] +// +uint8x4_t test_pmseq_i8x4_u8x4(int8x4_t a, int8x4_t b) { + return __riscv_pmseq_i8x4_u8x4(a, b); +} + +// RV32-LABEL: define dso_local i32 @test_pmseq_u8x4_u8x4( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV32-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV32-NEXT: [[CMP_I:%.*]] = icmp eq <4 x i8> [[TMP0]], [[TMP1]] +// RV32-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV32-NEXT: ret i32 [[TMP2]] +// +// RV64-LABEL: define dso_local i32 @test_pmseq_u8x4_u8x4( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV64-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV64-NEXT: [[CMP_I:%.*]] = icmp eq <4 x i8> [[TMP0]], [[TMP1]] +// RV64-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV64-NEXT: ret i32 [[TMP2]] +// +uint8x4_t test_pmseq_u8x4_u8x4(uint8x4_t a, uint8x4_t b) { + return __riscv_pmseq_u8x4_u8x4(a, b); +} + +// RV32-LABEL: define dso_local i32 @test_pmsne_i8x4_u8x4( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV32-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV32-NEXT: [[CMP_I:%.*]] = icmp ne <4 x i8> [[TMP0]], [[TMP1]] +// RV32-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV32-NEXT: ret i32 [[TMP2]] +// +// RV64-LABEL: define dso_local i32 @test_pmsne_i8x4_u8x4( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV64-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV64-NEXT: [[CMP_I:%.*]] = icmp ne <4 x i8> [[TMP0]], [[TMP1]] +// RV64-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV64-NEXT: ret i32 [[TMP2]] +// +uint8x4_t test_pmsne_i8x4_u8x4(int8x4_t a, int8x4_t b) { + return __riscv_pmsne_i8x4_u8x4(a, b); +} + +// RV32-LABEL: define dso_local i32 @test_pmsne_u8x4_u8x4( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV32-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV32-NEXT: [[CMP_I:%.*]] = icmp ne <4 x i8> [[TMP0]], [[TMP1]] +// RV32-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV32-NEXT: ret i32 [[TMP2]] +// +// RV64-LABEL: define dso_local i32 @test_pmsne_u8x4_u8x4( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV64-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV64-NEXT: [[CMP_I:%.*]] = icmp ne <4 x i8> [[TMP0]], [[TMP1]] +// RV64-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV64-NEXT: ret i32 [[TMP2]] +// +uint8x4_t test_pmsne_u8x4_u8x4(uint8x4_t a, uint8x4_t b) { + return __riscv_pmsne_u8x4_u8x4(a, b); +} + +// RV32-LABEL: define dso_local i32 @test_pmslt_u8x4( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV32-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV32-NEXT: [[CMP_I:%.*]] = icmp slt <4 x i8> [[TMP0]], [[TMP1]] +// RV32-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV32-NEXT: ret i32 [[TMP2]] +// +// RV64-LABEL: define dso_local i32 @test_pmslt_u8x4( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV64-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV64-NEXT: [[CMP_I:%.*]] = icmp slt <4 x i8> [[TMP0]], [[TMP1]] +// RV64-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV64-NEXT: ret i32 [[TMP2]] +// +uint8x4_t test_pmslt_u8x4(int8x4_t a, int8x4_t b) { + return __riscv_pmslt_u8x4(a, b); +} + +// RV32-LABEL: define dso_local i32 @test_pmsltu_u8x4( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV32-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV32-NEXT: [[CMP_I:%.*]] = icmp ult <4 x i8> [[TMP0]], [[TMP1]] +// RV32-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV32-NEXT: ret i32 [[TMP2]] +// +// RV64-LABEL: define dso_local i32 @test_pmsltu_u8x4( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV64-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV64-NEXT: [[CMP_I:%.*]] = icmp ult <4 x i8> [[TMP0]], [[TMP1]] +// RV64-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV64-NEXT: ret i32 [[TMP2]] +// +uint8x4_t test_pmsltu_u8x4(uint8x4_t a, uint8x4_t b) { + return __riscv_pmsltu_u8x4(a, b); +} + +// RV32-LABEL: define dso_local i32 @test_pmsgt_u8x4( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV32-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV32-NEXT: [[CMP_I:%.*]] = icmp sgt <4 x i8> [[TMP0]], [[TMP1]] +// RV32-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV32-NEXT: ret i32 [[TMP2]] +// +// RV64-LABEL: define dso_local i32 @test_pmsgt_u8x4( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV64-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV64-NEXT: [[CMP_I:%.*]] = icmp sgt <4 x i8> [[TMP0]], [[TMP1]] +// RV64-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV64-NEXT: ret i32 [[TMP2]] +// +uint8x4_t test_pmsgt_u8x4(int8x4_t a, int8x4_t b) { + return __riscv_pmsgt_u8x4(a, b); +} + +// RV32-LABEL: define dso_local i32 @test_pmsgtu_u8x4( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV32-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV32-NEXT: [[CMP_I:%.*]] = icmp ugt <4 x i8> [[TMP0]], [[TMP1]] +// RV32-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV32-NEXT: ret i32 [[TMP2]] +// +// RV64-LABEL: define dso_local i32 @test_pmsgtu_u8x4( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV64-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV64-NEXT: [[CMP_I:%.*]] = icmp ugt <4 x i8> [[TMP0]], [[TMP1]] +// RV64-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV64-NEXT: ret i32 [[TMP2]] +// +uint8x4_t test_pmsgtu_u8x4(uint8x4_t a, uint8x4_t b) { + return __riscv_pmsgtu_u8x4(a, b); +} + +// RV32-LABEL: define dso_local i32 @test_pmsge_u8x4( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV32-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV32-NEXT: [[CMP_I:%.*]] = icmp sge <4 x i8> [[TMP0]], [[TMP1]] +// RV32-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV32-NEXT: ret i32 [[TMP2]] +// +// RV64-LABEL: define dso_local i32 @test_pmsge_u8x4( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV64-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV64-NEXT: [[CMP_I:%.*]] = icmp sge <4 x i8> [[TMP0]], [[TMP1]] +// RV64-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV64-NEXT: ret i32 [[TMP2]] +// +uint8x4_t test_pmsge_u8x4(int8x4_t a, int8x4_t b) { + return __riscv_pmsge_u8x4(a, b); +} + +// RV32-LABEL: define dso_local i32 @test_pmsgeu_u8x4( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV32-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV32-NEXT: [[CMP_I:%.*]] = icmp uge <4 x i8> [[TMP0]], [[TMP1]] +// RV32-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV32-NEXT: ret i32 [[TMP2]] +// +// RV64-LABEL: define dso_local i32 @test_pmsgeu_u8x4( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV64-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV64-NEXT: [[CMP_I:%.*]] = icmp uge <4 x i8> [[TMP0]], [[TMP1]] +// RV64-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV64-NEXT: ret i32 [[TMP2]] +// +uint8x4_t test_pmsgeu_u8x4(uint8x4_t a, uint8x4_t b) { + return __riscv_pmsgeu_u8x4(a, b); +} + +// RV32-LABEL: define dso_local i32 @test_pmsle_u8x4( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV32-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV32-NEXT: [[CMP_I:%.*]] = icmp sle <4 x i8> [[TMP0]], [[TMP1]] +// RV32-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV32-NEXT: ret i32 [[TMP2]] +// +// RV64-LABEL: define dso_local i32 @test_pmsle_u8x4( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV64-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV64-NEXT: [[CMP_I:%.*]] = icmp sle <4 x i8> [[TMP0]], [[TMP1]] +// RV64-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV64-NEXT: ret i32 [[TMP2]] +// +uint8x4_t test_pmsle_u8x4(int8x4_t a, int8x4_t b) { + return __riscv_pmsle_u8x4(a, b); +} + +// RV32-LABEL: define dso_local i32 @test_pmsleu_u8x4( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV32-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV32-NEXT: [[CMP_I:%.*]] = icmp ule <4 x i8> [[TMP0]], [[TMP1]] +// RV32-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV32-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV32-NEXT: ret i32 [[TMP2]] +// +// RV64-LABEL: define dso_local i32 @test_pmsleu_u8x4( +// RV64-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV64-NEXT: [[ENTRY:.*:]] +// RV64-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <4 x i8> +// RV64-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <4 x i8> +// RV64-NEXT: [[CMP_I:%.*]] = icmp ule <4 x i8> [[TMP0]], [[TMP1]] +// RV64-NEXT: [[SEXT_I:%.*]] = sext <4 x i1> [[CMP_I]] to <4 x i8> +// RV64-NEXT: [[TMP2:%.*]] = bitcast <4 x i8> [[SEXT_I]] to i32 +// RV64-NEXT: ret i32 [[TMP2]] +// +uint8x4_t test_pmsleu_u8x4(uint8x4_t a, uint8x4_t b) { + return __riscv_pmsleu_u8x4(a, b); +} + +// RV32-LABEL: define dso_local i32 @test_pmseq_i16x2_u16x2( +// RV32-SAME: i32 noundef [[A_COERCE:%.*]], i32 noundef [[B_COERCE:%.*]]) #[[ATTR0]] { +// RV32-NEXT: [[ENTRY:.*:]] +// RV32-NEXT: [[TMP0:%.*]] = bitcast i32 [[A_COERCE]] to <2 x i16> +// RV32-NEXT: [[TMP1:%.*]] = bitcast i32 [[B_COERCE]] to <2 x i16> +// RV32-NEXT: [[CMP_I:%.*]] = icmp eq <2 x i16> [[TMP0]], [[TMP1]] +// RV32-NEXT: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i16> +// RV... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/203191 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
