================
@@ -0,0 +1,266 @@
+// REQUIRES: aarch64-registered-target || arm-registered-target
+
+// RUN: %clang_cc1_cg_arm64_neon -emit-llvm %s
-disable-O0-optnone | opt -S -passes=mem2reg,sroa | FileCheck %s
--check-prefixes=LLVM
+// RUN: %if cir-enabled %{%clang_cc1_cg_arm64_neon -fclangir -emit-llvm %s
-disable-O0-optnone | opt -S -passes=mem2reg,sroa | FileCheck %s
--check-prefixes=LLVM %}
+// RUN: %if cir-enabled %{%clang_cc1_cg_arm64_neon -fclangir -emit-cir %s
-disable-O0-optnone | FileCheck %s
--check-prefixes=CIR %}
+
+//=============================================================================
+// NOTES
+//
+// Tests for vector permutation intrinsics: Subtraction, Widening subtraction,
Narrowing subtraction and Saturating subtract elements.
----------------
banach-space wrote:
;-)
```suggestion
// Tests for vector subtraction intrinsics: Subtraction, Widening subtraction,
Narrowing subtraction and Saturating subtract elements.
```
https://github.com/llvm/llvm-project/pull/202857
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