[clang] [llvm] [RISCV][LLVM][Clang] Add experimental `Zvvm` config intrinsics (PR #203774)

[Craig Topper via cfe-commits]

================
@@ -11738,6 +12000,10 @@ SDValue 
RISCVTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
   }
   case Intrinsic::experimental_get_vector_length:
     return lowerGetVectorLength(Op.getNode(), DAG, Subtarget);
+  case Intrinsic::riscv_ime_vlen:
----------------
topperc wrote:

Never mind we can't do that until we properly support vlen=32 with vscale 

https://github.com/llvm/llvm-project/pull/203774
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