https://github.com/lucaslive974 created https://github.com/llvm/llvm-project/pull/206388
### Implements X86 CIR codegen builtins: - __builtin_ia32_movnti - __builtin_ia32_movnti64 - __builtin_ia32_movntsd - __builtin_ia32_movntss Folow the original codegen architecture lowering to movntss call. Towards #167765. >From 6e7bd230fba9f12e0ad7c3b3ba0b289b79e59478 Mon Sep 17 00:00:00 2001 From: Lucas-Ribeiro-Lima <[email protected]> Date: Sun, 28 Jun 2026 22:46:31 -0300 Subject: [PATCH] [clang][CIR]: X86 movnti/movntsd/movntss CIR implementation. --- clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp | 16 ++++++++++ clang/test/CIR/CodeGen/builtins-x86.c | 34 ++++++++++++++++++++-- 2 files changed, 47 insertions(+), 3 deletions(-) diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp index 94fd16c6837a6..f8e8f98ebe2af 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp @@ -1859,6 +1859,22 @@ CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID, const CallExpr *expr) { mlir::Value sv = builder.createVecShuffle(loc, in, zero, indices); return builder.createBitcast(sv, ops[0].getType()); } + case X86::BI__builtin_ia32_movnti: + case X86::BI__builtin_ia32_movnti64: + case X86::BI__builtin_ia32_movntsd: + case X86::BI__builtin_ia32_movntss: { + mlir::Location loc = getLoc(expr->getExprLoc()); + + Address dest = Address{ops[0], CharUnits::One()}; + mlir::Value src = ops[1]; + + if (builtinID == X86::BI__builtin_ia32_movntsd || + builtinID == X86::BI__builtin_ia32_movntss) + src = builder.createExtractElement(loc, ops[1], 0); + + cir::StoreOp so = builder.createStore(loc, src, dest, false, true); + return so.getValue(); + }; case X86::BI__builtin_ia32_vprotbi: case X86::BI__builtin_ia32_vprotwi: case X86::BI__builtin_ia32_vprotdi: diff --git a/clang/test/CIR/CodeGen/builtins-x86.c b/clang/test/CIR/CodeGen/builtins-x86.c index f6991b4493f7f..2c8ebfd27eefb 100644 --- a/clang/test/CIR/CodeGen/builtins-x86.c +++ b/clang/test/CIR/CodeGen/builtins-x86.c @@ -1,8 +1,8 @@ -// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +avx512fp16 -target-feature +avx512bf16 -target-feature +avx512vl -fclangir -emit-cir %s -o %t.cir +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +avx512fp16 -target-feature +avx512bf16 -target-feature +avx512vl -target-feature +sse4a -fclangir -emit-cir %s -o %t.cir // RUN: FileCheck --input-file=%t.cir %s -check-prefix=CIR -// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +avx512fp16 -target-feature +avx512bf16 -target-feature +avx512vl -fclangir -emit-llvm %s -o %t.ll +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +avx512fp16 -target-feature +avx512bf16 -target-feature +avx512vl -target-feature +sse4a -fclangir -emit-llvm %s -o %t.ll // RUN: FileCheck --input-file=%t.ll %s -check-prefix=LLVM -// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +avx512fp16 -target-feature +avx512bf16 -target-feature +avx512vl -emit-llvm %s -o %t-ogcg.ll +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +avx512fp16 -target-feature +avx512bf16 -target-feature +avx512vl -target-feature +sse4a -emit-llvm %s -o %t-ogcg.ll // RUN: FileCheck --input-file=%t-ogcg.ll %s -check-prefix=OGCG void test_sfence(void) { @@ -261,3 +261,31 @@ void test_conditional_bzero(void) { : foo()) : __builtin_bzero(dst, len)); } + +void test_movnti(int dest, int src) { + // CIR-LABEL: test_movnti + // CIR: %[[VAL:.*]] = cir.load + // CIR: cir.store nontemporal {{.*}} %[[VAL]] + + // LLVM-LABEL: @test_movnti + // LLVM: store i32 %{{.*}}, ptr %{{.*}}, align 1, !nontemporal + + // OGCG-LABEL: @test_movnti + // OGCG: store i32 %{{.*}}, ptr %{{.*}}, align 1, !nontemporal + return __builtin_ia32_movnti(&dest, src); +} + +void test_movntss(float *dest, v4f src) { + // CIR-LABEL: test_movntss + // CIR: %[[ARR:.*]] = cir.load align(16) {{.*}} : !cir.ptr<!cir.vector<4 x !cir.float>> + // CIR: %[[IDX:.*]] = cir.const #cir.int<0> + // CIR: %[[SCALAR:.*]] = cir.vec.extract %[[ARR]][%[[IDX]] : !u64i] + // CIR: cir.store nontemporal align(1) %[[SCALAR]], {{.*}} : !cir.float, !cir.ptr<!cir.float> + + // LLVM-LABEL: @test_movntss + // LLVM: store float %{{.*}}, ptr %{{.*}}, align 1, !nontemporal + + // OGCG-LABEL: @test_movntss + // OGCG: store float %{{.*}}, ptr %{{.*}}, align 1, !nontemporal + return __builtin_ia32_movntss(dest, src); +} \ No newline at end of file _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
