github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp,c --
clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
clang/lib/Headers/riscv_packed_simd.h clang/test/CodeGen/RISCV/rvp-intrinsics.c
cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
llvm/lib/Target/RISCV/RISCVISelLowering.cpp --diff_from_common_commit
``````````
:warning:
The reproduction instructions above might return results for more than one PR
in a stack if you are using a stacked PR workflow. You can limit the results by
changing `origin/main` to the base branch/commit you want to compare against.
:warning:
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/clang/lib/Headers/riscv_packed_simd.h
b/clang/lib/Headers/riscv_packed_simd.h
index cdfa7ec58..6bd4a60d4 100644
--- a/clang/lib/Headers/riscv_packed_simd.h
+++ b/clang/lib/Headers/riscv_packed_simd.h
@@ -110,8 +110,8 @@ typedef uint32_t uint32x2_t
__attribute__((__vector_size__(8)));
}
#define __packed_merge_builtin(name, ty, mask_ty, builtin)
\
- static __inline__ ty __DEFAULT_FN_ATTRS __riscv_##name(
\
- ty __rs1, ty __rs2, mask_ty __rd) {
\
+ static __inline__ ty __DEFAULT_FN_ATTRS __riscv_##name(ty __rs1, ty __rs2,
\
+ mask_ty __rd) {
\
return (ty)builtin(__rs1, __rs2, __rd);
\
}
diff --git a/cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
b/cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
index 2efccb8ab..5460f1a4e 100644
--- a/cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
+++ b/cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
@@ -2121,19 +2121,22 @@ int8x4_t test_pmerge_mvmn_i8x4(int8x4_t rs2, int8x4_t
rs1, uint8x4_t rd) {
// CHECK-LABEL: test_pmerge_merge_u16x2:
// CHECK: merge
-uint16x2_t test_pmerge_merge_u16x2(uint16x2_t rd, uint16x2_t rs1, uint16x2_t
rs2) {
+uint16x2_t test_pmerge_merge_u16x2(uint16x2_t rd, uint16x2_t rs1,
+ uint16x2_t rs2) {
return __riscv_pmerge_u16x2(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvm_u16x2:
// CHECK: mvm
-uint16x2_t test_pmerge_mvm_u16x2(uint16x2_t rs1, uint16x2_t rd, uint16x2_t
rs2) {
+uint16x2_t test_pmerge_mvm_u16x2(uint16x2_t rs1, uint16x2_t rd,
+ uint16x2_t rs2) {
return __riscv_pmerge_u16x2(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvmn_u16x2:
// CHECK: mvmn
-uint16x2_t test_pmerge_mvmn_u16x2(uint16x2_t rs2, uint16x2_t rs1, uint16x2_t
rd) {
+uint16x2_t test_pmerge_mvmn_u16x2(uint16x2_t rs2, uint16x2_t rs1,
+ uint16x2_t rd) {
return __riscv_pmerge_u16x2(rs1, rs2, rd);
}
@@ -2200,21 +2203,24 @@ int8x8_t test_pmerge_mvmn_i8x8(int8x8_t rs2, int8x8_t
rs1, uint8x8_t rd) {
// CHECK-LABEL: test_pmerge_merge_u16x4:
// RV32-COUNT-2: merge
// RV64: merge
-uint16x4_t test_pmerge_merge_u16x4(uint16x4_t rd, uint16x4_t rs1, uint16x4_t
rs2) {
+uint16x4_t test_pmerge_merge_u16x4(uint16x4_t rd, uint16x4_t rs1,
+ uint16x4_t rs2) {
return __riscv_pmerge_u16x4(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvm_u16x4:
// RV32-COUNT-2: mvm
// RV64: mvm
-uint16x4_t test_pmerge_mvm_u16x4(uint16x4_t rs1, uint16x4_t rd, uint16x4_t
rs2) {
+uint16x4_t test_pmerge_mvm_u16x4(uint16x4_t rs1, uint16x4_t rd,
+ uint16x4_t rs2) {
return __riscv_pmerge_u16x4(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvmn_u16x4:
// RV32-COUNT-2: mvmn
// RV64: mvmn
-uint16x4_t test_pmerge_mvmn_u16x4(uint16x4_t rs2, uint16x4_t rs1, uint16x4_t
rd) {
+uint16x4_t test_pmerge_mvmn_u16x4(uint16x4_t rs2, uint16x4_t rs1,
+ uint16x4_t rd) {
return __riscv_pmerge_u16x4(rs1, rs2, rd);
}
@@ -2242,21 +2248,24 @@ int16x4_t test_pmerge_mvmn_i16x4(int16x4_t rs2,
int16x4_t rs1, uint16x4_t rd) {
// CHECK-LABEL: test_pmerge_merge_u32x2:
// RV32-COUNT-2: merge
// RV64: merge
-uint32x2_t test_pmerge_merge_u32x2(uint32x2_t rd, uint32x2_t rs1, uint32x2_t
rs2) {
+uint32x2_t test_pmerge_merge_u32x2(uint32x2_t rd, uint32x2_t rs1,
+ uint32x2_t rs2) {
return __riscv_pmerge_u32x2(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvm_u32x2:
// RV32-COUNT-2: mvm
// RV64: mvm
-uint32x2_t test_pmerge_mvm_u32x2(uint32x2_t rs1, uint32x2_t rd, uint32x2_t
rs2) {
+uint32x2_t test_pmerge_mvm_u32x2(uint32x2_t rs1, uint32x2_t rd,
+ uint32x2_t rs2) {
return __riscv_pmerge_u32x2(rs1, rs2, rd);
}
// CHECK-LABEL: test_pmerge_mvmn_u32x2:
// RV32-COUNT-2: mvmn
// RV64: mvmn
-uint32x2_t test_pmerge_mvmn_u32x2(uint32x2_t rs2, uint32x2_t rs1, uint32x2_t
rd) {
+uint32x2_t test_pmerge_mvmn_u32x2(uint32x2_t rs2, uint32x2_t rs1,
+ uint32x2_t rd) {
return __riscv_pmerge_u32x2(rs1, rs2, rd);
}
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index dd5bbabf3..641e93ebe 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -11853,12 +11853,12 @@ SDValue
RISCVTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
}
case Intrinsic::riscv_pmerge: {
EVT VT = Op.getValueType();
- auto buildMerge = [&](SDValue Rs1, SDValue Rs2, SDValue Mask, EVT
ResultVT) {
+ auto buildMerge = [&](SDValue Rs1, SDValue Rs2, SDValue Mask,
+ EVT ResultVT) {
MVT IntVT = MVT::getIntegerVT(ResultVT.getSizeInBits());
- SDValue Res = DAG.getNode(RISCVISD::MERGE, DL, IntVT,
- DAG.getBitcast(IntVT, Mask),
- DAG.getBitcast(IntVT, Rs1),
- DAG.getBitcast(IntVT, Rs2));
+ SDValue Res =
+ DAG.getNode(RISCVISD::MERGE, DL, IntVT, DAG.getBitcast(IntVT, Mask),
+ DAG.getBitcast(IntVT, Rs1), DAG.getBitcast(IntVT, Rs2));
return DAG.getBitcast(ResultVT, Res);
};
@@ -11877,8 +11877,7 @@ SDValue
RISCVTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
auto [MaskLo, MaskHi] = DAG.SplitVector(Mask, DL, HalfVT, HalfVT);
SDValue ResLo = buildMerge(Rs1Lo, Rs2Lo, MaskLo, HalfVT);
SDValue ResHi = buildMerge(Rs1Hi, Rs2Hi, MaskHi, HalfVT);
- SDValue Res =
- DAG.getNode(ISD::CONCAT_VECTORS, DL, WorkVT, ResLo, ResHi);
+ SDValue Res = DAG.getNode(ISD::CONCAT_VECTORS, DL, WorkVT, ResLo, ResHi);
return DAG.getBitcast(VT, Res);
}
``````````
</details>
https://github.com/llvm/llvm-project/pull/207110
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