================ @@ -0,0 +1,255 @@ +//===-- AMDGPUPrivateObjectVGPRs.cpp - Lower VGPR-as-memory accesses ------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +/// \file +/// Lowers the constant-index SI_VGPR_FRAME_{LOAD,STORE} pseudos for "VGPR as +/// memory" objects (addrspace(13)) into register copies to/from the block of +/// physical VGPRs backing the file: a load is a COPY from the file register, a +/// store a COPY to it. +/// +/// The file is a fixed block of VGPRs (SIRegisterInfo::getVGPRMemoryFile) +/// reserved out of allocation (getReservedRegs) and counted in the VGPR usage +/// (AMDGPUResourceUsageAnalysis). It sits just above the ABI inputs at a base +/// AMDGPULowerModuleVGPRs shares across the call graph (so an address resolves +/// to the same registers everywhere), low enough to cost only its own size +/// rather than pinning occupancy. This pass runs after register allocation; ---------------- rovka wrote:
Why do we need to do this after register allocation? The backing registers are reserved during regalloc anyway, so what's going to break if we lower these to their final form already during isel? (We'd also not hamper scheduling by pretending to have memory ops) https://github.com/llvm/llvm-project/pull/205435 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
