================
@@ -671,3 +671,370 @@ uint64x2_t test_vsubw_high_u32(uint64x2_t a, uint32x4_t
b) {
// LLVM: ret <2 x i64> [[SUB_I]]
return vsubw_high_u32(a, b);
}
+
+//===------------------------------------------------------===//
+// 2.1.1.5.4. Saturating subtract
+//
https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#saturating-subtract
+//===------------------------------------------------------===//
+
+// LLVM-LABEL: @test_vqsub_s8(
+// CIR-LABEL: @vqsub_s8(
+int8x8_t test_vqsub_s8(int8x8_t a, int8x8_t b) {
+// CIR: {{%.*}} = cir.call_llvm_intrinsic "aarch64.neon.sqsub" {{%.*}},
{{%.*}} : (!cir.vector<8 x !s8i>, !cir.vector<8 x !s8i>) -> !cir.vector<8 x
!s8i>
+
+// LLVM-SAME: <8 x i8> {{.*}} [[A:%.*]], <8 x i8> {{.*}} [[B:%.*]])
+// LLVM: [[VQSUB_V_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqsub.v8i8(<8 x
i8> [[A]], <8 x i8> [[B]])
+// LLVM: ret <8 x i8> [[VQSUB_V_I]]
+ return vqsub_s8(a, b);
+}
+
+// LLVM-LABEL: @test_vqsub_s16(
+// CIR-LABEL: @vqsub_s16(
+int16x4_t test_vqsub_s16(int16x4_t a, int16x4_t b) {
+// CIR: {{%.*}} = cir.call_llvm_intrinsic "aarch64.neon.sqsub" {{%.*}},
{{%.*}} : (!cir.vector<4 x !s16i>, !cir.vector<4 x !s16i>) -> !cir.vector<4 x
!s16i>
+
+// LLVM-SAME: <4 x i16> {{.*}} [[A:%.*]], <4 x i16> {{.*}} [[B:%.*]])
+// LLVM: [[TMP0:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>
+// LLVM: [[TMP1:%.*]] = bitcast <4 x i16> [[B]] to <8 x i8>
----------------
iamvickynguyen wrote:
Here is the PR https://github.com/llvm/llvm-project/pull/207894 btw :smile:
https://github.com/llvm/llvm-project/pull/207189
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