================ @@ -867,6 +867,8 @@ def VR : VReg<!listconcat(VM1VTs, VMaskVTs), let DecoderMethod = "DecodeSimpleRegisterClass<RISCV::V0, 32>"; } +// def VRV0V1 : VReg<!listconcat(VM1VTs, VMaskVTs), (add V0, V1), 1>; + ---------------- lukel97 wrote:
Looks like a leftover comment? https://github.com/llvm/llvm-project/pull/202533 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
