https://github.com/patricklapgar created https://github.com/llvm/llvm-project/pull/208380
- This PR replaces existing ARM builtin functions with TableGen. - The `.td` file produces identical header names and type signatures as the `.def` generated headers and types - The change has been tested via `clang-check` and `check-clang` which returns no errors or warnings >From 09eba99df52960f597326f60fcaaf74cd35369bc Mon Sep 17 00:00:00 2001 From: patricklapgar <[email protected]> Date: Wed, 8 Jul 2026 16:18:56 -0700 Subject: [PATCH] Replaced ARM builtin definitions w/ TableGen --- clang/include/clang/Basic/BuiltinsARM.def | 346 ------------------ clang/include/clang/Basic/BuiltinsARM.td | 354 +++++++++++++++++++ clang/include/clang/Basic/BuiltinsARMBase.td | 52 +++ clang/include/clang/Basic/CMakeLists.txt | 4 + clang/include/clang/Basic/TargetBuiltins.h | 5 +- clang/include/module.modulemap | 1 - clang/lib/Basic/Targets/ARM.cpp | 43 ++- 7 files changed, 439 insertions(+), 366 deletions(-) delete mode 100644 clang/include/clang/Basic/BuiltinsARM.def create mode 100644 clang/include/clang/Basic/BuiltinsARM.td create mode 100644 clang/include/clang/Basic/BuiltinsARMBase.td diff --git a/clang/include/clang/Basic/BuiltinsARM.def b/clang/include/clang/Basic/BuiltinsARM.def deleted file mode 100644 index 15debc7553bfe..0000000000000 --- a/clang/include/clang/Basic/BuiltinsARM.def +++ /dev/null @@ -1,346 +0,0 @@ -//===--- BuiltinsARM.def - ARM Builtin function database ----*- C++ -*-===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// -// -// This file defines the ARM-specific builtin function database. Users of -// this file must define the BUILTIN macro to make use of this information. -// -//===----------------------------------------------------------------------===// - -// The format of this database matches clang/Basic/Builtins.def. - -#if defined(BUILTIN) && !defined(LANGBUILTIN) -# define LANGBUILTIN(ID, TYPE, ATTRS, BUILTIN_LANG) BUILTIN(ID, TYPE, ATTRS) -#endif - -#if defined(BUILTIN) && !defined(TARGET_BUILTIN) -# define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS) -#endif - -#if defined(BUILTIN) && !defined(TARGET_HEADER_BUILTIN) -# define TARGET_HEADER_BUILTIN(ID, TYPE, ATTRS, HEADER, LANG, FEATURE) BUILTIN(ID, TYPE, ATTRS) -#endif - -// In libgcc -BUILTIN(__clear_cache, "vv*v*", "i") - -// 16-bit multiplications -BUILTIN(__builtin_arm_smulbb, "iii", "nc") -BUILTIN(__builtin_arm_smulbt, "iii", "nc") -BUILTIN(__builtin_arm_smultb, "iii", "nc") -BUILTIN(__builtin_arm_smultt, "iii", "nc") -BUILTIN(__builtin_arm_smulwb, "iii", "nc") -BUILTIN(__builtin_arm_smulwt, "iii", "nc") - -// Saturating arithmetic -BUILTIN(__builtin_arm_qadd, "iii", "nc") -BUILTIN(__builtin_arm_qsub, "iii", "nc") -BUILTIN(__builtin_arm_qdbl, "ii", "nc") -BUILTIN(__builtin_arm_ssat, "iiUi", "nc") -BUILTIN(__builtin_arm_usat, "UiiUi", "nc") - -BUILTIN(__builtin_arm_smlabb, "iiii", "nc") -BUILTIN(__builtin_arm_smlabt, "iiii", "nc") -BUILTIN(__builtin_arm_smlatb, "iiii", "nc") -BUILTIN(__builtin_arm_smlatt, "iiii", "nc") -BUILTIN(__builtin_arm_smlawb, "iiii", "nc") -BUILTIN(__builtin_arm_smlawt, "iiii", "nc") - -BUILTIN(__builtin_arm_ssat16, "iii", "nc") -BUILTIN(__builtin_arm_usat16, "iii", "nc") - -BUILTIN(__builtin_arm_sxtab16, "iii", "nc") -BUILTIN(__builtin_arm_sxtb16, "ii", "nc") -BUILTIN(__builtin_arm_uxtab16, "iii", "nc") -BUILTIN(__builtin_arm_uxtb16, "ii", "nc") - -BUILTIN(__builtin_arm_sel, "iii", "nc") - -BUILTIN(__builtin_arm_qadd8, "iii", "nc") -BUILTIN(__builtin_arm_qsub8, "iii", "nc") -BUILTIN(__builtin_arm_sadd8, "iii", "nc") -BUILTIN(__builtin_arm_shadd8, "iii", "nc") -BUILTIN(__builtin_arm_shsub8, "iii", "nc") -BUILTIN(__builtin_arm_ssub8, "iii", "nc") -BUILTIN(__builtin_arm_uadd8, "UiUiUi", "nc") -BUILTIN(__builtin_arm_uhadd8, "UiUiUi", "nc") -BUILTIN(__builtin_arm_uhsub8, "UiUiUi", "nc") -BUILTIN(__builtin_arm_uqadd8, "UiUiUi", "nc") -BUILTIN(__builtin_arm_uqsub8, "UiUiUi", "nc") -BUILTIN(__builtin_arm_usub8, "UiUiUi", "nc") - -// Sum of 8-bit absolute differences -BUILTIN(__builtin_arm_usad8, "UiUiUi", "nc") -BUILTIN(__builtin_arm_usada8, "UiUiUiUi", "nc") - -// Parallel 16-bit addition and subtraction -BUILTIN(__builtin_arm_qadd16, "iii", "nc") -BUILTIN(__builtin_arm_qasx, "iii", "nc") -BUILTIN(__builtin_arm_qsax, "iii", "nc") -BUILTIN(__builtin_arm_qsub16, "iii", "nc") -BUILTIN(__builtin_arm_sadd16, "iii", "nc") -BUILTIN(__builtin_arm_sasx, "iii", "nc") -BUILTIN(__builtin_arm_shadd16, "iii", "nc") -BUILTIN(__builtin_arm_shasx, "iii", "nc") -BUILTIN(__builtin_arm_shsax, "iii", "nc") -BUILTIN(__builtin_arm_shsub16, "iii", "nc") -BUILTIN(__builtin_arm_ssax, "iii", "nc") -BUILTIN(__builtin_arm_ssub16, "iii", "nc") -BUILTIN(__builtin_arm_uadd16, "UiUiUi", "nc") -BUILTIN(__builtin_arm_uasx, "UiUiUi", "nc") -BUILTIN(__builtin_arm_uhadd16, "UiUiUi", "nc") -BUILTIN(__builtin_arm_uhasx, "UiUiUi", "nc") -BUILTIN(__builtin_arm_uhsax, "UiUiUi", "nc") -BUILTIN(__builtin_arm_uhsub16, "UiUiUi", "nc") -BUILTIN(__builtin_arm_uqadd16, "UiUiUi", "nc") -BUILTIN(__builtin_arm_uqasx, "UiUiUi", "nc") -BUILTIN(__builtin_arm_uqsax, "UiUiUi", "nc") -BUILTIN(__builtin_arm_uqsub16, "UiUiUi", "nc") -BUILTIN(__builtin_arm_usax, "UiUiUi", "nc") -BUILTIN(__builtin_arm_usub16, "UiUiUi", "nc") - -// Parallel 16-bit multiplication -BUILTIN(__builtin_arm_smlad, "iiii", "nc") -BUILTIN(__builtin_arm_smladx, "iiii", "nc") -BUILTIN(__builtin_arm_smlald, "LLiiiLLi", "nc") -BUILTIN(__builtin_arm_smlaldx, "LLiiiLLi", "nc") -BUILTIN(__builtin_arm_smlsd, "iiii", "nc") -BUILTIN(__builtin_arm_smlsdx, "iiii", "nc") -BUILTIN(__builtin_arm_smlsld, "LLiiiLLi", "nc") -BUILTIN(__builtin_arm_smlsldx, "LLiiiLLi", "nc") -BUILTIN(__builtin_arm_smuad, "iii", "nc") -BUILTIN(__builtin_arm_smuadx, "iii", "nc") -BUILTIN(__builtin_arm_smusd, "iii", "nc") -BUILTIN(__builtin_arm_smusdx, "iii", "nc") - -// Bit manipulation -BUILTIN(__builtin_arm_rbit, "UiUi", "nc") -BUILTIN(__builtin_arm_clz, "UiZUi", "nc") -BUILTIN(__builtin_arm_clz64, "UiWUi", "nc") -BUILTIN(__builtin_arm_cls, "UiZUi", "nc") -BUILTIN(__builtin_arm_cls64, "UiWUi", "nc") - -// Store and load exclusive -BUILTIN(__builtin_arm_ldrexd, "v.", "t") -BUILTIN(__builtin_arm_strexd, "i.", "t") - -BUILTIN(__builtin_arm_ldrex, "v.", "t") -BUILTIN(__builtin_arm_ldaex, "v.", "t") -BUILTIN(__builtin_arm_strex, "i.", "t") -BUILTIN(__builtin_arm_stlex, "i.", "t") -BUILTIN(__builtin_arm_clrex, "v", "") - -// VFP -BUILTIN(__builtin_arm_get_fpscr, "Ui", "nc") -BUILTIN(__builtin_arm_set_fpscr, "vUi", "nc") -BUILTIN(__builtin_arm_vcvtr_f, "ffi", "nc") -BUILTIN(__builtin_arm_vcvtr_d, "fdi", "nc") - -// Coprocessor -BUILTIN(__builtin_arm_ldc, "vUIiUIivC*", "") -BUILTIN(__builtin_arm_ldcl, "vUIiUIivC*", "") -BUILTIN(__builtin_arm_ldc2, "vUIiUIivC*", "") -BUILTIN(__builtin_arm_ldc2l, "vUIiUIivC*", "") - -BUILTIN(__builtin_arm_stc, "vUIiUIiv*", "") -BUILTIN(__builtin_arm_stcl, "vUIiUIiv*", "") -BUILTIN(__builtin_arm_stc2, "vUIiUIiv*", "") -BUILTIN(__builtin_arm_stc2l, "vUIiUIiv*", "") - -BUILTIN(__builtin_arm_cdp, "vUIiUIiUIiUIiUIiUIi", "") -BUILTIN(__builtin_arm_cdp2, "vUIiUIiUIiUIiUIiUIi", "") -BUILTIN(__builtin_arm_mcr, "vUIiUIiUiUIiUIiUIi", "") -BUILTIN(__builtin_arm_mcr2, "vUIiUIiUiUIiUIiUIi", "") -BUILTIN(__builtin_arm_mrc, "UiUIiUIiUIiUIiUIi", "") -BUILTIN(__builtin_arm_mrc2, "UiUIiUIiUIiUIiUIi", "") -BUILTIN(__builtin_arm_mcrr, "vUIiUIiLLUiUIi", "") -BUILTIN(__builtin_arm_mcrr2, "vUIiUIiLLUiUIi", "") -BUILTIN(__builtin_arm_mrrc, "LLUiUIiUIiUIi", "") -BUILTIN(__builtin_arm_mrrc2, "LLUiUIiUIiUIi", "") - -// CRC32 -TARGET_BUILTIN(__builtin_arm_crc32b, "UiUiUc", "nc", "crc") -TARGET_BUILTIN(__builtin_arm_crc32cb, "UiUiUc", "nc", "crc") -TARGET_BUILTIN(__builtin_arm_crc32h, "UiUiUs", "nc", "crc") -TARGET_BUILTIN(__builtin_arm_crc32ch, "UiUiUs", "nc", "crc") -TARGET_BUILTIN(__builtin_arm_crc32w, "UiUiUi", "nc", "crc") -TARGET_BUILTIN(__builtin_arm_crc32cw, "UiUiUi", "nc", "crc") -TARGET_BUILTIN(__builtin_arm_crc32d, "UiUiLLUi", "nc", "crc") -TARGET_BUILTIN(__builtin_arm_crc32cd, "UiUiLLUi", "nc", "crc") - -// ARMv8-M Security Extensions a.k.a CMSE -BUILTIN(__builtin_arm_cmse_TT, "Uiv*", "n") -BUILTIN(__builtin_arm_cmse_TTT, "Uiv*", "n") -BUILTIN(__builtin_arm_cmse_TTA, "Uiv*", "n") -BUILTIN(__builtin_arm_cmse_TTAT, "Uiv*", "n") - -// HINT -BUILTIN(__builtin_arm_nop, "v", "") -BUILTIN(__builtin_arm_yield, "v", "") -BUILTIN(__builtin_arm_wfe, "v", "") -BUILTIN(__builtin_arm_wfi, "v", "") -BUILTIN(__builtin_arm_sev, "v", "") -BUILTIN(__builtin_arm_sevl, "v", "") -BUILTIN(__builtin_arm_dbg, "vUi", "") -TARGET_HEADER_BUILTIN(__yield, "v", "h", ARM_ACLE_H, ALL_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__wfe, "v", "h", ARM_ACLE_H, ALL_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__wfi, "v", "h", ARM_ACLE_H, ALL_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__sev, "v", "h", ARM_ACLE_H, ALL_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__sevl, "v", "h", ARM_ACLE_H, ALL_LANGUAGES, "") - -// Data barrier -BUILTIN(__builtin_arm_dmb, "vUi", "nc") -BUILTIN(__builtin_arm_dsb, "vUi", "nc") -BUILTIN(__builtin_arm_isb, "vUi", "nc") -TARGET_HEADER_BUILTIN(__dmb, "vUi", "nch", ARM_ACLE_H, ALL_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__dsb, "vUi", "nch", ARM_ACLE_H, ALL_LANGUAGES, "") -TARGET_HEADER_BUILTIN(__isb, "vUi", "nch", ARM_ACLE_H, ALL_LANGUAGES, "") - -// Prefetch -BUILTIN(__builtin_arm_prefetch, "vvC*UiUi", "nc") - -// System registers (ACLE) -BUILTIN(__builtin_arm_rsr, "UicC*", "nc") -BUILTIN(__builtin_arm_rsr64, "LLUicC*", "nc") -BUILTIN(__builtin_arm_rsrp, "v*cC*", "nc") -BUILTIN(__builtin_arm_wsr, "vcC*Ui", "nc") -BUILTIN(__builtin_arm_wsr64, "vcC*LLUi", "nc") -BUILTIN(__builtin_arm_wsrp, "vcC*vC*", "nc") - -// Misc -BUILTIN(__builtin_sponentry, "v*", "c") - -// MSVC -LANGBUILTIN(__emit, "vIUiC", "", ALL_MS_LANGUAGES) - -LANGBUILTIN(__ldrexd, "WiWiCD*", "", ALL_MS_LANGUAGES) -LANGBUILTIN(_MoveFromCoprocessor, "UiIUiIUiIUiIUiIUi", "", ALL_MS_LANGUAGES) -LANGBUILTIN(_MoveFromCoprocessor2, "UiIUiIUiIUiIUiIUi", "", ALL_MS_LANGUAGES) -LANGBUILTIN(_MoveToCoprocessor, "vUiIUiIUiIUiIUiIUi", "", ALL_MS_LANGUAGES) -LANGBUILTIN(_MoveToCoprocessor2, "vUiIUiIUiIUiIUiIUi", "", ALL_MS_LANGUAGES) - -TARGET_HEADER_BUILTIN(_BitScanForward, "UcUNi*UNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_BitScanReverse, "UcUNi*UNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_BitScanForward64, "UcUNi*ULLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_BitScanReverse64, "UcUNi*ULLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedAnd64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement64, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeSub64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement64, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor64, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd_acq, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd_rel, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd_nf, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd8_acq, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd8_rel, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd8_nf, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd16_acq, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd16_rel, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd16_nf, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64_acq, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64_rel, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangeAdd64_nf, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedExchange8_acq, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange8_nf, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange8_rel, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange16_acq, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange16_nf, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange16_rel, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange_acq, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange_nf, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange_rel, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange64_acq, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange64_nf, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchange64_rel, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangePointer_acq, "v*v*D*v*","nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangePointer_nf, "v*v*D*v*","nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedExchangePointer_rel, "v*v*D*v*","nh", INTRIN_H, ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange8_acq, "ccD*cc", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange8_nf, "ccD*cc", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange8_rel, "ccD*cc", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange16_acq, "ssD*ss", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange16_nf, "ssD*ss", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange16_rel, "ssD*ss", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange_acq, "NiNiD*NiNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange_nf, "NiNiD*NiNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange_rel, "NiNiD*NiNi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange64_acq, "LLiLLiD*LLiLLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange64_nf, "LLiLLiD*LLiLLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchange64_rel, "LLiLLiD*LLiLLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchangePointer_acq, "v*v*D*v*v*","nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedCompareExchangePointer_rel, "v*v*D*v*v*","nh", INTRIN_H, ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedOr8_acq, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr8_nf, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr8_rel, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr16_acq, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr16_nf, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr16_rel, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr_acq, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr_nf, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr_rel, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr64_acq, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr64_nf, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedOr64_rel, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedXor8_acq, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor8_nf, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor8_rel, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor16_acq, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor16_nf, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor16_rel, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor_acq, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor_nf, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor_rel, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor64_acq, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor64_nf, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedXor64_rel, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedAnd8_acq, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd8_nf, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd8_rel, "ccD*c", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd16_acq, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd16_nf, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd16_rel, "ssD*s", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd_acq, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd_nf, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd_rel, "NiNiD*Ni", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd64_acq, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd64_nf, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedAnd64_rel, "LLiLLiD*LLi", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedIncrement16_acq, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement16_nf, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement16_rel, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement_acq, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement_nf, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement_rel, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement64_acq, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement64_nf, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedIncrement64_rel, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") - -TARGET_HEADER_BUILTIN(_InterlockedDecrement16_acq, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement16_nf, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement16_rel, "ssD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement_acq, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement_nf, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement_rel, "NiNiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement64_acq, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement64_nf, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") -TARGET_HEADER_BUILTIN(_InterlockedDecrement64_rel, "LLiLLiD*", "nh", INTRIN_H, ALL_MS_LANGUAGES, "") - -#undef BUILTIN -#undef LANGBUILTIN -#undef TARGET_BUILTIN -#undef TARGET_HEADER_BUILTIN diff --git a/clang/include/clang/Basic/BuiltinsARM.td b/clang/include/clang/Basic/BuiltinsARM.td new file mode 100644 index 0000000000000..83f354b034c4f --- /dev/null +++ b/clang/include/clang/Basic/BuiltinsARM.td @@ -0,0 +1,354 @@ +//==- BuiltinsARM.td - ARM Builtin function database -------*- C++ -*-==// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the ARM-specific builtin function database. +// +//===----------------------------------------------------------------------===// + +// The format of this database matches clang/Basic/Builtins.def + +include "clang/Basic/BuiltinsARMBase.td" + +// In libgcc +let Attributes = [RuntimeLibraryFunction] in { + def __clear_cache : ARMNoPrefixBuiltin<"void (void *, void *)">; +} + +// 16-bit multiplications +let Attributes = [NoThrow, Const] in { + def smulbb : ARMBuiltin<"int (int, int)">; + def smulbt : ARMBuiltin<"int (int, int)">; + def smultb : ARMBuiltin<"int (int, int)">; + def smultt : ARMBuiltin<"int (int, int)">; + def smulwb : ARMBuiltin<"int (int, int)">; + def smulwt : ARMBuiltin<"int (int, int)">; +} + +// Saturating arithmetic +let Attributes = [NoThrow, Const] in { + def qadd : ARMBuiltin<"int (int, int)">; + def qsub : ARMBuiltin<"int (int, int)">; + def qdbl : ARMBuiltin<"int (int)">; + def ssat : ARMBuiltin<"int (int, unsigned int)">; + def usat : ARMBuiltin<"unsigned int (int, unsigned int)">; + def smlabb : ARMBuiltin<"int (int, int, int)">; + def smlabt : ARMBuiltin<"int (int, int, int)">; + def smlatb : ARMBuiltin<"int (int, int, int)">; + def smlatt : ARMBuiltin<"int (int, int, int)">; + def smlawb : ARMBuiltin<"int (int, int, int)">; + def smlawt : ARMBuiltin<"int (int, int, int)">; + def ssat16 : ARMBuiltin<"int (int, int)">; + def usat16 : ARMBuiltin<"int (int, int)">; + def sxtab16 : ARMBuiltin<"int (int, int)">; + def sxtb16 : ARMBuiltin<"int (int)">; + def uxtab16 : ARMBuiltin<"int (int, int)">; + def uxtb16 : ARMBuiltin<"int (int)">; + def sel : ARMBuiltin<"int (int, int)">; + def qadd8 : ARMBuiltin<"int (int, int)">; + def qsub8 : ARMBuiltin<"int (int, int)">; + def sadd8 : ARMBuiltin<"int (int, int)">; + def shadd8 : ARMBuiltin<"int (int, int)">; + def shsub8 : ARMBuiltin<"int (int, int)">; + def ssub8 : ARMBuiltin<"int (int, int)">; + def uadd8 : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; + def uhadd8 : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; + def uhsub8 : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; + def uqadd8 : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; + def uqsub8 : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; + def usub8 : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; +} + +// Sum of 8-bit absolute differences +let Attributes = [NoThrow, Const] in { + def usad8 : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; + def usada8 : ARMBuiltin<"unsigned int (unsigned int, unsigned int, unsigned int)">; +} + +// Parallel 16-bit addition and subtraction +let Attributes = [NoThrow, Const] in { + def qadd16 : ARMBuiltin<"int (int, int)">; + def qasx : ARMBuiltin<"int (int, int)">; + def qsax : ARMBuiltin<"int (int, int)">; + def qsub16 : ARMBuiltin<"int (int, int)">; + def sadd16 : ARMBuiltin<"int (int, int)">; + def sasx : ARMBuiltin<"int (int, int)">; + def shadd16 : ARMBuiltin<"int (int, int)">; + def shasx : ARMBuiltin<"int (int, int)">; + def shsax : ARMBuiltin<"int (int, int)">; + def shsub16 : ARMBuiltin<"int (int, int)">; + def ssax : ARMBuiltin<"int (int, int)">; + def ssub16 : ARMBuiltin<"int (int, int)">; + def uadd16 : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; + def uasx : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; + def uhadd16 : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; + def uhasx : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; + def uhsax : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; + def uhsub16 : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; + def uqadd16 : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; + def uqasx : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; + def uqsax : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; + def uqsub16 : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; + def usax : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; + def usub16 : ARMBuiltin<"unsigned int (unsigned int, unsigned int)">; +} + +// Parallel 16-bit multiplication +let Attributes = [NoThrow, Const] in { + def smlad : ARMBuiltin<"int (int, int, int)">; + def smladx : ARMBuiltin<"int (int, int, int)">; + def smlald : ARMBuiltin<"long long int (int, int, long long int)">; + def smlaldx : ARMBuiltin<"long long int (int, int, long long int)">; + def smlsd : ARMBuiltin<"int (int, int, int)">; + def smlsdx : ARMBuiltin<"int (int, int, int)">; + def smlsld : ARMBuiltin<"long long int (int, int, long long int)">; + def smlsldx : ARMBuiltin<"long long int (int, int, long long int)">; + def smuad : ARMBuiltin<"int (int, int)">; + def smuadx : ARMBuiltin<"int (int, int)">; + def smusd : ARMBuiltin<"int (int, int)">; + def smusdx : ARMBuiltin<"int (int, int)">; +} + +// Bit manipulation +let Attributes = [NoThrow, Const] in { + def rbit : ARMBuiltin<"unsigned int (unsigned int)">; + def clz : ARMBuiltin<"unsigned int (uint32_t)">; + def clz64 : ARMBuiltin<"unsigned int (uint64_t)">; + def cls : ARMBuiltin<"unsigned int (uint32_t)">; + def cls64 : ARMBuiltin<"unsigned int (uint64_t)">; +} + +// Store and load exclusive +let Attributes = [CustomTypeChecking] in { + def ldrexd : ARMBuiltin<"void (...)">; + def strexd : ARMBuiltin<"int (...)">; + def ldrex : ARMBuiltin<"void (...)">; + def ldaex : ARMBuiltin<"void (...)">; + def strex : ARMBuiltin<"int (...)">; + def stlex : ARMBuiltin<"int (...)">; +} + +def clrex : ARMBuiltin<"void ()">; + +// VFP +let Attributes = [NoThrow, Const] in { + def get_fpscr : ARMBuiltin<"unsigned int ()">; + def set_fpscr : ARMBuiltin<"void (unsigned int)">; + def vcvtr_f : ARMBuiltin<"float (float, int)">; + def vcvtr_d : ARMBuiltin<"float (double, int)">; +} + +// Coprocessor +def ldc : ARMBuiltin<"void (unsigned _Constant int, unsigned _Constant int, void const *)">; +def ldcl : ARMBuiltin<"void (unsigned _Constant int, unsigned _Constant int, void const *)">; +def ldc2 : ARMBuiltin<"void (unsigned _Constant int, unsigned _Constant int, void const *)">; +def ldc2l : ARMBuiltin<"void (unsigned _Constant int, unsigned _Constant int, void const *)">; +def stc : ARMBuiltin<"void (unsigned _Constant int, unsigned _Constant int, void *)">; +def stcl : ARMBuiltin<"void (unsigned _Constant int, unsigned _Constant int, void *)">; +def stc2 : ARMBuiltin<"void (unsigned _Constant int, unsigned _Constant int, void *)">; +def stc2l : ARMBuiltin<"void (unsigned _Constant int, unsigned _Constant int, void *)">; +def cdp : ARMBuiltin<"void (unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int)">; +def cdp2 : ARMBuiltin<"void (unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int)">; +def mcr : ARMBuiltin<"void (unsigned _Constant int, unsigned _Constant int, unsigned int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int)">; +def mcr2 : ARMBuiltin<"void (unsigned _Constant int, unsigned _Constant int, unsigned int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int)">; +def mrc : ARMBuiltin<"unsigned int (unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int)">; +def mrc2 : ARMBuiltin<"unsigned int (unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int)">; +def mcrr : ARMBuiltin<"void (unsigned _Constant int, unsigned _Constant int, unsigned long long int, unsigned _Constant int)">; +def mcrr2 : ARMBuiltin<"void (unsigned _Constant int, unsigned _Constant int, unsigned long long int, unsigned _Constant int)">; +def mrrc : ARMBuiltin<"unsigned long long int (unsigned _Constant int, unsigned _Constant int, unsigned _Constant int)">; +def mrrc2 : ARMBuiltin<"unsigned long long int (unsigned _Constant int, unsigned _Constant int, unsigned _Constant int)">; + +// CRC32 +let Attributes = [NoThrow, Const], Features = "crc" in { + def crc32b : ARMTargetBuiltin<"unsigned int (unsigned int, unsigned char)">; + def crc32cb : ARMTargetBuiltin<"unsigned int (unsigned int, unsigned char)">; + def crc32h : ARMTargetBuiltin<"unsigned int (unsigned int, unsigned short)">; + def crc32ch : ARMTargetBuiltin<"unsigned int (unsigned int, unsigned short)">; + def crc32w : ARMTargetBuiltin<"unsigned int (unsigned int, unsigned int)">; + def crc32cw : ARMTargetBuiltin<"unsigned int (unsigned int, unsigned int)">; + def crc32d : ARMTargetBuiltin<"unsigned int (unsigned int, unsigned long long int)">; + def crc32cd : ARMTargetBuiltin<"unsigned int (unsigned int, unsigned long long int)">; +} + +// ARMv8-M Security Extensions a.k.a CMSE +let Attributes = [NoThrow] in { + def cmse_TT : ARMBuiltin<"unsigned int (void *)">; + def cmse_TTT : ARMBuiltin<"unsigned int (void *)">; + def cmse_TTA : ARMBuiltin<"unsigned int (void *)">; + def cmse_TTAT : ARMBuiltin<"unsigned int (void *)">; +} + +// HINT +def nop : ARMBuiltin<"void ()">; +def yield : ARMBuiltin<"void ()">; +def wfe : ARMBuiltin<"void ()">; +def wfi : ARMBuiltin<"void ()">; +def sev : ARMBuiltin<"void ()">; +def sevl : ARMBuiltin<"void ()">; +def dbg : ARMBuiltin<"void (unsigned int)">; + +let Attributes = [RequireDeclaration], Header = "arm_acle.h", Languages = "ALL_LANGUAGES" in { + def __yield : ARMNoPrefixTargetLibBuiltin<"void ()">; + def __wfe : ARMNoPrefixTargetLibBuiltin<"void ()">; + def __wfi : ARMNoPrefixTargetLibBuiltin<"void ()">; + def __sev : ARMNoPrefixTargetLibBuiltin<"void ()">; + def __sevl : ARMNoPrefixTargetLibBuiltin<"void ()">; +} + +// Data barrier +let Attributes = [NoThrow, Const] in { + def dmb : ARMBuiltin<"void (unsigned int)">; + def dsb : ARMBuiltin<"void (unsigned int)">; + def isb : ARMBuiltin<"void (unsigned int)">; +} + +let Attributes = [NoThrow, Const, RequireDeclaration], Header = "arm_acle.h", Languages = "ALL_LANGUAGES" in { + def __dmb : ARMNoPrefixTargetLibBuiltin<"void (unsigned int)">; + def __dsb : ARMNoPrefixTargetLibBuiltin<"void (unsigned int)">; + def __isb : ARMNoPrefixTargetLibBuiltin<"void (unsigned int)">; +} + +// Prefetch +let Attributes = [NoThrow, Const] in { + def prefetch : ARMBuiltin<"void (void const *, unsigned int, unsigned int)">; +} + +// System registers (ACLE) +let Attributes = [NoThrow, Const] in { + def rsr : ARMBuiltin<"unsigned int (char const *)">; + def rsr64 : ARMBuiltin<"unsigned long long int (char const *)">; + def rsrp : ARMBuiltin<"void * (char const *)">; + def wsr : ARMBuiltin<"void (char const *, unsigned int)">; + def wsr64 : ARMBuiltin<"void (char const *, unsigned long long int)">; + def wsrp : ARMBuiltin<"void (char const *, void const *)">; +} + +// Misc +let Attributes = [Const] in { + def __builtin_sponentry : ARMNoPrefixBuiltin<"void * ()">; +} + +// MSVC +let Languages = "ALL_MS_LANGUAGES" in { + def __emit : ARMNoPrefixLangBuiltin<"void (_Constant unsigned int const)">; + def __ldrexd : ARMNoPrefixLangBuiltin<"int64_t (int64_t const volatile *)">; + def _MoveFromCoprocessor : ARMNoPrefixLangBuiltin<"unsigned int (unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int)">; + def _MoveFromCoprocessor2 : ARMNoPrefixLangBuiltin<"unsigned int (unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int)">; + def _MoveToCoprocessor : ARMNoPrefixLangBuiltin<"void (unsigned int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int)">; + def _MoveToCoprocessor2 : ARMNoPrefixLangBuiltin<"void (unsigned int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int, unsigned _Constant int)">; +} + +let Attributes = [NoThrow, RequireDeclaration], Header = "intrin.h", Languages = "ALL_MS_LANGUAGES" in { + def _BitScanForward : ARMNoPrefixTargetLibBuiltin<"unsigned char (msuint32_t *, msuint32_t)">; + def _BitScanReverse : ARMNoPrefixTargetLibBuiltin<"unsigned char (msuint32_t *, msuint32_t)">; + def _BitScanForward64 : ARMNoPrefixTargetLibBuiltin<"unsigned char (msuint32_t *, unsigned long long int)">; + def _BitScanReverse64 : ARMNoPrefixTargetLibBuiltin<"unsigned char (msuint32_t *, unsigned long long int)">; + def _InterlockedAnd64 : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedDecrement64 : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *)">; + def _InterlockedExchange64 : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedExchangeAdd64 : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedExchangeSub64 : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedIncrement64 : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *)">; + def _InterlockedOr64 : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedXor64 : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedExchangeAdd_acq : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t)">; + def _InterlockedExchangeAdd_rel : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t)">; + def _InterlockedExchangeAdd_nf : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t)">; + def _InterlockedExchangeAdd8_acq : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char)">; + def _InterlockedExchangeAdd8_rel : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char)">; + def _InterlockedExchangeAdd8_nf : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char)">; + def _InterlockedExchangeAdd16_acq : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short)">; + def _InterlockedExchangeAdd16_rel : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short)">; + def _InterlockedExchangeAdd16_nf : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short)">; + def _InterlockedExchangeAdd64_acq : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedExchangeAdd64_rel : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedExchangeAdd64_nf : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedExchange8_acq : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char)">; + def _InterlockedExchange8_nf : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char)">; + def _InterlockedExchange8_rel : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char)">; + def _InterlockedExchange16_acq : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short)">; + def _InterlockedExchange16_nf : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short)">; + def _InterlockedExchange16_rel : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short)">; + def _InterlockedExchange_acq : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t)">; + def _InterlockedExchange_nf : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t)">; + def _InterlockedExchange_rel : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t)">; + def _InterlockedExchange64_acq : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedExchange64_nf : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedExchange64_rel : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedExchangePointer_acq : ARMNoPrefixTargetLibBuiltin<"void * (void * volatile *, void *)">; + def _InterlockedExchangePointer_nf : ARMNoPrefixTargetLibBuiltin<"void * (void * volatile *, void *)">; + def _InterlockedExchangePointer_rel : ARMNoPrefixTargetLibBuiltin<"void * (void * volatile *, void *)">; + def _InterlockedCompareExchange8_acq : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char, char)">; + def _InterlockedCompareExchange8_nf : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char, char)">; + def _InterlockedCompareExchange8_rel : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char, char)">; + def _InterlockedCompareExchange16_acq : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short, short)">; + def _InterlockedCompareExchange16_nf : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short, short)">; + def _InterlockedCompareExchange16_rel : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short, short)">; + def _InterlockedCompareExchange_acq : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t, msint32_t)">; + def _InterlockedCompareExchange_nf : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t, msint32_t)">; + def _InterlockedCompareExchange_rel : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t, msint32_t)">; + def _InterlockedCompareExchange64_acq : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int, long long int)">; + def _InterlockedCompareExchange64_nf : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int, long long int)">; + def _InterlockedCompareExchange64_rel : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int, long long int)">; + def _InterlockedCompareExchangePointer_acq : ARMNoPrefixTargetLibBuiltin<"void * (void * volatile *, void *, void *)">; + def _InterlockedCompareExchangePointer_rel : ARMNoPrefixTargetLibBuiltin<"void * (void * volatile *, void *, void *)">; + def _InterlockedOr8_acq : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char)">; + def _InterlockedOr8_nf : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char)">; + def _InterlockedOr8_rel : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char)">; + def _InterlockedOr16_acq : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short)">; + def _InterlockedOr16_nf : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short)">; + def _InterlockedOr16_rel : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short)">; + def _InterlockedOr_acq : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t)">; + def _InterlockedOr_nf : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t)">; + def _InterlockedOr_rel : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t)">; + def _InterlockedOr64_acq : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedOr64_nf : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedOr64_rel : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedXor8_acq : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char)">; + def _InterlockedXor8_nf : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char)">; + def _InterlockedXor8_rel : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char)">; + def _InterlockedXor16_acq : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short)">; + def _InterlockedXor16_nf : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short)">; + def _InterlockedXor16_rel : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short)">; + def _InterlockedXor_acq : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t)">; + def _InterlockedXor_nf : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t)">; + def _InterlockedXor_rel : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t)">; + def _InterlockedXor64_acq : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedXor64_nf : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedXor64_rel : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedAnd8_acq : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char)">; + def _InterlockedAnd8_nf : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char)">; + def _InterlockedAnd8_rel : ARMNoPrefixTargetLibBuiltin<"char (char volatile *, char)">; + def _InterlockedAnd16_acq : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short)">; + def _InterlockedAnd16_nf : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short)">; + def _InterlockedAnd16_rel : ARMNoPrefixTargetLibBuiltin<"short (short volatile *, short)">; + def _InterlockedAnd_acq : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t)">; + def _InterlockedAnd_nf : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t)">; + def _InterlockedAnd_rel : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *, msint32_t)">; + def _InterlockedAnd64_acq : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedAnd64_nf : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedAnd64_rel : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *, long long int)">; + def _InterlockedIncrement16_acq : ARMNoPrefixTargetLibBuiltin<"short (short volatile *)">; + def _InterlockedIncrement16_nf : ARMNoPrefixTargetLibBuiltin<"short (short volatile *)">; + def _InterlockedIncrement16_rel : ARMNoPrefixTargetLibBuiltin<"short (short volatile *)">; + def _InterlockedIncrement_acq : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *)">; + def _InterlockedIncrement_nf : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *)">; + def _InterlockedIncrement_rel : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *)">; + def _InterlockedIncrement64_acq : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *)">; + def _InterlockedIncrement64_nf : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *)">; + def _InterlockedIncrement64_rel : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *)">; + def _InterlockedDecrement16_acq : ARMNoPrefixTargetLibBuiltin<"short (short volatile *)">; + def _InterlockedDecrement16_nf : ARMNoPrefixTargetLibBuiltin<"short (short volatile *)">; + def _InterlockedDecrement16_rel : ARMNoPrefixTargetLibBuiltin<"short (short volatile *)">; + def _InterlockedDecrement_acq : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *)">; + def _InterlockedDecrement_nf : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *)">; + def _InterlockedDecrement_rel : ARMNoPrefixTargetLibBuiltin<"msint32_t (msint32_t volatile *)">; + def _InterlockedDecrement64_acq : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *)">; + def _InterlockedDecrement64_nf : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *)">; + def _InterlockedDecrement64_rel : ARMNoPrefixTargetLibBuiltin<"long long int (long long int volatile *)">; +} + diff --git a/clang/include/clang/Basic/BuiltinsARMBase.td b/clang/include/clang/Basic/BuiltinsARMBase.td new file mode 100644 index 0000000000000..095e23a791962 --- /dev/null +++ b/clang/include/clang/Basic/BuiltinsARMBase.td @@ -0,0 +1,52 @@ +//===--- BuiltinsARMBase.td - ARM Builtin function classes ------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the ARM-specific builtin function classes. +// +//===----------------------------------------------------------------------===// +include "clang/Basic/BuiltinsBase.td" + +def ARMPrefix : NamePrefix<"__builtin_arm_">; + +class ARMBuiltin<string prototype> : Builtin { + let Spellings = [NAME]; + let Prototype = prototype; + let RequiredNamePrefix = ARMPrefix; +} + +class ARMNoPrefixBuiltin<string prototype> : Builtin { + let Spellings = [NAME]; + let Prototype = prototype; +} + +class ARMLangBuiltin<string prototype, string languages=""> : LangBuiltin<languages> { + let Spellings = [NAME]; + let Prototype = prototype; + let RequiredNamePrefix = ARMPrefix; +} + +class ARMNoPrefixLangBuiltin<string prototype, string languages=""> : LangBuiltin<languages> { + let Spellings = [NAME]; + let Prototype = prototype; +} + +class ARMTargetBuiltin<string prototype> : TargetBuiltin { + let Spellings = [NAME]; + let Prototype = prototype; + let RequiredNamePrefix = ARMPrefix; +} + +class ARMNoPrefixTargetBuiltin<string prototype> : TargetBuiltin { + let Spellings = [NAME]; + let Prototype = prototype; +} + +class ARMNoPrefixTargetLibBuiltin<string prototype> : TargetLibBuiltin { + let Spellings = [NAME]; + let Prototype = prototype; +} \ No newline at end of file diff --git a/clang/include/clang/Basic/CMakeLists.txt b/clang/include/clang/Basic/CMakeLists.txt index 20172622ca424..ca4bbf0f3ce7b 100644 --- a/clang/include/clang/Basic/CMakeLists.txt +++ b/clang/include/clang/Basic/CMakeLists.txt @@ -98,6 +98,10 @@ clang_tablegen(BuiltinsAArch64.inc -gen-clang-builtins SOURCE BuiltinsAArch64.td TARGET ClangBuiltinsAArch64) +clang_tablegen(BuiltinsARM.inc -gen-clang-builtins + SOURCE BuiltinsARM.td + TARGET ClangBuiltinsARM) + clang_tablegen(BuiltinsAMDGPU.inc -gen-clang-builtins SOURCE BuiltinsAMDGPU.td TARGET ClangBuiltinsAMDGPU) diff --git a/clang/include/clang/Basic/TargetBuiltins.h b/clang/include/clang/Basic/TargetBuiltins.h index 8cf8720f74573..40afadc4d0055 100644 --- a/clang/include/clang/Basic/TargetBuiltins.h +++ b/clang/include/clang/Basic/TargetBuiltins.h @@ -51,8 +51,9 @@ namespace clang { #undef GET_CDE_BUILTIN_ENUMERATORS FirstARMBuiltin, LastCDEBuiltin = FirstARMBuiltin - 1, -#define BUILTIN(ID, TYPE, ATTRS) BI##ID, -#include "clang/Basic/BuiltinsARM.def" +#define GET_BUILTIN_ENUMERATORS +#include "clang/Basic/BuiltinsARM.inc" +#undef GET_BUILTIN_ENUMERATORS LastTSBuiltin }; } diff --git a/clang/include/module.modulemap b/clang/include/module.modulemap index b8a9184980259..210723358d5b2 100644 --- a/clang/include/module.modulemap +++ b/clang/include/module.modulemap @@ -41,7 +41,6 @@ module Clang_Basic { textual header "clang/Basic/BuiltinHeaders.def" textual header "clang/Basic/BuiltinsAArch64NeonSVEBridge.def" textual header "clang/Basic/BuiltinsAArch64NeonSVEBridge_cg.def" - textual header "clang/Basic/BuiltinsARM.def" textual header "clang/Basic/BuiltinsAVR.def" textual header "clang/Basic/BuiltinsHexagonMapCustomDep.def" textual header "clang/Basic/BuiltinsLoongArchBase.def" diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp index b9744ff9009ca..d1224b955e341 100644 --- a/clang/lib/Basic/Targets/ARM.cpp +++ b/clang/lib/Basic/Targets/ARM.cpp @@ -1112,22 +1112,30 @@ static constexpr std::array<Builtin::Info, NumCDEBuiltins> BuiltinInfos = { } // namespace CDE } // namespace -static constexpr llvm::StringTable BuiltinStrings = - CLANG_BUILTIN_STR_TABLE_START -#define BUILTIN CLANG_BUILTIN_STR_TABLE -#define TARGET_BUILTIN CLANG_TARGET_BUILTIN_STR_TABLE -#define TARGET_HEADER_BUILTIN CLANG_TARGET_HEADER_BUILTIN_STR_TABLE -#include "clang/Basic/BuiltinsARM.def" - ; // namespace clang - -static constexpr auto BuiltinInfos = Builtin::MakeInfos<NumARMBuiltins>({ -#define BUILTIN CLANG_BUILTIN_ENTRY -#define LANGBUILTIN CLANG_LANGBUILTIN_ENTRY -#define LIBBUILTIN CLANG_LIBBUILTIN_ENTRY -#define TARGET_BUILTIN CLANG_TARGET_BUILTIN_ENTRY -#define TARGET_HEADER_BUILTIN CLANG_TARGET_HEADER_BUILTIN_ENTRY -#include "clang/Basic/BuiltinsARM.def" -}); +namespace clang { +namespace ARM { + +#define GET_BUILTIN_STR_TABLE +#include "clang/Basic/BuiltinsARM.inc" +#undef GET_BUILTIN_STR_TABLE + +static constexpr Builtin::Info BuiltinInfos[] = { +#define GET_BUILTIN_INFOS +#include "clang/Basic/BuiltinsARM.inc" +#undef GET_BUILTIN_INFOS +}; + +static constexpr Builtin::Info PrefixedBuiltinInfos[] = { +#define GET_BUILTIN_PREFIXED_INFOS +#include "clang/Basic/BuiltinsARM.inc" +#undef GET_BUILTIN_PREFIXED_INFOS +}; + +static_assert((std::size(BuiltinInfos) + std::size(PrefixedBuiltinInfos)) == + NumARMBuiltins); + +} // namespace ARM +} // namespace clang llvm::SmallVector<Builtin::InfosShard> ARMTargetInfo::getTargetBuiltins() const { @@ -1137,7 +1145,8 @@ ARMTargetInfo::getTargetBuiltins() const { "__builtin_neon_"}, {&MVE::BuiltinStrings, MVE::BuiltinInfos, "__builtin_arm_mve_"}, {&CDE::BuiltinStrings, CDE::BuiltinInfos, "__builtin_arm_cde_"}, - {&BuiltinStrings, BuiltinInfos}, + {&ARM::BuiltinStrings, ARM::BuiltinInfos}, + {&ARM::BuiltinStrings, ARM::PrefixedBuiltinInfos, "__builtin_arm_"}, }; } _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
