Author: Andrzej Warzyński Date: 2026-07-14T10:37:42+01:00 New Revision: 8c75e8018d52ead8f97648b7b279671b89c59fa0
URL: https://github.com/llvm/llvm-project/commit/8c75e8018d52ead8f97648b7b279671b89c59fa0 DIFF: https://github.com/llvm/llvm-project/commit/8c75e8018d52ead8f97648b7b279671b89c59fa0.diff LOG: [CIR][AArc64] Add lowering for fp16 intrinsics (multiply extended) (#209222) This PR adds lowering for the following intrinsic groups: * https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#multiply-extended-1 It also moves the corresponding tests from: * clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c to: * clang/test/CodeGen/AArch64/neon/fullfp16.c The lowering follows the existing implementation in CodeGen/TargetBuiltins/ARM.cpp. Added: Modified: clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp clang/test/CodeGen/AArch64/neon/fullfp16.c clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c Removed: ################################################################################ diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp index 2608aaf780591..1f488dfa9383a 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp @@ -456,6 +456,7 @@ static mlir::Value emitCommonNeonSISDBuiltinExpr( case NEON::BI__builtin_neon_vpmaxqd_f64: case NEON::BI__builtin_neon_vpmaxnms_f32: case NEON::BI__builtin_neon_vpmaxnmqd_f64: + case NEON::BI__builtin_neon_vmulxh_f16: break; } diff --git a/clang/test/CodeGen/AArch64/neon/fullfp16.c b/clang/test/CodeGen/AArch64/neon/fullfp16.c index 71a5a7d98eb83..5c229ff8a1736 100644 --- a/clang/test/CodeGen/AArch64/neon/fullfp16.c +++ b/clang/test/CodeGen/AArch64/neon/fullfp16.c @@ -60,7 +60,7 @@ float16_t test_vsubh_f16(float16_t a, float16_t b) { } //===------------------------------------------------------===// -// 2.5.9.1. Multiplication +// 2.5.1.9.1. Multiplication //===------------------------------------------------------===// // ALL-LABEL: @test_vmulh_f16( float16_t test_vmulh_f16(float16_t a, float16_t b) { @@ -356,3 +356,16 @@ float16_t test_vfmsh_f16(float16_t a, float16_t b, float16_t c) { // LLVM: ret half [[ADD]] return vfmsh_f16(a, b, c); } + +//===------------------------------------------------------===// +// 2.5.1.9.2 Multiply extended +//===------------------------------------------------------===// +// ALL-LABEL: test_vmulxh_f16 +float16_t test_vmulxh_f16(float16_t a, float16_t b) { +// CIR: cir.call_llvm_intrinsic "aarch64.neon.fmulx" + +// LLVM-SAME: half{{.*}} [[A:%.*]], half{{.*}} [[B:%.*]]) +// LLVM: [[MUL:%.*]] = call half @llvm.aarch64.neon.fmulx.f16(half [[A]], half [[B]]) +// LLVM: ret half [[MUL]] + return vmulxh_f16(a, b); +} diff --git a/clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c b/clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c index d519e4138adbf..588565ac9f625 100644 --- a/clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c +++ b/clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c @@ -450,10 +450,3 @@ int32_t test_vcvth_n_u32_f16(float16_t a) { int64_t test_vcvth_n_u64_f16(float16_t a) { return vcvth_n_u64_f16(a, 1); } - -// CHECK-LABEL: test_vmulxh_f16 -// CHECK: [[MUL:%.*]] = call half @llvm.aarch64.neon.fmulx.f16(half %a, half %b) -// CHECK: ret half [[MUL]] -float16_t test_vmulxh_f16(float16_t a, float16_t b) { - return vmulxh_f16(a, b); -} _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
