zahiraam wrote:
To verify the behavior with `SSE` disabled, I compiled a test case forcing pure
`x87` code generation:
```
typedef long double x87_type;
#pragma pack(push, 8)
struct PackedX87 {
x87_type val;
};
#pragma pack(pop)
void test(PackedX87 *ptr) {
ptr->val = 3.14L;
}
```
Even though the generated assembly uses pure `x87` instructions:
```
fldt .LCPI0_0(%rip) # x87 load
fstpt (%rax) # x87 store
```
The target datalayout specifies what the ABI requires (even without this patch):
`target datalayout =
"e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"`
The compiler now enforces `16-byte` alignment in the IR:
`store x86_fp80 3.140000e+00, ptr %val, align 16`
and pads constant pools to `16 bytes` (even without this patch):
```
.LCPI0_0:
.quad 0xc8f5c28f5c28f5c3
.short 0x4000
.zero 6 # Explicit padding to 16 bytes
```
This demonstrates that the `16-byte` alignment is an `ABI` requirement, not an
instruction requirement. The target datalayout `f80:128` has always specified
that `x86_fp80` requires 16-byte alignment as part of the ABI.
So, yes, we're enforcing `16-byte` alignment even though `x87` instructions
don't strictly need it, because:
- The ABI requires it for interoperability.
- It prevents crashes with SSE-optimized code paths.
- It ensures consistent struct layouts across compilation units.
- Conservative alignment (16 bytes) works correctly with both x87 AND SSE.
https://github.com/llvm/llvm-project/pull/208256
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