================
@@ -6512,6 +6512,51 @@
lowerVECTOR_SHUFFLEAsRV32PNarrowingShift(ShuffleVectorSDNode *SVN,
DAG.getConstant(Index * EltBits, DL, MVT::i32));
}
+// Match a strided-interleave shuffle that forms a P-extension packed
+// narrowing zip:
+// <a0, b0, a2, b2, ...> -> ppaire.*
+// <a1, b1, a3, b3, ...> -> ppairo.*
+static SDValue lowerVECTOR_SHUFFLEAsPNarrowingZip(ShuffleVectorSDNode *SVN,
----------------
topperc wrote:
NarrowingZip->PPair? The bitcast+ppair is what makes it narrowing but we aren't
matching the bitcast here. And this function will be reused for the
ppaire/ppairo intrinsics.
https://github.com/llvm/llvm-project/pull/210040
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