================
@@ -96,11 +96,19 @@ MVT
SPIRVTargetLowering::getRegisterTypeForCallingConv(LLVMContext &Context,
// This code avoids CallLowering fail inside getVectorTypeBreakdown
// on v3i1 arguments. Maybe we need to return i32 for all types.
// TODO: remove it once this case is supported by the default implementation.
- if (VT.isVector() && VT.getVectorNumElements() == 3) {
- if (VT.getVectorElementType() == MVT::i1)
- return MVT::v4i1;
- else if (VT.getVectorElementType() == MVT::i8)
- return MVT::v4i8;
+ if (VT.isVector()) {
+ if (VT.getVectorNumElements() == 3) {
+ if (VT.getVectorElementType() == MVT::i1)
+ return MVT::v4i1;
+ else if (VT.getVectorElementType() == MVT::i8)
+ return MVT::v4i8;
+ } else if (!isPowerOf2_32(VT.getVectorNumElements()) &&
+ STI.canUseExtension(SPIRV::Extension::SPV_EXT_long_vector)) {
+ // Non POT element counts are not yet supported by GISEL.
+ return MVT::getVectorVT(
+ VT.getVectorElementType().getSimpleVT(),
+ ElementCount::getFixed(VT.getVectorNumElements()));
----------------
AlexVlx wrote:
Depends on whether or not you consider 64 to be very-very long, as there is a
test for that explicitly.
https://github.com/llvm/llvm-project/pull/210279
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