================
@@ -32,6 +33,50 @@ namespace mlir {
namespace {
+/// Simplify `cir.load` that loads from an alloca marked as "constant".
+///
+/// For example:
+///
+/// %0 = cir.alloca "x" align(4) const : !cir.ptr<!s32i>
+/// cir.store %init, %0 : !s32i, !cir.ptr<!s32i>
+/// %1 = cir.load %0 : !cir.ptr<!s32i>
+///
+/// All uses of the load above could be replaced with the SSA value `%init`.
+struct SimplifyConstantLoad : public OpRewritePattern<LoadOp> {
+ using OpRewritePattern<LoadOp>::OpRewritePattern;
+ LogicalResult matchAndRewrite(LoadOp op,
+ PatternRewriter &rewriter) const override {
+ // Volatile or atomic loads should not be simplified.
+ if (op.getIsVolatile() || op.getMemOrder())
+ return mlir::failure();
+
+ auto allocaOp = op.getAddr().getDefiningOp<cir::AllocaOp>();
+ if (!allocaOp || !allocaOp.getConstant())
+ return mlir::failure();
+
+ cir::StoreOp initStoreOp;
+ for (const mlir::OpOperand &use : allocaOp->getUses()) {
+ auto store = mlir::dyn_cast<cir::StoreOp>(use.getOwner());
+ if (!store || use.getOperandNumber() != cir::StoreOp::odsIndex_addr)
----------------
erichkeane wrote:
Can you add a comment here? It isn't quite clear what this line is doing for
me.
https://github.com/llvm/llvm-project/pull/212284
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