Lancern wrote: > SO I was actually wondering: Could we generalize/simplify this patch a bit? > ONE pattern we see pretty often (particularly around return values) is this > bit where we store, then immediately load from it and return.
I believe [mem2reg](https://mlir.llvm.org/docs/Passes/#-mem2reg) is exactly what you're looking for. And CIR already have support for it, see the test file [mem2reg.cir](https://github.com/llvm/llvm-project/blob/main/clang/test/CIR/Transforms/mem2reg.cir). But it's a bit unfortunate that the CIR lowering pipeline does not include mem2reg yet, even in the optimization path. Specifically, run the following command over the CIR you provided: ```bash cir-opt test.cir -cir-flatten-cfg -mem2reg -o - ``` And this is what I got on my local build: ```mlir cir.func @_Z4funcii(%arg0: !s32i, %arg1: !s32i) -> !s32i { %0 = cir.add nsw %arg0, %arg1 : !s32i cir.return %0 : !s32i } ``` <hr /> I actually attempted to find a way to build this PR on top of the mem2reg pass, but I failed to find one. The goal of mem2reg is to promote a memory location into a register value, while the goal of this optimization is to fold away just the loads meeting specific criteria. Their goals diverge and it would be awkward to attempt to implement one on top of the other. https://github.com/llvm/llvm-project/pull/212284 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
