================
@@ -310,6 +310,16 @@ static Value *handleElementwiseF32ToF16(CodeGenFunction
&CGF,
llvm_unreachable("Intrinsic F32ToF16 not supported by target architecture");
}
+// Pick the atomic memory scope for an HLSL Interlocked* op by destination:
+// Workgroup for groupshared, Device otherwise (Vulkan forbids CrossDevice).
+static llvm::SyncScope::ID GetInterlockedScope(CodeGenFunction &CGF,
+ const LValue &DestLV) {
+ StringRef ScopeName = DestLV.getAddressSpace() == LangAS::hlsl_groupshared
+ ? "workgroup"
+ : "device";
----------------
farzonl wrote:
Hmm there is a bit of an established pattern to do stuff like this in
`clang/lib/CodeGen/Targets/SPIR.cpp`. If this is SPIRV specfic should it really
live here?
https://github.com/llvm/llvm-project/pull/212663
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