================
@@ -10,161 +10,121 @@
#define LLVM_CLANG_BASIC_OFFLOADARCH_H
#include "llvm/ADT/StringRef.h"
+#include <cstdint>
#include <tuple>
namespace llvm {
class Triple;
+template <typename T> class SmallVectorImpl;
+namespace NVPTX {
+enum GPUKind : uint8_t;
+}
+namespace AMDGPU {
+enum GPUKind : uint8_t;
+}
} // namespace llvm
namespace clang {
-enum class OffloadArch {
- Unused,
- Unknown,
- // TODO: Deprecate and remove GPU architectures older than sm_52.
- SM_20,
- SM_21,
- SM_30,
- // This has a name conflict with sys/mac.h on AIX, rename it as a workaround.
- SM_32_,
- SM_35,
- SM_37,
- SM_50,
- SM_52,
- SM_53,
- SM_60,
- SM_61,
- SM_62,
- SM_70,
- SM_72,
- SM_75,
- SM_80,
- SM_86,
- SM_87,
- SM_88,
- SM_89,
- SM_90,
- SM_90a,
- SM_100,
- SM_100a,
- SM_100f,
- SM_101,
- SM_101a,
- SM_101f,
- SM_103,
- SM_103a,
- SM_103f,
- SM_110,
- SM_110a,
- SM_110f,
- SM_120,
- SM_120a,
- SM_120f,
- SM_121,
- SM_121a,
- SM_121f,
- GFX600,
- GFX601,
- GFX602,
- GFX700,
- GFX701,
- GFX702,
- GFX703,
- GFX704,
- GFX705,
- GFX801,
- GFX802,
- GFX803,
- GFX805,
- GFX810,
- GFX9_GENERIC,
- GFX900,
- GFX902,
- GFX904,
- GFX906,
- GFX908,
- GFX909,
- GFX90a,
- GFX90c,
- GFX9_4_GENERIC,
- GFX942,
- GFX950,
- GFX10_1_GENERIC,
- GFX1010,
- GFX1011,
- GFX1012,
- GFX1013,
- GFX10_3_GENERIC,
- GFX1030,
- GFX1031,
- GFX1032,
- GFX1033,
- GFX1034,
- GFX1035,
- GFX1036,
- GFX11_GENERIC,
- GFX1100,
- GFX1101,
- GFX1102,
- GFX1103,
- GFX1150,
- GFX1151,
- GFX1152,
- GFX1153,
- GFX1154,
- GFX11_7_GENERIC,
- GFX1170,
- GFX1171,
- GFX1172,
- GFX12_GENERIC,
- GFX1200,
- GFX1201,
- GFX12_5_GENERIC,
- GFX1250,
- GFX1251,
- GFX13_GENERIC,
- GFX1310,
- AMDGCNSPIRV,
- Generic, // A processor model named 'generic' if the target backend defines a
- // public one.
- // Intel CPUs
- GRANITERAPIDS,
- // Intel GPUs
- BMG_G21,
- LAST = BMG_G21,
-
- CudaDefault = OffloadArch::SM_52,
- HIPDefault = OffloadArch::GFX906,
-};
-
-static inline bool IsNVIDIAOffloadArch(OffloadArch A) {
- return A >= OffloadArch::SM_20 && A < OffloadArch::GFX600;
-}
-
-static inline bool IsAMDOffloadArch(OffloadArch A) {
- // Generic processor model is for testing only.
- return A >= OffloadArch::GFX600 && A < OffloadArch::Generic;
-}
+/// A processor an offloading action can target. This is a tagged handle
pairing
+/// a TargetArch with the matching TargetParser GPU kind; it does not enumerate
+/// individual GPUs, so new targets are added in the TargetParser data alone.
+class OffloadArch {
+public:
+ enum class TargetArch : uint8_t {
+ Unused, // Default-constructed; no architecture bound.
+ Unknown, // A name that matched no known architecture.
+ NVPTX, // Kind is an llvm::NVPTX::GPUKind.
+ AMDGPU, // Kind is an llvm::AMDGPU::GPUKind.
+ SPIRV, // The 'amdgcnspirv' pseudo target.
+ IntelCPU, // Kind is an IntelArch.
+ IntelGPU, // Kind is an IntelArch.
+ Generic, // The 'generic' processor model.
+ };
+
+ // Intel architectures, which have no TargetParser list yet.
+ enum class IntelArch : uint32_t {
+ GRANITERAPIDS,
+ BMG_G21,
+ };
+
+private:
+ // Interpreted according to V; unused for the tagless TargetArch values.
+ uint32_t Kind = 0;
+ TargetArch V = TargetArch::Unused;
+
+ constexpr OffloadArch(TargetArch V, uint32_t Kind) : Kind(Kind), V(V) {}
+
+public:
+ constexpr OffloadArch() = default;
+
+ static OffloadArch getNVPTX(llvm::NVPTX::GPUKind K) {
+ return {TargetArch::NVPTX, static_cast<uint32_t>(K)};
+ }
+ static OffloadArch getAMDGPU(llvm::AMDGPU::GPUKind K) {
+ return {TargetArch::AMDGPU, static_cast<uint32_t>(K)};
+ }
+ static constexpr OffloadArch getIntel(TargetArch V, IntelArch A) {
+ return {V, static_cast<uint32_t>(A)};
+ }
+ static constexpr OffloadArch getUnused() { return {TargetArch::Unused, 0}; }
+ static constexpr OffloadArch getUnknown() { return {TargetArch::Unknown, 0};
}
+ static constexpr OffloadArch getSPIRV() { return {TargetArch::SPIRV, 0}; }
+ static constexpr OffloadArch getGeneric() { return {TargetArch::Generic, 0};
}
+
+ /// Default architectures used when the user does not specify one.
+ static OffloadArch CudaDefault();
+ static OffloadArch HIPDefault();
+
+ TargetArch targetArch() const { return V; }
+
+ bool isNVPTX() const { return V == TargetArch::NVPTX; }
+ bool isAMDGPU() const { return V == TargetArch::AMDGPU; }
+ bool isSPIRV() const { return V == TargetArch::SPIRV; }
+ bool isIntelCPU() const { return V == TargetArch::IntelCPU; }
+ bool isIntelGPU() const { return V == TargetArch::IntelGPU; }
+ bool isIntel() const { return isIntelCPU() || isIntelGPU(); }
+ bool isGeneric() const { return V == TargetArch::Generic; }
+ bool isUnused() const { return V == TargetArch::Unused; }
+ bool isUnknown() const { return V == TargetArch::Unknown; }
+
+ // Only valid when isNVPTX() / isAMDGPU() respectively.
+ llvm::NVPTX::GPUKind nvptxKind() const {
+ return static_cast<llvm::NVPTX::GPUKind>(Kind);
+ }
+ llvm::AMDGPU::GPUKind amdgpuKind() const {
+ return static_cast<llvm::AMDGPU::GPUKind>(Kind);
+ }
-static inline bool IsIntelCPUOffloadArch(OffloadArch Arch) {
- return Arch >= OffloadArch::GRANITERAPIDS && Arch < OffloadArch::BMG_G21;
-}
+ bool operator==(const OffloadArch &Other) const {
+ return V == Other.V && Kind == Other.Kind;
+ }
+ bool operator!=(const OffloadArch &Other) const { return !(*this == Other); }
-static inline bool IsIntelGPUOffloadArch(OffloadArch Arch) {
- return Arch >= OffloadArch::BMG_G21 && Arch <= OffloadArch::LAST;
-}
+ bool operator<(const OffloadArch &Other) const {
+ return std::tie(V, Kind) < std::tie(Other.V, Other.Kind);
----------------
arsenm wrote:
Replacing with elementwise compares won't be the same thing, this mishandles
the equal case
https://github.com/llvm/llvm-project/pull/213362
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