https://github.com/madhur13490 created
https://github.com/llvm/llvm-project/pull/213902
Replace the two-operand boolean form
!{!"llvm.loop.vectorize.predicate.enable", i1 0/1} with a single-operand
enable/disable pair:
!{!"llvm.loop.vectorize.predicate.enable"}
!{!"llvm.loop.vectorize.predicate.disable"}
The Verifier rejects the two-operand form, AutoUpgrade rewrites old bitcode,
and the readers and producers in LLVM, Clang and MLIR are updated.
Please refer to RFC:
https://discourse.llvm.org/t/rfc-enforce-single-operand-format-for-all-enable-metadata-nodes/90571/
>From 19ad2d77efb2e60ff3c974ca339325996a120694 Mon Sep 17 00:00:00 2001
From: Madhur Amilkanthwar <[email protected]>
Date: Mon, 3 Aug 2026 01:39:14 -0700
Subject: [PATCH] Enforce single-operand form for llvm.loop.vectorize.predicate
metadata
Replace the two-operand boolean form
!{!"llvm.loop.vectorize.predicate.enable", i1 0/1} with a single-operand
enable/disable pair:
!{!"llvm.loop.vectorize.predicate.enable"}
!{!"llvm.loop.vectorize.predicate.disable"}
The Verifier rejects the two-operand form, AutoUpgrade rewrites old
bitcode, and the readers and producers in LLVM, Clang and MLIR are
updated.
Please refer to RFC:
https://discourse.llvm.org/t/rfc-enforce-single-operand-format-for-all-enable-metadata-nodes/90571/
---
clang/lib/CodeGen/CGLoopInfo.cpp | 10 ++--
.../test/CodeGenCXX/pragma-loop-predicate.cpp | 4 +-
llvm/docs/LangRef.md | 9 +--
llvm/include/llvm/IR/AutoUpgrade.h | 12 ++--
llvm/lib/IR/AutoUpgrade.cpp | 53 +++++++++++-------
llvm/lib/IR/Verifier.cpp | 9 +++
.../Vectorize/LoopVectorizationLegality.cpp | 8 +++
...upgrade-loop-vectorize-predicate-enable.ll | 37 ++++++++++++
...rade-loop-vectorize-predicate-enable.ll.bc | Bin 0 -> 2368 bytes
.../AArch64/low_trip_count_predicates.ll | 2 +-
.../partial-reduce-dot-product-epilogue.ll | 2 +-
.../partial-reduce-dot-product-mixed.ll | 2 +-
.../partial-reduce-dot-product-neon.ll | 2 +-
.../AArch64/partial-reduce-dot-product.ll | 2 +-
.../AArch64/partial-reduce-sub.ll | 2 +-
.../LoopVectorize/AArch64/partial-reduce.ll | 2 +-
.../LoopVectorize/AArch64/predicated-costs.ll | 2 +-
.../LoopVectorize/AArch64/strict-fadd.ll | 2 +-
.../LoopVectorize/AArch64/sve2-histcnt.ll | 2 +-
.../AArch64/tail-folding-styles.ll | 2 +-
.../widen-gep-all-indices-invariant.ll | 2 +-
.../ARM/prefer-tail-loop-folding.ll | 2 +-
.../ARM/tail-folding-loop-hint.ll | 2 +-
.../ARM/tail-folding-prefer-flag.ll | 2 +-
.../VPlan/AArch64/sve-tail-folding-forced.ll | 2 +-
.../VPlan/AArch64/vplan-printing.ll | 4 +-
.../LoopVectorize/VPlan/constant-fold.ll | 2 +-
.../LoopVectorize/X86/induction-costs.ll | 2 +-
.../X86/tail_folding_and_assume_safety.ll | 4 +-
.../LoopVectorize/X86/tail_loop_folding.ll | 4 +-
...o-fold-tail-by-masking-iv-external-uses.ll | 2 +-
.../LoopVectorize/reduction-inloop-uf4.ll | 2 +-
.../LoopVectorize/reduction-inloop.ll | 2 +-
.../use-scalar-epilogue-if-tp-fails.ll | 2 +-
...kedge-elimination-predicated-early-exit.ll | 2 +-
.../Verifier/llvm.loop.vectorize.predicate.ll | 41 ++++++++++++++
.../Target/LLVMIR/LoopAnnotationImporter.cpp | 3 +-
.../LLVMIR/LoopAnnotationTranslation.cpp | 27 ++++++---
.../Target/LLVMIR/Import/metadata-loop.ll | 2 +-
mlir/test/Target/LLVMIR/loop-metadata.mlir | 2 +-
40 files changed, 198 insertions(+), 77 deletions(-)
create mode 100644 llvm/test/Bitcode/upgrade-loop-vectorize-predicate-enable.ll
create mode 100644
llvm/test/Bitcode/upgrade-loop-vectorize-predicate-enable.ll.bc
create mode 100644 llvm/test/Verifier/llvm.loop.vectorize.predicate.ll
diff --git a/clang/lib/CodeGen/CGLoopInfo.cpp b/clang/lib/CodeGen/CGLoopInfo.cpp
index 499e2287ae84a..45ec2d36eb7a3 100644
--- a/clang/lib/CodeGen/CGLoopInfo.cpp
+++ b/clang/lib/CodeGen/CGLoopInfo.cpp
@@ -228,11 +228,11 @@ clang::CodeGen::LoopInfo::createLoopVectorizeMetadata(
IsVectorPredicateEnabled =
(Attrs.VectorizePredicateEnable == LoopAttributes::Enable);
- Metadata *Vals[] = {
- MDString::get(Ctx, "llvm.loop.vectorize.predicate.enable"),
- ConstantAsMetadata::get(ConstantInt::get(llvm::Type::getInt1Ty(Ctx),
- IsVectorPredicateEnabled))};
- Args.push_back(MDNode::get(Ctx, Vals));
+ Args.push_back(MDNode::get(
+ Ctx,
+ {MDString::get(Ctx, IsVectorPredicateEnabled
+ ? "llvm.loop.vectorize.predicate.enable"
+ : "llvm.loop.vectorize.predicate.disable")}));
}
// Setting vectorize.width
diff --git a/clang/test/CodeGenCXX/pragma-loop-predicate.cpp
b/clang/test/CodeGenCXX/pragma-loop-predicate.cpp
index 8a25ed8de6239..b80c952fb122a 100644
--- a/clang/test/CodeGenCXX/pragma-loop-predicate.cpp
+++ b/clang/test/CodeGenCXX/pragma-loop-predicate.cpp
@@ -106,10 +106,10 @@ void test9(int *List, int Length) {
// CHECK-NEXT: [[GEN3]] = !{!"llvm.loop.vectorize.enable", i1 true}
// CHECK-NEXT: ![[LOOP1]] = distinct !{![[LOOP1]], [[MP]], [[GEN6:![0-9]+]],
[[GEN3]]}
-// CHECK-NEXT: [[GEN6]] = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+// CHECK-NEXT: [[GEN6]] = !{!"llvm.loop.vectorize.predicate.enable"}
// CHECK-NEXT: ![[LOOP2]] = distinct !{![[LOOP2]], [[MP]], [[GEN8:![0-9]+]],
[[GEN3]]}
-// CHECK-NEXT: [[GEN8]] = !{!"llvm.loop.vectorize.predicate.enable", i1 false}
+// CHECK-NEXT: [[GEN8]] = !{!"llvm.loop.vectorize.predicate.disable"}
// CHECK-NEXT: ![[LOOP3]] = distinct !{![[LOOP3]], [[MP]], [[GEN6]], [[GEN3]]}
diff --git a/llvm/docs/LangRef.md b/llvm/docs/LangRef.md
index 3735039b99977..58318e8a9888a 100644
--- a/llvm/docs/LangRef.md
+++ b/llvm/docs/LangRef.md
@@ -8073,14 +8073,11 @@ is a bit. If the bit operand value is 1 vectorization
is enabled. A value of
This metadata selectively enables or disables creating predicated instructions
for the loop, which can enable folding of the scalar epilogue loop into the
-main loop. The first operand is the string
-`llvm.loop.vectorize.predicate.enable` and the second operand is a bit. If
-the bit operand value is 1 predication is enabled. A value of 0 disables
-predication:
+main loop. Each node has a single operand containing the name string:
```llvm
-!0 = !{!"llvm.loop.vectorize.predicate.enable", i1 0}
-!1 = !{!"llvm.loop.vectorize.predicate.enable", i1 1}
+!0 = !{!"llvm.loop.vectorize.predicate.enable"}
+!1 = !{!"llvm.loop.vectorize.predicate.disable"}
```
Additionally, enabling predication implicitly enables vectorization.
diff --git a/llvm/include/llvm/IR/AutoUpgrade.h
b/llvm/include/llvm/IR/AutoUpgrade.h
index 423fea4205a80..ed8187ed1c512 100644
--- a/llvm/include/llvm/IR/AutoUpgrade.h
+++ b/llvm/include/llvm/IR/AutoUpgrade.h
@@ -112,12 +112,14 @@ namespace llvm {
/// Check whether a string looks like an old loop attachment tag.
inline bool mayBeOldLoopAttachmentTag(StringRef Name) {
- // "llvm.loop.distribute.enable" is intentionally included: the current
- // single-operand form shares the tag with the removed two-operand form
- // (!{!"llvm.loop.distribute.enable", i1 X}), so we can only decide by
- // inspecting the operands, which happens in upgradeLoopArgument().
+ // "llvm.loop.distribute.enable" and
+ // "llvm.loop.vectorize.predicate.enable" are intentionally included: the
+ // current single-operand form shares the tag with the removed two-operand
+ // form (!{!"...", i1 X}), so we can only decide by inspecting the
+ // operands, which happens in upgradeLoopArgument().
return Name.starts_with("llvm.vectorizer.") ||
- Name == "llvm.loop.distribute.enable";
+ Name == "llvm.loop.distribute.enable" ||
+ Name == "llvm.loop.vectorize.predicate.enable";
}
/// Upgrade the loop attachment metadata node.
diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp
index 4502759417c5a..1a3e538c3f8c6 100644
--- a/llvm/lib/IR/AutoUpgrade.cpp
+++ b/llvm/lib/IR/AutoUpgrade.cpp
@@ -7011,16 +7011,32 @@ void llvm::copyModuleAttrToFunctions(Module &M) {
}
}
-// Old two-operand form: !{!"llvm.loop.distribute.enable", i1 X}. The new
-// single-operand form uses "llvm.loop.distribute.enable" for X = true and
-// "llvm.loop.distribute.disable" for X = false.
-static bool isOldDistributeEnable(const MDTuple *T) {
- if (T->getNumOperands() != 2)
- return false;
+namespace {
+// Single-operand tags replacing a removed two-operand form
+// !{!"<Enable>", i1 X}: X = true selects Enable, X = false selects Disable.
+struct BooleanLoopTags {
+ StringLiteral Enable;
+ StringLiteral Disable;
+};
+} // namespace
+
+static constexpr BooleanLoopTags OldBooleanLoopTags[] = {
+ {"llvm.loop.distribute.enable", "llvm.loop.distribute.disable"},
+ {"llvm.loop.vectorize.predicate.enable",
+ "llvm.loop.vectorize.predicate.disable"}};
+
+// Return the replacement tags if \p T still uses a removed two-operand form.
+static const BooleanLoopTags *getOldBooleanLoopTags(const MDTuple *T) {
+ if (T->getNumOperands() != 2 ||
!mdconst::hasa<ConstantInt>(T->getOperand(1)))
+ return nullptr;
auto *Tag = dyn_cast_or_null<MDString>(T->getOperand(0));
- if (!Tag || Tag->getString() != "llvm.loop.distribute.enable")
- return false;
- return mdconst::hasa<ConstantInt>(T->getOperand(1));
+ if (!Tag)
+ return nullptr;
+ const auto *Tags =
+ find_if(OldBooleanLoopTags, [Tag](const BooleanLoopTags &Candidate) {
+ return Candidate.Enable == Tag->getString();
+ });
+ return Tags == std::end(OldBooleanLoopTags) ? nullptr : Tags;
}
static bool isOldLoopArgument(Metadata *MD) {
@@ -7034,7 +7050,7 @@ static bool isOldLoopArgument(Metadata *MD) {
return false;
if (S->getString().starts_with("llvm.vectorizer."))
return true;
- return isOldDistributeEnable(T);
+ return getOldBooleanLoopTags(T) != nullptr;
}
static MDString *upgradeLoopTag(LLVMContext &C, StringRef OldTag) {
@@ -7061,12 +7077,11 @@ static Metadata *upgradeLoopArgument(Metadata *MD) {
LLVMContext &C = T->getContext();
- // Rewrite the old two-operand distribute form to the single-operand pair.
- if (isOldDistributeEnable(T)) {
+ // Rewrite a removed two-operand boolean form to the single-operand pair.
+ if (const BooleanLoopTags *Tags = getOldBooleanLoopTags(T)) {
bool Enable = !mdconst::extract<ConstantInt>(T->getOperand(1))->isZero();
return MDTuple::get(
- C, {MDString::get(C, Enable ? "llvm.loop.distribute.enable"
- : "llvm.loop.distribute.disable")});
+ C, {MDString::get(C, Enable ? Tags->Enable : Tags->Disable)});
}
if (!OldTag->getString().starts_with("llvm.vectorizer."))
@@ -7090,14 +7105,14 @@ MDNode *llvm::upgradeInstructionLoopAttachment(MDNode
&N) {
if (none_of(T->operands(), isOldLoopArgument))
return &N;
- // Fix the old two-operand llvm.loop.distribute.enable nodes in place: the
- // Verifier rejects any MDNode carrying the distribute tag with more than one
- // operand, so a leftover reference (from the distinct loop-ID) would still
- // trigger a diagnostic. In-place mutation is safe on distinct MDNodes.
+ // Fix the removed two-operand boolean nodes in place: the Verifier rejects
+ // any MDNode carrying those tags with more than one operand, so a leftover
+ // reference (from the distinct loop-ID) would still trigger a diagnostic.
+ // In-place mutation is safe on distinct MDNodes.
if (T->isDistinct()) {
for (unsigned I = 0, E = T->getNumOperands(); I < E; ++I) {
auto *OpT = dyn_cast_or_null<MDTuple>(T->getOperand(I));
- if (OpT && isOldDistributeEnable(OpT))
+ if (OpT && getOldBooleanLoopTags(OpT))
T->replaceOperandWith(I, upgradeLoopArgument(OpT));
}
if (none_of(T->operands(), isOldLoopArgument))
diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp
index c21b8c427ea46..2b72916ff40b2 100644
--- a/llvm/lib/IR/Verifier.cpp
+++ b/llvm/lib/IR/Verifier.cpp
@@ -1017,6 +1017,15 @@ void Verifier::visitMDNode(const MDNode &BaseMD,
"Expected one operand for llvm.loop.distribute metadata",
CurrentMD);
+ // Enforce the single-operand form of the vectorize predication metadata.
+ if (CurrentMD->getNumOperands() > 0 &&
+ (CurrentMD->getOperand(0).equalsStr(
+ "llvm.loop.vectorize.predicate.enable") ||
+ CurrentMD->getOperand(0).equalsStr(
+ "llvm.loop.vectorize.predicate.disable")))
+ Check(CurrentMD->getNumOperands() == 1,
+ "Expecting only the metadata name", CurrentMD);
+
// Check these last, so we diagnose problems in operands first.
Check(!CurrentMD->isTemporary(), "Expected no forward declarations!",
CurrentMD);
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
b/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
index 8d875b2b6e492..e1afd87f15fc3 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
@@ -287,6 +287,14 @@ void LoopVectorizeHints::getHintsFromMetadata() {
// Check if the hint starts with the loop metadata prefix.
StringRef Name = S->getString();
+ // The single-operand enable/disable pair carries no argument.
+ if (Args.empty()) {
+ if (Name == "llvm.loop.vectorize.predicate.enable")
+ Predicate.Value = FK_Enabled;
+ else if (Name == "llvm.loop.vectorize.predicate.disable")
+ Predicate.Value = FK_Disabled;
+ continue;
+ }
if (Args.size() == 1)
setHint(Name, Args[0]);
}
diff --git a/llvm/test/Bitcode/upgrade-loop-vectorize-predicate-enable.ll
b/llvm/test/Bitcode/upgrade-loop-vectorize-predicate-enable.ll
new file mode 100644
index 0000000000000..20e1f264e559c
--- /dev/null
+++ b/llvm/test/Bitcode/upgrade-loop-vectorize-predicate-enable.ll
@@ -0,0 +1,37 @@
+; Test that older bitcode carrying the two-operand form of
+; "llvm.loop.vectorize.predicate.enable" is auto-upgraded to the
+; single-operand enable/disable pair on load.
+;
+; RUN: llvm-dis < %s.bc | FileCheck %s
+; RUN: verify-uselistorder < %s.bc
+
+define void @enable_true() {
+entry:
+ br label %body
+body:
+ br i1 0, label %body, label %exit, !llvm.loop !0
+exit:
+ ret void
+}
+
+define void @enable_false() {
+entry:
+ br label %body
+body:
+ br i1 0, label %body, label %exit, !llvm.loop !2
+exit:
+ ret void
+}
+
+; i1 true -> single-operand enable.
+; i1 false -> disable.
+; CHECK: !{!"llvm.loop.vectorize.predicate.enable"}
+; CHECK: !{!"llvm.loop.vectorize.predicate.disable"}
+; The old two-operand nodes must be gone from the module.
+; CHECK-NOT: llvm.loop.vectorize.predicate.enable", i1
+; CHECK-NOT: llvm.loop.vectorize.predicate.disable", i1
+
+!0 = distinct !{!0, !1}
+!1 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!2 = distinct !{!2, !3}
+!3 = !{!"llvm.loop.vectorize.predicate.enable", i1 false}
diff --git a/llvm/test/Bitcode/upgrade-loop-vectorize-predicate-enable.ll.bc
b/llvm/test/Bitcode/upgrade-loop-vectorize-predicate-enable.ll.bc
new file mode 100644
index
0000000000000000000000000000000000000000..d8de6672e251bca832b2fa87a4b5980618df926e
GIT binary patch
literal 2368
zcmbtWZ%iBK8Gntj&neD(CZPo<cg|fP5z+{`nLn|yJ=wmLxmv0@X{1rD8=SETR4g&Z
z0YkUS&bb_Ey~?dv>JO=8)GF$xesDIl5sfV|X4Ih`%c5$EGRExkXJMm>OOh$oqG`{W
zsM?2ZUuNl^_fER^d7tO^=Q%t1Ys)QF2&oW49xYe*{ENT7^uvEleRFTN?x@13LaY{{
zePsw$l(7gFR0|goseQ|lEq_j}Gn(I4M70N08oi<X4NqA6Y?<@*+Gt&MG|PDF{W|VK
zmDj6#tLwUROk26*O_Mk3`ZQj--*qCa)w37Myje|Uo!Q<#ru$f7G)7&<lkStud(-yz
zKt!uIj*%C>V)WMNpTkD)Tt^_z*0#qF=;*d!cKppadvq*TZfr*AJOi~sP5XPwbw72U
zyRJI{AwDqcc0IM@AV05i8V_o;dldB!b=f7fu8~_nd)Q<6i|}uM{)^5BTNnSi>(a)`
zkt>gXlKI^hcV)?Q_0Po%zp`Gsy4LrDE2?+ixxO)w`0nW+{Ym)hFE>3uYdMjyA1{}4
z{EuJPxT>La&Xaepl_CDa*DC*g$1^B?i*bjJBE(dbm#{Y)5?X!bv3P99!LQGk^Dpm=
zA#}M0p&A83O`0$@SD<>T6t;2R6wSn(VPYgi3?>G&>xleJhaZG-lh$dNP1B2$R1c>r
zy(aF>DQ#Ka7E{`Cp;*vQyrLmST$0~UjQW*BA<553`dlU6jN<}Fp61AvA}+ddlWvY)
zW~o~&Ju4V`xbv17(Q<<~PbsZ4qBW|t<cd{8UBoNB#F1Vp05L52<C4FN7^)|R9;qPh
za9HZpNCP!eAR&z;A`N$o_--CQyoNV9r6)T{txi(8Qd|<K1(uqN&<le44{_d{<;{sw
zoX(ggc+<GjGLbn9hdw@M`9x_+WwamlN&XHg;1`3vM5s#&)=0smq+fi2yo<;!H(rh7
z6+2mA@FsM@)YD68!>q$_lckm-hNV2UTA=@`F!a<MH>LQti=rjxu6xo*moywALW$$Y
z9>hr*0mI9N1%bN5(#vW3RfRz=n5Bz?`s8b(DVMRNcpCunc-FegTgKrr6Z_3m(5W;G
z^=OFEdLodBytJajo7eD~8{g+@(>EQ4)k5{H0=*0cxb&8kXqyuEMl+@uZ_Z_`(`j=y
z13g-EuBibH0aXnEfE|+lkMnr5i~KCFE;8gAN3JpC-`)7M4zF++9`EPX8+p9y#*et#
zPd5c>HbUPjRBy8MI!n*7G%$FF-PgmsYnkC~(@OJ%XwG%a0Q=DFDAehahW(QM<G<j0
z99hWY4LiA!gi|sK<=_Vd^wOCCsmKTiZvd5%sKcDk0CYBBDrcWd(hHMx-eFiyQ$2Ov
z94^TGl8|JL<5}@+4Ke7FI+N1(!?5@Agu)ujSSK>38+;qcDF=vYUF_3N!2qQ$rs)%r
zs-9z~IDC&G@8#9^+~fl}6<*7$*BP>K1Dbu$E)Mk)BN|D6V$XEO0y=!3H{}3Br8zEI
zb4n|KIg!z}@0<tef}$p=S0jck1@Jh3Sq%z=JitZMuGSjKA0|dWAV%tevh<Y0lu}w|
zGN#96wwX-Z1k~2M#L%}D20(8f08H<c*%!vPN=Xp8a!oeNeNK#sC8p#aLH~pG#AxF4
zIY-+x6eh~LP4aEvK2Yy!CiV@y5TSF0>h(!#K4Q38pqC2OGIUU$!vHc{0Hak6`tid!
zUgcIM#i4p>$Pf9Y0lO4<qzbx-VbJ-DG&llE{ZQQdi3q2dA^8;Fc7y-gw89GdN$_nc
zpvJw~wXFndm8J3ux~F3p00dvyaRFkn;=Wt9$p*NxSn;<wzH7&5ghA+O7*B5-Tns<1
z)$j0nv)7pj4A}Pe_T3R@GXD8oR%3RK#XR;T%p)(n+uuL*y~h4CXZ(#rzV6_eK;NjZ
z(I4=6`?`gouhDl}@bvrSiT7ieVc&wa;&ne*)<g_<*kfQCrMV&WUxq>YSqw^F>ng=O
zUUB1XPhTzKtzyMpHwnh7h{>r!GL0%p9#PZ04VY{&ErH9^G-S>Rie_>R!90N0$u;QP
zPJ+G)e!P}SGEx8>pM<?;z%mAtMrmv4T@<L>VFSRnBp7aP6D2sB@H#M~!&`Rz03vL+
zlNB|gxD=3`Dx2P)lmd*T`p6vP_rhqo#hV*a^ATDe#_63ff#xAbfM;r6K`%t8ZG}EV
z7477f4nMS$cT(XFX@HZ09YsK9TC`1w){DGZo`T>Q(VEJfJ1<X4SvxS&whNowxz6sp
z?Vy$;G(x}EA*2S3iJTSGcd^t?QnbPljc0%^B-A6c8`fIQSdoKO3D@qZvxC*nsae?D
z7>ejpd3)(QRBbO`4AXW;^9#{;k>jPT{IOGbQ0d$M?J@f<cr5+?b576ym2-gEuFZ&b
z`=jU!Wli2yI_o>|ALIbs?NUx0ko(zIS7$JA*7xMLN9Z5)8JioqM($K!kl~trLaWi!
z-QqKLx3rjBO|7k7-w~g$RWNrq2_{dgAha}ln_6TM9}fBkgNL1c!R|9&-{G_VQvt#2
aJ0vUn(3i?S^rf;7Z6Da!-(RW>p??9IL0519
literal 0
HcmV?d00001
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
index 1138b19bd3471..c68421ac4a2a4 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
@@ -528,7 +528,7 @@ exit:
!0 = distinct !{!0, !1}
-!1 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!1 = !{!"llvm.loop.vectorize.predicate.enable"}
!2 = !{!"branch_weights", i32 10, i32 30}
;.
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
index 2f27092622192..80c5d3a89db8e 100644
---
a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
+++
b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
@@ -447,7 +447,7 @@ exit:
!7 = distinct !{!7, !8, !9, !10}
!8 = !{!"llvm.loop.mustprogress"}
-!9 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!9 = !{!"llvm.loop.vectorize.predicate.enable"}
!10 = !{!"llvm.loop.vectorize.enable", i1 true}
attributes #0 = { vscale_range(1,16) "target-features"="+sve" }
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
index 0985d7f052a90..dbb541eb032a6 100644
---
a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
+++
b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
@@ -393,7 +393,7 @@ for.exit:
!7 = distinct !{!7, !8, !9, !10}
!8 = !{!"llvm.loop.mustprogress"}
-!9 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!9 = !{!"llvm.loop.vectorize.predicate.enable"}
!10 = !{!"llvm.loop.vectorize.enable", i1 true}
attributes #0 = { vscale_range(1,16) "target-features"="+sve" }
attributes #1 = { "target-features"="+neon" }
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
index f0f9e8e74b3f5..6de37a2dc1dc4 100644
---
a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
+++
b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
@@ -2394,5 +2394,5 @@ exit:
!7 = distinct !{!7, !8, !9, !10}
!8 = !{!"llvm.loop.mustprogress"}
-!9 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!9 = !{!"llvm.loop.vectorize.predicate.enable"}
!10 = !{!"llvm.loop.vectorize.enable", i1 true}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
index 09e5959f7083c..0e09f6b5fd10c 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
@@ -2691,7 +2691,7 @@ for.body:
!7 = distinct !{!7, !8, !9, !10}
!8 = !{!"llvm.loop.mustprogress"}
-!9 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!9 = !{!"llvm.loop.vectorize.predicate.enable"}
!10 = !{!"llvm.loop.vectorize.enable", i1 true}
attributes #0 = { vscale_range(1,16) "target-features"="+sve" }
attributes #1 = { vscale_range(1,16) "target-features"="+neon,+dotprod,+sve"
"target-cpu"="neoverse-v2" }
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
index dd21d1994d95d..947c6625e9742 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
@@ -523,7 +523,7 @@ for.exit:
!7 = distinct !{!7, !8, !9, !10}
!8 = !{!"llvm.loop.mustprogress"}
-!9 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!9 = !{!"llvm.loop.vectorize.predicate.enable"}
!10 = !{!"llvm.loop.vectorize.enable", i1 true}
attributes #0 = { vscale_range(1,16) "target-features"="+sve" }
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
index 03938490e465c..9aa27cee2ecb8 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
@@ -1285,7 +1285,7 @@ exit:
!0 = distinct !{!0, !1}
-!1 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!1 = !{!"llvm.loop.vectorize.predicate.enable"}
attributes #0 = { vscale_range(1,16) "target-features"="+sve" }
attributes #1 = { vscale_range(1,16) "target-features"="+neon,+dotprod,+sve"
"target-cpu"="neoverse-v2" }
attributes #2 = { "target-features"="+neon,+dotprod" }
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
index 363223a66f398..72c225127fb9f 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
@@ -370,7 +370,7 @@ attributes #1 = { "target-cpu"="neoverse-v2" }
!0 = distinct !{!0, !1, !2, !3}
!1 = !{!"llvm.loop.mustprogress"}
-!2 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.predicate.enable"}
!3 = !{!"llvm.loop.vectorize.enable", i1 true}
; BFI computes if is taken 20 times, and loop 32 times. Make sure we round the
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
index 4b2e5d051730b..8ce6605696529 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
@@ -1417,5 +1417,5 @@ for.cond.cleanup:
!9 = !{!"llvm.loop.interleave.count", i32 1}
!10 = !{!"llvm.loop.interleave.count", i32 4}
!11 = !{!"llvm.loop.vectorize.enable", i1 true}
-!12 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!12 = !{!"llvm.loop.vectorize.predicate.enable"}
!13 = distinct !{!13, !6, !9, !11}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
index 2ec48b25af5b5..b6bef8c3fe15c 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
@@ -877,7 +877,7 @@ attributes #0 = { "target-features"="+sve2"
vscale_range(1,16) }
!0 = distinct !{!0, !1}
!1 = !{!"llvm.loop.interleave.count", i32 2}
!2 = distinct !{!2, !3}
-!3 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.predicate.enable"}
!4 = distinct !{!4, !5}
!5 = !{!"llvm.loop.interleave.count", i32 1}
!6 = !{!7}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
index 0b783375a33e1..d323dce104e66 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
@@ -150,7 +150,7 @@ while.end.loopexit:
}
!0 = distinct !{!0, !1, !2, !3, !4}
-!1 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!1 = !{!"llvm.loop.vectorize.predicate.enable"}
!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
!3 = !{!"llvm.loop.interleave.count", i32 1}
!4 = !{!"llvm.loop.vectorize.width", i32 4}
diff --git
a/llvm/test/Transforms/LoopVectorize/AArch64/widen-gep-all-indices-invariant.ll
b/llvm/test/Transforms/LoopVectorize/AArch64/widen-gep-all-indices-invariant.ll
index fbc313eddea8a..912b6a4215590 100644
---
a/llvm/test/Transforms/LoopVectorize/AArch64/widen-gep-all-indices-invariant.ll
+++
b/llvm/test/Transforms/LoopVectorize/AArch64/widen-gep-all-indices-invariant.ll
@@ -55,7 +55,7 @@ attributes #0 = { "target-cpu"="neoverse-v2" }
!0 = distinct !{!0, !1, !2}
!1 = !{!"llvm.loop.vectorize.enable", i1 true}
-!2 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.predicate.enable"}
;.
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]],
[[META2:![0-9]+]]}
; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
diff --git a/llvm/test/Transforms/LoopVectorize/ARM/prefer-tail-loop-folding.ll
b/llvm/test/Transforms/LoopVectorize/ARM/prefer-tail-loop-folding.ll
index 1b5db04061631..7e7b96d8a4113 100644
--- a/llvm/test/Transforms/LoopVectorize/ARM/prefer-tail-loop-folding.ll
+++ b/llvm/test/Transforms/LoopVectorize/ARM/prefer-tail-loop-folding.ll
@@ -425,7 +425,7 @@ attributes #0 = { nofree norecurse nounwind
"target-features"="+armv8.1-m.main,+
!6 = !{!"llvm.loop.vectorize.enable", i1 true}
!7 = distinct !{!7, !8}
-!8 = !{!"llvm.loop.vectorize.predicate.enable", i1 false}
+!8 = !{!"llvm.loop.vectorize.predicate.disable"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.vectorize.width", i32 4}
diff --git a/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-loop-hint.ll
b/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-loop-hint.ll
index f205e21762317..883621c2e524e 100644
--- a/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-loop-hint.ll
+++ b/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-loop-hint.ll
@@ -80,5 +80,5 @@ for.body:
; CHECK-NEXT: [[VEC_LOOP2]] = distinct !{[[VEC_LOOP2]], [[MD_IS_VEC]],
[[MD_RT_UNROLL_DIS]]}
!6 = distinct !{!6, !7, !8}
-!7 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!7 = !{!"llvm.loop.vectorize.predicate.enable"}
!8 = !{!"llvm.loop.vectorize.enable", i1 true}
diff --git a/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll
b/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll
index c7af4646ccdee..2e2a78db7cf6e 100644
--- a/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll
+++ b/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll
@@ -101,7 +101,7 @@ for.body:
}
!10 = distinct !{!10, !11, !12}
-!11 = !{!"llvm.loop.vectorize.predicate.enable", i1 false}
+!11 = !{!"llvm.loop.vectorize.predicate.disable"}
!12 = !{!"llvm.loop.vectorize.enable", i1 true}
!14 = distinct !{!14, !15}
diff --git
a/llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve-tail-folding-forced.ll
b/llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve-tail-folding-forced.ll
index 592dbbb2b5c52..15e57eda91e0e 100644
---
a/llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve-tail-folding-forced.ll
+++
b/llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve-tail-folding-forced.ll
@@ -85,4 +85,4 @@ while.end.loopexit:
attributes #0 = { "target-features"="+sve" }
!0 = distinct !{!0, !1}
-!1 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!1 = !{!"llvm.loop.vectorize.predicate.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-printing.ll
b/llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-printing.ll
index 5445a5e835fb6..91cb168e423ef 100644
--- a/llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-printing.ll
+++ b/llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-printing.ll
@@ -282,5 +282,5 @@ exit:
!0 = distinct !{!0, !2, !3}
!1 = distinct !{!1, !2, !4}
!2 = !{!"llvm.loop.interleave.count", i32 1}
-!3 = !{!"llvm.loop.vectorize.predicate.enable", i1 false}
-!4 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!3 = !{!"llvm.loop.vectorize.predicate.disable"}
+!4 = !{!"llvm.loop.vectorize.predicate.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/VPlan/constant-fold.ll
b/llvm/test/Transforms/LoopVectorize/VPlan/constant-fold.ll
index 92bb9704c4fd2..7c25540b5f8a1 100644
--- a/llvm/test/Transforms/LoopVectorize/VPlan/constant-fold.ll
+++ b/llvm/test/Transforms/LoopVectorize/VPlan/constant-fold.ll
@@ -319,4 +319,4 @@ exit:
!1 = distinct !{!1, !2, !3, !4}
!2 = !{!"llvm.loop.vectorize.width", i32 4}
!3 = !{!"llvm.loop.vectorize.enable", i1 true}
-!4 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!4 = !{!"llvm.loop.vectorize.predicate.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
b/llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
index 1a5188687b508..92e3053c86f6a 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
@@ -643,7 +643,7 @@ exit:
!1 = distinct !{!1, !2, !3, !4}
!2 = !{!"llvm.loop.vectorize.width", i32 4}
!3 = !{!"llvm.loop.vectorize.enable", i1 true}
-!4 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!4 = !{!"llvm.loop.vectorize.predicate.enable"}
define void @wide_iv_trunc_reuse(ptr %dst) {
; CHECK-LABEL: define void @wide_iv_trunc_reuse(
diff --git
a/llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
b/llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
index 52c504b090ae1..e8a731179ad57 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
@@ -146,9 +146,9 @@ attributes #0 = {
"target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "use-soft-float
!7 = !{!"llvm.loop.vectorize.enable", i1 true}
!8 = distinct !{!8, !9}
-!9 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!9 = !{!"llvm.loop.vectorize.predicate.enable"}
!10 = distinct !{}
!11 = distinct !{!11, !12, !13}
!12 = !{!"llvm.loop.parallel_accesses", !10}
-!13 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!13 = !{!"llvm.loop.vectorize.predicate.enable"}
diff --git a/llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
b/llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
index 90866061c4188..628d1c89a4832 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
@@ -171,8 +171,8 @@ for.cond.cleanup:
attributes #0 = { optsize "target-cpu"="core-avx2"
"target-features"="+avx,+avx2" }
!6 = distinct !{!6, !7, !8}
-!7 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!7 = !{!"llvm.loop.vectorize.predicate.enable"}
!8 = !{!"llvm.loop.vectorize.enable", i1 true}
!10 = distinct !{!10, !11}
-!11 = !{!"llvm.loop.vectorize.predicate.enable", i1 false}
+!11 = !{!"llvm.loop.vectorize.predicate.disable"}
diff --git
a/llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll
b/llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll
index 93c81c02d4e5d..f9710dc5c804c 100644
---
a/llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll
+++
b/llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll
@@ -128,7 +128,7 @@ done:
!0 = distinct !{!0, !1, !2, !3}
!1 = !{!"llvm.loop.unroll.disable"}
-!2 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.predicate.enable"}
!3 = !{!"llvm.loop.vectorize.enable", i1 true}
;.
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]],
[[META2:![0-9]+]], [[META3:![0-9]+]]}
diff --git a/llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
b/llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
index 24c42b8b48e44..0282b5c94c425 100644
--- a/llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
+++ b/llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
@@ -611,5 +611,5 @@ for.end:
}
!6 = distinct !{!6, !7, !8}
-!7 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!7 = !{!"llvm.loop.vectorize.predicate.enable"}
!8 = !{!"llvm.loop.vectorize.enable", i1 true}
diff --git a/llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
b/llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
index 241360af4fb01..9fa30c81fe507 100644
--- a/llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
+++ b/llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
@@ -3138,5 +3138,5 @@ for.exit:
!6 = distinct !{!6, !7, !8}
-!7 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!7 = !{!"llvm.loop.vectorize.predicate.enable"}
!8 = !{!"llvm.loop.vectorize.enable", i1 true}
diff --git
a/llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
b/llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
index 33a772285e423..cc2b22e8eaa8d 100644
--- a/llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
+++ b/llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
@@ -244,5 +244,5 @@ end:
}
!1 = distinct !{!1, !2, !3}
-!2 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.predicate.enable"}
!3 = !{!"llvm.loop.vectorize.enable", i1 true}
diff --git
a/llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-predicated-early-exit.ll
b/llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-predicated-early-exit.ll
index cd68c81f94054..d960a375b7e38 100644
---
a/llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-predicated-early-exit.ll
+++
b/llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-predicated-early-exit.ll
@@ -50,5 +50,5 @@ exit:
!0 = distinct !{!0, !1, !2, !3}
!1 = !{!"llvm.loop.mustprogress"}
-!2 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+!2 = !{!"llvm.loop.vectorize.predicate.enable"}
!3 = !{!"llvm.loop.vectorize.enable", i1 true}
diff --git a/llvm/test/Verifier/llvm.loop.vectorize.predicate.ll
b/llvm/test/Verifier/llvm.loop.vectorize.predicate.ll
new file mode 100644
index 0000000000000..943efa88c22ad
--- /dev/null
+++ b/llvm/test/Verifier/llvm.loop.vectorize.predicate.ll
@@ -0,0 +1,41 @@
+; Test "llvm.loop.vectorize.predicate.enable" /
+; "llvm.loop.vectorize.predicate.disable" single-operand validation.
+
+; DEFINE: %{VERIFY} = llvm-as -disable-output %t 2>&1
+
+define void @test() {
+entry:
+ br label %body
+body:
+ br i1 0, label %body, label %exit, !llvm.loop !0
+exit:
+ ret void
+}
+!0 = distinct !{!0, !1}
+
+; BAD: Expecting only the metadata name
+
+; Single-operand enable.
+; RUN: cat %s > %t
+; RUN: echo '!1 = !{!"llvm.loop.vectorize.predicate.enable"}' >> %t
+; RUN: %{VERIFY}
+
+; Single-operand disable.
+; RUN: cat %s > %t
+; RUN: echo '!1 = !{!"llvm.loop.vectorize.predicate.disable"}' >> %t
+; RUN: %{VERIFY}
+
+; Two-operand enable with boolean false (legacy form, now rejected).
+; RUN: cat %s > %t
+; RUN: echo '!1 = !{!"llvm.loop.vectorize.predicate.enable", i1 0}' >> %t
+; RUN: not %{VERIFY} | FileCheck %s -check-prefix=BAD
+
+; Two-operand enable with boolean true (legacy form, now rejected).
+; RUN: cat %s > %t
+; RUN: echo '!1 = !{!"llvm.loop.vectorize.predicate.enable", i1 1}' >> %t
+; RUN: not %{VERIFY} | FileCheck %s -check-prefix=BAD
+
+; Two-operand disable (rejected).
+; RUN: cat %s > %t
+; RUN: echo '!1 = !{!"llvm.loop.vectorize.predicate.disable", i1 0}' >> %t
+; RUN: not %{VERIFY} | FileCheck %s -check-prefix=BAD
diff --git a/mlir/lib/Target/LLVMIR/LoopAnnotationImporter.cpp
b/mlir/lib/Target/LLVMIR/LoopAnnotationImporter.cpp
index fcb11ca4629fa..62d72835c17bf 100644
--- a/mlir/lib/Target/LLVMIR/LoopAnnotationImporter.cpp
+++ b/mlir/lib/Target/LLVMIR/LoopAnnotationImporter.cpp
@@ -288,7 +288,8 @@ FailureOr<LoopVectorizeAttr>
LoopMetadataConversion::convertVectorizeAttr() {
FailureOr<BoolAttr> enable =
lookupBoolNode("llvm.loop.vectorize.enable", true);
FailureOr<BoolAttr> predicateEnable =
- lookupBoolNode("llvm.loop.vectorize.predicate.enable");
+ lookupBooleanUnitNode("llvm.loop.vectorize.predicate.enable",
+ "llvm.loop.vectorize.predicate.disable");
FailureOr<BoolAttr> scalableEnable =
lookupBoolNode("llvm.loop.vectorize.scalable.enable");
FailureOr<IntegerAttr> width = lookupIntNode("llvm.loop.vectorize.width");
diff --git a/mlir/lib/Target/LLVMIR/LoopAnnotationTranslation.cpp
b/mlir/lib/Target/LLVMIR/LoopAnnotationTranslation.cpp
index 41ba31106f788..bb1eb3b38201a 100644
--- a/mlir/lib/Target/LLVMIR/LoopAnnotationTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/LoopAnnotationTranslation.cpp
@@ -31,6 +31,8 @@ struct LoopAnnotationConversion {
void addUnitNode(StringRef name, BoolAttr attr);
void addI32NodeWithVal(StringRef name, uint32_t val);
void convertBoolNode(StringRef name, BoolAttr attr, bool negated = false);
+ void convertBooleanUnitNode(StringRef enableName, StringRef disableName,
+ BoolAttr attr, bool negated = false);
void convertI32Node(StringRef name, IntegerAttr attr);
void convertFollowupNode(StringRef name, LoopAnnotationAttr attr);
void convertLocation(FusedLoc attr);
@@ -83,6 +85,17 @@ void LoopAnnotationConversion::convertBoolNode(StringRef
name, BoolAttr attr,
llvm::ConstantAsMetadata::get(cstValue)}));
}
+/// Emits the single-operand node of an enable/disable pair. As in
+/// convertBoolNode, \p negated ^ the attribute value is the enable bit.
+void LoopAnnotationConversion::convertBooleanUnitNode(StringRef enableName,
+ StringRef disableName,
+ BoolAttr attr,
+ bool negated) {
+ if (!attr)
+ return;
+ addUnitNode((negated ^ attr.getValue()) ? enableName : disableName);
+}
+
void LoopAnnotationConversion::convertI32Node(StringRef name,
IntegerAttr attr) {
if (!attr)
@@ -104,8 +117,9 @@ void
LoopAnnotationConversion::convertFollowupNode(StringRef name,
void LoopAnnotationConversion::convertLoopOptions(LoopVectorizeAttr options) {
convertBoolNode("llvm.loop.vectorize.enable", options.getDisable(), true);
- convertBoolNode("llvm.loop.vectorize.predicate.enable",
- options.getPredicateEnable());
+ convertBooleanUnitNode("llvm.loop.vectorize.predicate.enable",
+ "llvm.loop.vectorize.predicate.disable",
+ options.getPredicateEnable());
convertBoolNode("llvm.loop.vectorize.scalable.enable",
options.getScalableEnable());
convertI32Node("llvm.loop.vectorize.width", options.getWidth());
@@ -162,12 +176,9 @@ void
LoopAnnotationConversion::convertLoopOptions(LoopLICMAttr options) {
}
void LoopAnnotationConversion::convertLoopOptions(LoopDistributeAttr options) {
- if (auto disable = options.getDisable()) {
- if (disable.getValue())
- addUnitNode("llvm.loop.distribute.disable");
- else
- addUnitNode("llvm.loop.distribute.enable");
- }
+ convertBooleanUnitNode("llvm.loop.distribute.enable",
+ "llvm.loop.distribute.disable", options.getDisable(),
+ /*negated=*/true);
convertFollowupNode("llvm.loop.distribute.followup_coincident",
options.getFollowupCoincident());
convertFollowupNode("llvm.loop.distribute.followup_sequential",
diff --git a/mlir/test/Target/LLVMIR/Import/metadata-loop.ll
b/mlir/test/Target/LLVMIR/Import/metadata-loop.ll
index 021818ded3d3c..17f75d3580ae8 100644
--- a/mlir/test/Target/LLVMIR/Import/metadata-loop.ll
+++ b/mlir/test/Target/LLVMIR/Import/metadata-loop.ll
@@ -87,7 +87,7 @@ end:
!1 = distinct !{!1, !2, !3, !4, !5, !6, !7, !8}
!2 = !{!"llvm.loop.vectorize.enable", i1 1}
-!3 = !{!"llvm.loop.vectorize.predicate.enable", i1 1}
+!3 = !{!"llvm.loop.vectorize.predicate.enable"}
!4 = !{!"llvm.loop.vectorize.scalable.enable", i1 0}
!5 = !{!"llvm.loop.vectorize.width", i32 16}
!6 = !{!"llvm.loop.vectorize.followup_vectorized", !9}
diff --git a/mlir/test/Target/LLVMIR/loop-metadata.mlir
b/mlir/test/Target/LLVMIR/loop-metadata.mlir
index 299bcb481f67f..743d659f37a6b 100644
--- a/mlir/test/Target/LLVMIR/loop-metadata.mlir
+++ b/mlir/test/Target/LLVMIR/loop-metadata.mlir
@@ -56,7 +56,7 @@ llvm.func @vectorizeOptions() {
// CHECK-DAG: ![[FOLLOWUP:[0-9]+]] = distinct !{![[FOLLOWUP]], ![[NON_FORCED]]}
// CHECK-DAG: ![[LOOP_NODE]] = distinct !{![[LOOP_NODE]], !{{[0-9]+}},
!{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}}
// CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.enable", i1 true}
-// CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
+// CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.predicate.enable"}
// CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.scalable.enable", i1 false}
// CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.width", i32 16}
// CHECK-DAG: !{{[0-9]+}} = !{!"llvm.loop.vectorize.followup_vectorized",
![[FOLLOWUP]]}
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