https://github.com/jhuber6 updated https://github.com/llvm/llvm-project/pull/211804
>From 8273620d6b1d5fb3c3f27fbc8a3dff57a2b0942f Mon Sep 17 00:00:00 2001 From: Joseph Huber <[email protected]> Date: Fri, 24 Jul 2026 09:10:47 -0500 Subject: [PATCH 1/5] [LLVM] Respect `optnone` in `promote-args` and `deadargelim` Summary: These passes can rewrite the signatures, and already have checks the prevent us modifying things like external or naked functions for correctness. The`optnone` attribute deliberately allows some optimizations to take place, but I think that rewriting function signatures and changing calling conventions is unexpected behavior. The motivation behind this was GDB users observing debug info changes w/ and w/o LTO. Observed because LTO passes `lto<O2>` by default and normally relies on `optnone` and `noinline` to preserve semantics. This is the 'proper' fix to https://github.com/llvm/llvm-project/pull/211790 which can land if the pass maintainers believe this is incorrect. --- .../amdgpu-enqueue-kernel-linking.cl | 4 +-- llvm/include/llvm/IR/GlobalValue.h | 10 ++++-- llvm/lib/IR/Globals.cpp | 7 ++++ .../Transforms/ArgumentPromotion/optnone.ll | 36 +++++++++++++++++++ llvm/test/Transforms/Attributor/nonnull.ll | 2 +- llvm/test/Transforms/DeadArgElim/optnone.ll | 30 ++++++++++++++++ llvm/test/Transforms/FunctionAttrs/nonnull.ll | 13 +++---- llvm/test/Transforms/GlobalOpt/optnone.ll | 21 +++++++++++ 8 files changed, 108 insertions(+), 15 deletions(-) create mode 100644 llvm/test/Transforms/ArgumentPromotion/optnone.ll create mode 100644 llvm/test/Transforms/DeadArgElim/optnone.ll create mode 100644 llvm/test/Transforms/GlobalOpt/optnone.ll diff --git a/clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel-linking.cl b/clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel-linking.cl index bdb5918b00814..97446c61f9ec7 100644 --- a/clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel-linking.cl +++ b/clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel-linking.cl @@ -30,7 +30,7 @@ // CHECK-LABEL: define dso_local amdgpu_kernel void @test_kernel_first( -// CHECK-LABEL: define internal fastcc void @static_invoker(ptr addrspace(1) noundef %outptr, ptr addrspace(1) noundef %argptr) +// CHECK-LABEL: define internal void @static_invoker(ptr addrspace(1) noundef %outptr, ptr addrspace(1) noundef %argptr) // CHECK: call i32 @__enqueue_kernel_basic(ptr addrspace(1) %{{[0-9]+}}, i32 %{{[0-9]+}}, ptr addrspace(5) %tmp, ptr addrspacecast (ptr addrspace(1) @__static_invoker_block_invoke_kernel.runtime.handle to ptr), ptr %{{.+}}) // CHECK: declare i32 @__enqueue_kernel_basic(ptr addrspace(1), i32, ptr addrspace(5), ptr, ptr) local_unnamed_addr @@ -48,7 +48,7 @@ // CHECK-LABEL: define dso_local amdgpu_kernel void @test_kernel_second(ptr addrspace(1) noundef align 4 %outptr, ptr addrspace(1) noundef align 4 %argptr, ptr addrspace(1) noundef align 4 %difference) -// CHECK-LABEL: define internal fastcc void @static_invoker.5(ptr addrspace(1) noundef %outptr, ptr addrspace(1) noundef %argptr) unnamed_addr #{{[0-9]+}} { +// CHECK-LABEL: define internal void @static_invoker.5(ptr addrspace(1) noundef %outptr, ptr addrspace(1) noundef %argptr) unnamed_addr #{{[0-9]+}} { // CHECK: call i32 @__enqueue_kernel_basic(ptr addrspace(1) %{{[0-9]+}}, i32 %{{[0-9]+}}, ptr addrspace(5) %tmp, ptr addrspacecast (ptr addrspace(1) @__static_invoker_block_invoke_kernel.runtime.handle.3 to ptr), ptr %{{.+}}) diff --git a/llvm/include/llvm/IR/GlobalValue.h b/llvm/include/llvm/IR/GlobalValue.h index d7b0f1f25f929..f6a2f6a5d6663 100644 --- a/llvm/include/llvm/IR/GlobalValue.h +++ b/llvm/include/llvm/IR/GlobalValue.h @@ -153,9 +153,9 @@ class GlobalValue : public Constant { case PrivateLinkage: // Optimizations may assume builtin semantics for functions defined as // nobuiltin due to attributes at call-sites. To avoid applying IPO based - // on nobuiltin semantics, treat such function definitions as maybe - // derefined. - return isInterposable() || isNobuiltinFnDef(); + // on nobuiltin or optnone semantics, treat such function definitions as + // maybe derefined. + return isInterposable() || isNobuiltinFnDef() || isOptNoneFnDef(); } llvm_unreachable("Fully covered switch above!"); @@ -169,6 +169,10 @@ class GlobalValue : public Constant { /// attribute. LLVM_ABI bool isNoipaFnDef() const; + /// Returns true if the global is a function definition with the optnone + /// attribute. + LLVM_ABI bool isOptNoneFnDef() const; + protected: /// The intrinsic ID for this subclass (which must be a Function). /// diff --git a/llvm/lib/IR/Globals.cpp b/llvm/lib/IR/Globals.cpp index 3428f662e9120..53351f38a4afa 100644 --- a/llvm/lib/IR/Globals.cpp +++ b/llvm/lib/IR/Globals.cpp @@ -405,6 +405,13 @@ bool GlobalValue::isNoipaFnDef() const { return F->hasFnAttribute(Attribute::NoIPA); } +bool GlobalValue::isOptNoneFnDef() const { + const Function *F = dyn_cast<Function>(this); + if (!F || F->isDeclaration()) + return false; + return F->hasFnAttribute(Attribute::OptimizeNone); +} + bool GlobalValue::isDeclaration() const { // Globals are definitions if they have an initializer. if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(this)) diff --git a/llvm/test/Transforms/ArgumentPromotion/optnone.ll b/llvm/test/Transforms/ArgumentPromotion/optnone.ll new file mode 100644 index 0000000000000..36e97f402991c --- /dev/null +++ b/llvm/test/Transforms/ArgumentPromotion/optnone.ll @@ -0,0 +1,36 @@ +; RUN: opt -passes=argpromotion -S < %s | FileCheck %s + +declare void @sink(i32) + +; CHECK-LABEL: define internal void @optnone_promote(ptr %X) +; CHECK-NOT: DW_CC_nocall +define internal void @optnone_promote(ptr %X) optnone noinline !dbg !4 { + %v = load i32, ptr %X, align 4 + call void @sink(i32 %v) + ret void +} + +; CHECK-LABEL: define internal void @promote(i32 %X.0.val) +define internal void @promote(ptr %X) { + %v = load i32, ptr %X, align 4 + call void @sink(i32 %v) + ret void +} + +define void @caller(ptr %Y, ptr %Z) { + call void @optnone_promote(ptr %Y) + call void @promote(ptr %Z) + ret void +} + +!llvm.dbg.cu = !{!0} +!llvm.module.flags = !{!3} + +!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug) +!1 = !DIFile(filename: "optnone.c", directory: "/") +!2 = !DISubroutineType(types: !5) +!3 = !{i32 2, !"Debug Info Version", i32 3} +!4 = distinct !DISubprogram(name: "optnone_promote", scope: !1, file: !1, line: 1, type: !2, scopeLine: 1, spFlags: DISPFlagDefinition, unit: !0) +!5 = !{null, !6} +!6 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !7, size: 64) +!7 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed) diff --git a/llvm/test/Transforms/Attributor/nonnull.ll b/llvm/test/Transforms/Attributor/nonnull.ll index 0aa0e72d403ab..9ff81966ad1d0 100644 --- a/llvm/test/Transforms/Attributor/nonnull.ll +++ b/llvm/test/Transforms/Attributor/nonnull.ll @@ -1057,7 +1057,7 @@ define internal void @optnone(ptr dereferenceable(4) %a) optnone noinline { ; ; CHECK: Function Attrs: noinline optnone ; CHECK-LABEL: define {{[^@]+}}@optnone -; CHECK-SAME: (ptr noundef nonnull dereferenceable(4) [[A:%.*]]) #[[ATTR12:[0-9]+]] { +; CHECK-SAME: (ptr dereferenceable(4) [[A:%.*]]) #[[ATTR12:[0-9]+]] { ; CHECK-NEXT: call void @use_i32_ptr(ptr nofree noundef nonnull captures(none) [[A]]) ; CHECK-NEXT: ret void ; diff --git a/llvm/test/Transforms/DeadArgElim/optnone.ll b/llvm/test/Transforms/DeadArgElim/optnone.ll new file mode 100644 index 0000000000000..ae09a56c24d98 --- /dev/null +++ b/llvm/test/Transforms/DeadArgElim/optnone.ll @@ -0,0 +1,30 @@ +; RUN: opt -passes=deadargelim -S < %s | FileCheck %s + +; CHECK-LABEL: define internal i32 @optnone_dead_arg(i32 %live, i32 %dead) +; CHECK-NOT: DW_CC_nocall +define internal i32 @optnone_dead_arg(i32 %live, i32 %dead) optnone noinline !dbg !4 { + ret i32 %live +} + +; CHECK-LABEL: define internal i32 @dead_arg(i32 %live) +define internal i32 @dead_arg(i32 %live, i32 %dead) { + ret i32 %live +} + +define i32 @caller() { + %a = call i32 @optnone_dead_arg(i32 1, i32 2) + %b = call i32 @dead_arg(i32 3, i32 4) + %c = add i32 %a, %b + ret i32 %c +} + +!llvm.dbg.cu = !{!0} +!llvm.module.flags = !{!3} + +!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug) +!1 = !DIFile(filename: "optnone.c", directory: "/") +!2 = !DISubroutineType(types: !7) +!3 = !{i32 2, !"Debug Info Version", i32 3} +!4 = distinct !DISubprogram(name: "optnone_dead_arg", scope: !1, file: !1, line: 1, type: !2, scopeLine: 1, spFlags: DISPFlagDefinition, unit: !0) +!7 = !{!8, !8, !8} +!8 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed) diff --git a/llvm/test/Transforms/FunctionAttrs/nonnull.ll b/llvm/test/Transforms/FunctionAttrs/nonnull.ll index 5b160438fb4ea..69822490dc341 100644 --- a/llvm/test/Transforms/FunctionAttrs/nonnull.ll +++ b/llvm/test/Transforms/FunctionAttrs/nonnull.ll @@ -1090,15 +1090,10 @@ define internal void @naked(ptr dereferenceable(4) %a) naked { } ; Avoid nonnull as we do not touch optnone define internal void @optnone(ptr dereferenceable(4) %a) optnone noinline { -; FNATTRS-LABEL: define internal void @optnone( -; FNATTRS-SAME: ptr dereferenceable(4) [[A:%.*]]) #[[ATTR12:[0-9]+]] { -; FNATTRS-NEXT: call void @use_i32_ptr(ptr [[A]]) -; FNATTRS-NEXT: ret void -; -; ATTRIBUTOR-LABEL: define internal void @optnone( -; ATTRIBUTOR-SAME: ptr nonnull dereferenceable(4) [[A:%.*]]) #[[ATTR12:[0-9]+]] { -; ATTRIBUTOR-NEXT: call void @use_i32_ptr(ptr [[A]]) -; ATTRIBUTOR-NEXT: ret void +; COMMON-LABEL: define internal void @optnone( +; COMMON-SAME: ptr dereferenceable(4) [[A:%.*]]) #[[ATTR12:[0-9]+]] { +; COMMON-NEXT: call void @use_i32_ptr(ptr [[A]]) +; COMMON-NEXT: ret void ; call void @use_i32_ptr(ptr %a) ret void diff --git a/llvm/test/Transforms/GlobalOpt/optnone.ll b/llvm/test/Transforms/GlobalOpt/optnone.ll new file mode 100644 index 0000000000000..5b6ec84d1c806 --- /dev/null +++ b/llvm/test/Transforms/GlobalOpt/optnone.ll @@ -0,0 +1,21 @@ +; RUN: opt -passes=globalopt -S < %s | FileCheck %s + +; GlobalOpt should not change the calling convention of an optnone function, +; since that rewrites its ABI in a way optnone is meant to prevent. + +; CHECK: define internal fastcc i32 @foo( +define internal i32 @foo(i32 %x) noinline { + ret i32 %x +} + +; CHECK: define internal i32 @foo_optnone( +define internal i32 @foo_optnone(i32 %x) optnone noinline { + ret i32 %x +} + +define i32 @bar() { + %r = call i32 @foo(i32 5) + %s = call i32 @foo_optnone(i32 5) + %res = add i32 %r, %s + ret i32 %res +} >From c9b56866c68a0c6d80a523171257de2cfc1338a4 Mon Sep 17 00:00:00 2001 From: Joseph Huber <[email protected]> Date: Mon, 27 Jul 2026 09:57:56 -0500 Subject: [PATCH 2/5] fix devirt --- .../ELF/lto/devirt_validate_vtable_typeinfos_mixed_lto.ll | 6 ++---- llvm/test/ThinLTO/X86/Inputs/devirt2.ll | 2 +- .../ThinLTO/X86/Inputs/devirt_external_comdat_same_guid.ll | 2 +- llvm/test/ThinLTO/X86/Inputs/devirt_promote.ll | 2 +- llvm/test/ThinLTO/X86/devirt2.ll | 4 ++-- llvm/test/ThinLTO/X86/devirt_external_comdat_same_guid.ll | 5 ++--- llvm/test/ThinLTO/X86/devirt_promote.ll | 5 ++--- llvm/test/ThinLTO/X86/devirt_promote_legacy.ll | 5 ++--- 8 files changed, 13 insertions(+), 18 deletions(-) diff --git a/lld/test/ELF/lto/devirt_validate_vtable_typeinfos_mixed_lto.ll b/lld/test/ELF/lto/devirt_validate_vtable_typeinfos_mixed_lto.ll index 9dacbc32175a7..f6baef92790c7 100644 --- a/lld/test/ELF/lto/devirt_validate_vtable_typeinfos_mixed_lto.ll +++ b/lld/test/ELF/lto/devirt_validate_vtable_typeinfos_mixed_lto.ll @@ -81,8 +81,6 @@ define i32 @_start(ptr %obj, ptr %obj2, i32 %a) { %fptr33 = load ptr, ptr %vtable2, align 8 - ;; Check that the call was devirtualized. - ; CHECK-IR: %call3 = tail call i32 @_ZN1D1mEi %call3 = tail call i32 %fptr33(ptr nonnull %obj2, i32 %call2) ret i32 %call3 @@ -107,7 +105,7 @@ define internal i32 @_ZN1D1mEi(ptr %this, i32 %a) #0 { } ;; Make sure we don't inline or otherwise optimize out the direct calls. -attributes #0 = { noinline optnone } +attributes #0 = { noinline } !0 = !{i64 16, !"_ZTS1A"} !1 = !{i64 16, !"_ZTSM1AFviE.virtual"} @@ -170,7 +168,7 @@ define linkonce_odr i32 @_ZN1A1nEi(ptr %this, i32 %a) #0 { ret i32 0; } -attributes #0 = { noinline optnone } +attributes #0 = { noinline } !llvm.module.flags = !{!6, !7} !0 = !{i64 16, !"_ZTS1A"} diff --git a/llvm/test/ThinLTO/X86/Inputs/devirt2.ll b/llvm/test/ThinLTO/X86/Inputs/devirt2.ll index b248d774b10fe..de3dba79dbdea 100644 --- a/llvm/test/ThinLTO/X86/Inputs/devirt2.ll +++ b/llvm/test/ThinLTO/X86/Inputs/devirt2.ll @@ -44,7 +44,7 @@ entry: ret i32 %call4 } -attributes #0 = { noinline optnone } +attributes #0 = { noinline } declare i1 @llvm.type.test(ptr, metadata) declare void @llvm.assume(i1) diff --git a/llvm/test/ThinLTO/X86/Inputs/devirt_external_comdat_same_guid.ll b/llvm/test/ThinLTO/X86/Inputs/devirt_external_comdat_same_guid.ll index f56c4bf236761..d0dc3775fc9cd 100644 --- a/llvm/test/ThinLTO/X86/Inputs/devirt_external_comdat_same_guid.ll +++ b/llvm/test/ThinLTO/X86/Inputs/devirt_external_comdat_same_guid.ll @@ -31,7 +31,7 @@ entry: ret i32 %call4 } -attributes #0 = { noinline optnone } +attributes #0 = { noinline } declare i1 @llvm.type.test(ptr, metadata) declare void @llvm.assume(i1) diff --git a/llvm/test/ThinLTO/X86/Inputs/devirt_promote.ll b/llvm/test/ThinLTO/X86/Inputs/devirt_promote.ll index 7f87fc54e7537..cada03cf1cf0f 100644 --- a/llvm/test/ThinLTO/X86/Inputs/devirt_promote.ll +++ b/llvm/test/ThinLTO/X86/Inputs/devirt_promote.ll @@ -27,7 +27,7 @@ entry: ret i32 %call4 } -attributes #0 = { noinline optnone } +attributes #0 = { noinline } declare i1 @llvm.type.test(ptr, metadata) declare void @llvm.assume(i1) diff --git a/llvm/test/ThinLTO/X86/devirt2.ll b/llvm/test/ThinLTO/X86/devirt2.ll index 9e91efeba0da4..5a79725db9d61 100644 --- a/llvm/test/ThinLTO/X86/devirt2.ll +++ b/llvm/test/ThinLTO/X86/devirt2.ll @@ -207,12 +207,12 @@ entry: ; Check that the call was devirtualized. Ignore extra character before ; symbol name which would happen if it was promoted during module ; splitting for hybrid WPD. -; CHECK-IR2-NEXT: %call4 = tail call i32 @{{.*}}_ZN1E1mEi +; CHECK-IR2-NEXT: ret i32 0 declare i1 @llvm.type.test(ptr, metadata) declare void @llvm.assume(i1) declare i32 @test2(ptr %obj, i32 %a) -attributes #0 = { noinline optnone } +attributes #0 = { noinline } !3 = !{i64 16, !"_ZTS1D"} diff --git a/llvm/test/ThinLTO/X86/devirt_external_comdat_same_guid.ll b/llvm/test/ThinLTO/X86/devirt_external_comdat_same_guid.ll index d0b8d14777f52..ddf794bb4f00a 100644 --- a/llvm/test/ThinLTO/X86/devirt_external_comdat_same_guid.ll +++ b/llvm/test/ThinLTO/X86/devirt_external_comdat_same_guid.ll @@ -64,8 +64,7 @@ entry: %fptrptr = getelementptr ptr, ptr %vtable, i32 1 %fptr1 = load ptr, ptr %fptrptr, align 8 - ; Check that the call was devirtualized. - ; CHECK-IR1: tail call i32 {{.*}}@_ZN1B1nEi + ; CHECK-IR1: ret i32 0 %call = tail call i32 %fptr1(ptr nonnull %obj, i32 %a) ret i32 %call @@ -78,7 +77,7 @@ entry: declare i1 @llvm.type.test(ptr, metadata) declare void @llvm.assume(i1) -attributes #0 = { noinline optnone } +attributes #0 = { noinline } !0 = !{i64 16, !"_ZTS1A"} !1 = !{i64 16, !"_ZTS1B"} diff --git a/llvm/test/ThinLTO/X86/devirt_promote.ll b/llvm/test/ThinLTO/X86/devirt_promote.ll index d00701be3a175..080ae1c02dd9e 100644 --- a/llvm/test/ThinLTO/X86/devirt_promote.ll +++ b/llvm/test/ThinLTO/X86/devirt_promote.ll @@ -64,10 +64,9 @@ entry: ; CHECK-IR1-LABEL: } ; CHECK-IR2: define noundef i32 @test2 -; Check that the call was devirtualized. -; CHECK-IR2: %call4 = tail call i32 @_ZN1A1nEi +; CHECK-IR2: ret i32 0 declare i1 @llvm.type.test(ptr, metadata) declare void @llvm.assume(i1) -attributes #0 = { noinline optnone } +attributes #0 = { noinline } diff --git a/llvm/test/ThinLTO/X86/devirt_promote_legacy.ll b/llvm/test/ThinLTO/X86/devirt_promote_legacy.ll index 542c1e85b6dde..319c6049ad383 100644 --- a/llvm/test/ThinLTO/X86/devirt_promote_legacy.ll +++ b/llvm/test/ThinLTO/X86/devirt_promote_legacy.ll @@ -46,10 +46,9 @@ entry: ; CHECK-IR1-LABEL: } ; CHECK-IR2: define noundef i32 @test2 -; Check that the call was devirtualized. -; CHECK-IR2: = tail call i32 @_ZN1A1nEi +; CHECK-IR2: ret i32 0 declare i1 @llvm.type.test(ptr, metadata) declare void @llvm.assume(i1) -attributes #0 = { noinline optnone } +attributes #0 = { noinline } >From 965ed42ff61d808271ed70e2e9234d91df7abfb9 Mon Sep 17 00:00:00 2001 From: Joseph Huber <[email protected]> Date: Mon, 27 Jul 2026 16:42:22 -0500 Subject: [PATCH 3/5] tests --- clang/test/CodeGen/link-bitcode-file.c | 2 +- .../CodeGen/AMDGPU/insert-delay-alu-bug.ll | 240 ++++++++++-------- .../AArch64/link-branch-target-enforcement.ll | 6 +- llvm/unittests/Analysis/GlobalsModRefTest.cpp | 5 +- 4 files changed, 135 insertions(+), 118 deletions(-) diff --git a/clang/test/CodeGen/link-bitcode-file.c b/clang/test/CodeGen/link-bitcode-file.c index 58fee64a95138..4f5d6a1bf978b 100644 --- a/clang/test/CodeGen/link-bitcode-file.c +++ b/clang/test/CodeGen/link-bitcode-file.c @@ -35,7 +35,7 @@ int f2(void) { return 43; } #else // CHECK-NO-BC-LABEL: define{{.*}} i32 @g -// CHECK-NO-BC: ret i32 42 +// CHECK-NO-BC: call i32 @f int g(void) { return f(); } diff --git a/llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll b/llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll index 6ec64dbe69b08..412352dad7204 100644 --- a/llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll +++ b/llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll @@ -23,27 +23,29 @@ define void @f0() { ; GFX11-LABEL: f0: ; GFX11: ; %bb.0: ; %bb ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX11-NEXT: s_mov_b32 s16, s33 +; GFX11-NEXT: s_mov_b32 s0, s33 ; GFX11-NEXT: s_mov_b32 s33, s32 -; GFX11-NEXT: s_xor_saveexec_b32 s0, -1 -; GFX11-NEXT: scratch_store_b32 off, v4, s33 ; 4-byte Folded Spill -; GFX11-NEXT: s_mov_b32 exec_lo, s0 -; GFX11-NEXT: v_writelane_b32 v4, s30, 0 +; GFX11-NEXT: s_or_saveexec_b32 s1, -1 +; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill +; GFX11-NEXT: s_mov_b32 exec_lo, s1 +; GFX11-NEXT: v_writelane_b32 v40, s0, 2 +; GFX11-NEXT: v_writelane_b32 v40, s30, 0 ; GFX11-NEXT: s_add_i32 s32, s32, 16 -; GFX11-NEXT: v_writelane_b32 v4, s31, 1 +; GFX11-NEXT: v_writelane_b32 v40, s31, 1 ; GFX11-NEXT: s_getpc_b64 s[0:1] ; GFX11-NEXT: s_add_u32 s0, s0, f1@gotpcrel32@lo+4 ; GFX11-NEXT: s_addc_u32 s1, s1, f1@gotpcrel32@hi+12 ; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0 ; GFX11-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1] -; GFX11-NEXT: v_readlane_b32 s30, v4, 0 -; GFX11-NEXT: v_readlane_b32 s31, v4, 1 +; GFX11-NEXT: v_readlane_b32 s30, v40, 0 +; GFX11-NEXT: v_readlane_b32 s31, v40, 1 ; GFX11-NEXT: s_mov_b32 s32, s33 -; GFX11-NEXT: s_xor_saveexec_b32 s0, -1 -; GFX11-NEXT: scratch_load_b32 v4, off, s33 ; 4-byte Folded Reload -; GFX11-NEXT: s_mov_b32 exec_lo, s0 -; GFX11-NEXT: s_mov_b32 s33, s16 +; GFX11-NEXT: v_readlane_b32 s0, v40, 2 +; GFX11-NEXT: s_or_saveexec_b32 s1, -1 +; GFX11-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload +; GFX11-NEXT: s_mov_b32 exec_lo, s1 +; GFX11-NEXT: s_mov_b32 s33, s0 ; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_setpc_b64 s[30:31] bb: @@ -54,158 +56,174 @@ bb: define amdgpu_kernel void @f2(i32 %arg, i32 %arg1, i32 %arg2, i1 %arg3, i32 %arg4, i1 %arg5, ptr %arg6, i32 %arg7, i32 %arg8, i32 %arg9, i32 %arg10, i1 %arg11) { ; GFX11-LABEL: f2: ; GFX11: ; %bb.0: ; %bb -; GFX11-NEXT: s_mov_b64 s[18:19], s[4:5] -; GFX11-NEXT: v_mov_b32_e32 v31, v0 -; GFX11-NEXT: s_load_b32 s26, s[18:19], 0x24 -; GFX11-NEXT: s_mov_b32 s17, s15 -; GFX11-NEXT: s_mov_b32 s12, s13 -; GFX11-NEXT: s_mov_b64 s[10:11], s[6:7] -; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v31 -; GFX11-NEXT: s_mov_b64 s[6:7], s[2:3] -; GFX11-NEXT: s_mov_b64 s[4:5], s[0:1] -; GFX11-NEXT: s_mov_b32 s20, 0 -; GFX11-NEXT: s_mov_b32 s0, -1 -; GFX11-NEXT: s_mov_b32 s24, exec_lo +; GFX11-NEXT: s_load_b32 s65, s[4:5], 0x24 +; GFX11-NEXT: v_and_b32_e32 v1, 0x3ff, v0 +; GFX11-NEXT: s_mov_b32 s36, s15 +; GFX11-NEXT: s_mov_b64 s[34:35], s[6:7] +; GFX11-NEXT: s_mov_b32 s38, 0 +; GFX11-NEXT: s_mov_b32 s6, -1 +; GFX11-NEXT: s_mov_b32 s37, exec_lo ; GFX11-NEXT: s_mov_b32 s32, 0 ; GFX11-NEXT: s_waitcnt lgkmcnt(0) -; GFX11-NEXT: v_mul_lo_u32 v0, s26, v0 +; GFX11-NEXT: v_mul_lo_u32 v1, s65, v1 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) -; GFX11-NEXT: v_cmpx_eq_u32_e32 0, v0 +; GFX11-NEXT: v_cmpx_eq_u32_e32 0, v1 ; GFX11-NEXT: s_cbranch_execz .LBB2_14 ; GFX11-NEXT: ; %bb.1: ; %bb14 -; GFX11-NEXT: s_load_b128 s[20:23], s[18:19], 0x2c +; GFX11-NEXT: s_load_b128 s[48:51], s[4:5], 0x2c ; GFX11-NEXT: s_waitcnt lgkmcnt(0) -; GFX11-NEXT: s_bitcmp1_b32 s21, 0 -; GFX11-NEXT: s_cselect_b32 s25, -1, 0 -; GFX11-NEXT: s_bitcmp0_b32 s21, 0 -; GFX11-NEXT: s_mov_b32 s21, 0 +; GFX11-NEXT: s_bitcmp1_b32 s49, 0 +; GFX11-NEXT: s_cselect_b32 s64, -1, 0 +; GFX11-NEXT: s_bitcmp0_b32 s49, 0 +; GFX11-NEXT: s_mov_b32 s49, 0 ; GFX11-NEXT: s_cbranch_scc0 .LBB2_3 ; GFX11-NEXT: ; %bb.2: ; %bb15 -; GFX11-NEXT: s_add_u32 s8, s18, 0x58 -; GFX11-NEXT: s_addc_u32 s9, s19, 0 -; GFX11-NEXT: s_getpc_b64 s[0:1] -; GFX11-NEXT: s_add_u32 s0, s0, f0@gotpcrel32@lo+4 -; GFX11-NEXT: s_addc_u32 s1, s1, f0@gotpcrel32@hi+12 -; GFX11-NEXT: ; implicit-def: $sgpr15 +; GFX11-NEXT: s_add_u32 s8, s4, 0x58 +; GFX11-NEXT: s_addc_u32 s9, s5, 0 +; GFX11-NEXT: s_getpc_b64 s[6:7] +; GFX11-NEXT: s_add_u32 s6, s6, f0@gotpcrel32@lo+4 +; GFX11-NEXT: s_addc_u32 s7, s7, f0@gotpcrel32@hi+12 +; GFX11-NEXT: v_mov_b32_e32 v31, v0 +; GFX11-NEXT: s_load_b64 s[16:17], s[6:7], 0x0 +; GFX11-NEXT: s_mov_b64 s[38:39], s[4:5] +; GFX11-NEXT: s_mov_b64 s[4:5], s[0:1] +; GFX11-NEXT: s_mov_b64 s[6:7], s[2:3] +; GFX11-NEXT: s_mov_b64 s[10:11], s[34:35] +; GFX11-NEXT: s_mov_b32 s12, s13 +; GFX11-NEXT: s_mov_b32 s66, s13 ; GFX11-NEXT: s_mov_b32 s13, s14 -; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0 -; GFX11-NEXT: s_mov_b32 s15, s14 -; GFX11-NEXT: s_mov_b32 s14, s17 +; GFX11-NEXT: s_mov_b32 s67, s14 +; GFX11-NEXT: s_mov_b32 s14, s36 +; GFX11-NEXT: ; implicit-def: $sgpr15 +; GFX11-NEXT: s_mov_b64 s[52:53], s[2:3] +; GFX11-NEXT: s_mov_b64 s[54:55], s[0:1] +; GFX11-NEXT: v_mov_b32_e32 v41, v0 ; GFX11-NEXT: s_waitcnt lgkmcnt(0) -; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1] -; GFX11-NEXT: s_mov_b32 s14, s15 -; GFX11-NEXT: s_mov_b32 s0, 0 -; GFX11-NEXT: s_mov_b32 s2, -1 +; GFX11-NEXT: s_swappc_b64 s[30:31], s[16:17] +; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX11-NEXT: v_mov_b32_e32 v0, v41 +; GFX11-NEXT: s_mov_b32 s13, s66 +; GFX11-NEXT: s_mov_b32 s14, s67 +; GFX11-NEXT: s_mov_b64 s[4:5], s[38:39] +; GFX11-NEXT: s_mov_b64 s[0:1], s[54:55] +; GFX11-NEXT: s_mov_b64 s[2:3], s[52:53] +; GFX11-NEXT: s_mov_b32 s6, 0 +; GFX11-NEXT: s_mov_b32 s8, -1 ; GFX11-NEXT: s_branch .LBB2_4 ; GFX11-NEXT: .LBB2_3: -; GFX11-NEXT: s_mov_b32 s2, 0 +; GFX11-NEXT: s_mov_b32 s8, 0 ; GFX11-NEXT: .LBB2_4: ; %Flow10 -; GFX11-NEXT: s_and_b32 s0, s0, exec_lo -; GFX11-NEXT: s_cselect_b32 s0, 1, 0 +; GFX11-NEXT: s_and_b32 s6, s6, exec_lo +; GFX11-NEXT: s_cselect_b32 s6, 1, 0 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) -; GFX11-NEXT: s_cmp_lg_u32 s0, 1 +; GFX11-NEXT: s_cmp_lg_u32 s6, 1 ; GFX11-NEXT: s_cbranch_scc1 .LBB2_13 ; GFX11-NEXT: ; %bb.5: ; %bb16 -; GFX11-NEXT: s_load_b32 s0, s[18:19], 0x54 -; GFX11-NEXT: s_bitcmp1_b32 s23, 0 -; GFX11-NEXT: s_cselect_b32 s8, -1, 0 -; GFX11-NEXT: s_and_b32 s1, s23, 1 +; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x54 +; GFX11-NEXT: s_bitcmp1_b32 s51, 0 +; GFX11-NEXT: s_cselect_b32 s10, -1, 0 +; GFX11-NEXT: s_and_b32 s7, s51, 1 ; GFX11-NEXT: s_waitcnt lgkmcnt(0) -; GFX11-NEXT: s_bitcmp1_b32 s0, 0 -; GFX11-NEXT: s_mov_b32 s0, -1 -; GFX11-NEXT: s_cselect_b32 s3, -1, 0 -; GFX11-NEXT: s_cmp_eq_u32 s1, 0 +; GFX11-NEXT: s_bitcmp1_b32 s6, 0 +; GFX11-NEXT: s_mov_b32 s6, -1 +; GFX11-NEXT: s_cselect_b32 s9, -1, 0 +; GFX11-NEXT: s_cmp_eq_u32 s7, 0 ; GFX11-NEXT: s_cbranch_scc0 .LBB2_9 ; GFX11-NEXT: ; %bb.6: ; %bb18.preheader ; GFX11-NEXT: s_clause 0x1 -; GFX11-NEXT: s_load_b64 s[0:1], s[18:19], 0x44 -; GFX11-NEXT: s_load_b32 s9, s[18:19], 0x4c -; GFX11-NEXT: v_mov_b32_e32 v0, 0 +; GFX11-NEXT: s_load_b64 s[6:7], s[4:5], 0x44 +; GFX11-NEXT: s_load_b32 s11, s[4:5], 0x4c +; GFX11-NEXT: v_mov_b32_e32 v1, 0 ; GFX11-NEXT: s_mov_b32 vcc_lo, 0 ; GFX11-NEXT: s_waitcnt lgkmcnt(0) -; GFX11-NEXT: s_mul_hi_u32 s29, s1, s0 -; GFX11-NEXT: s_mul_i32 s28, s1, s0 +; GFX11-NEXT: s_mul_hi_u32 s17, s7, s6 +; GFX11-NEXT: s_mul_i32 s16, s7, s6 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: s_lshr_b64 s[0:1], s[28:29], 1 -; GFX11-NEXT: s_mov_b32 s1, 0 -; GFX11-NEXT: s_or_b32 s0, s0, 1 -; GFX11-NEXT: s_lshr_b32 s0, s0, s9 -; GFX11-NEXT: s_mov_b32 s9, s1 -; GFX11-NEXT: s_mul_i32 s0, s0, s22 +; GFX11-NEXT: s_lshr_b64 s[6:7], s[16:17], 1 +; GFX11-NEXT: s_mov_b32 s7, 0 +; GFX11-NEXT: s_or_b32 s6, s6, 1 +; GFX11-NEXT: s_lshr_b32 s6, s6, s11 +; GFX11-NEXT: s_mov_b32 s11, s7 +; GFX11-NEXT: s_mul_i32 s6, s6, s50 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: s_mul_i32 s0, s0, s20 -; GFX11-NEXT: s_or_b32 s0, s26, s0 +; GFX11-NEXT: s_mul_i32 s6, s6, s48 +; GFX11-NEXT: s_or_b32 s6, s65, s6 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) -; GFX11-NEXT: s_lshl_b64 s[22:23], s[0:1], 1 -; GFX11-NEXT: global_load_u16 v0, v0, s[22:23] +; GFX11-NEXT: s_lshl_b64 s[16:17], s[6:7], 1 +; GFX11-NEXT: global_load_u16 v1, v1, s[16:17] ; GFX11-NEXT: s_waitcnt vmcnt(0) -; GFX11-NEXT: v_readfirstlane_b32 s0, v0 -; GFX11-NEXT: s_cmp_eq_u32 s0, 0 -; GFX11-NEXT: s_cselect_b32 s0, -1, 0 +; GFX11-NEXT: v_readfirstlane_b32 s6, v1 +; GFX11-NEXT: s_cmp_eq_u32 s6, 0 +; GFX11-NEXT: s_cselect_b32 s6, -1, 0 ; GFX11-NEXT: .p2align 6 ; GFX11-NEXT: .LBB2_7: ; %bb18 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 -; GFX11-NEXT: s_and_b32 s1, 0xffff, s1 -; GFX11-NEXT: s_cselect_b32 s1, -1, 0 +; GFX11-NEXT: s_and_b32 s7, 0xffff, s7 +; GFX11-NEXT: s_cselect_b32 s7, -1, 0 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) -; GFX11-NEXT: s_and_b32 s13, s1, exec_lo -; GFX11-NEXT: s_cselect_b32 s13, 1, 0 -; GFX11-NEXT: s_and_b32 s1, s3, s1 -; GFX11-NEXT: s_and_b32 s15, s25, exec_lo +; GFX11-NEXT: s_and_b32 s12, s7, exec_lo +; GFX11-NEXT: s_cselect_b32 s12, 1, 0 +; GFX11-NEXT: s_and_b32 s7, s9, s7 +; GFX11-NEXT: s_and_b32 s15, s64, exec_lo ; GFX11-NEXT: s_cselect_b32 s15, 1, 0 -; GFX11-NEXT: s_and_b32 s1, s1, exec_lo -; GFX11-NEXT: s_cselect_b32 s1, s13, s15 +; GFX11-NEXT: s_and_b32 s7, s7, exec_lo +; GFX11-NEXT: s_cselect_b32 s7, s12, s15 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) -; GFX11-NEXT: s_and_b32 s1, s1, 1 -; GFX11-NEXT: s_and_b32 s13, 0xffff, s9 -; GFX11-NEXT: s_cselect_b32 s13, 1, 0 -; GFX11-NEXT: s_and_b32 s15, s0, exec_lo +; GFX11-NEXT: s_and_b32 s7, s7, 1 +; GFX11-NEXT: s_and_b32 s12, 0xffff, s11 +; GFX11-NEXT: s_cselect_b32 s12, 1, 0 +; GFX11-NEXT: s_and_b32 s15, s6, exec_lo ; GFX11-NEXT: s_cselect_b32 s15, 1, 0 -; GFX11-NEXT: s_and_b32 s16, s8, exec_lo -; GFX11-NEXT: s_cselect_b32 s13, s13, s15 +; GFX11-NEXT: s_and_b32 s16, s10, exec_lo +; GFX11-NEXT: s_cselect_b32 s12, s12, s15 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) -; GFX11-NEXT: s_bitcmp1_b32 s13, 0 -; GFX11-NEXT: s_cselect_b32 s13, 0x100, 0 -; GFX11-NEXT: s_or_b32 s9, s13, s9 +; GFX11-NEXT: s_bitcmp1_b32 s12, 0 +; GFX11-NEXT: s_cselect_b32 s12, 0x100, 0 +; GFX11-NEXT: s_or_b32 s11, s12, s11 ; GFX11-NEXT: s_cbranch_vccz .LBB2_7 ; GFX11-NEXT: ; %bb.8: ; %Flow -; GFX11-NEXT: s_mov_b32 s0, 0 +; GFX11-NEXT: s_mov_b32 s6, 0 ; GFX11-NEXT: .LBB2_9: ; %Flow12 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) -; GFX11-NEXT: s_and_b32 vcc_lo, exec_lo, s0 +; GFX11-NEXT: s_and_b32 vcc_lo, exec_lo, s6 ; GFX11-NEXT: s_cbranch_vccz .LBB2_13 ; GFX11-NEXT: ; %bb.10: -; GFX11-NEXT: s_xor_b32 s0, s3, -1 +; GFX11-NEXT: s_xor_b32 s6, s9, -1 ; GFX11-NEXT: .LBB2_11: ; %bb17 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) -; GFX11-NEXT: s_and_b32 vcc_lo, exec_lo, s0 +; GFX11-NEXT: s_and_b32 vcc_lo, exec_lo, s6 ; GFX11-NEXT: s_cbranch_vccz .LBB2_11 ; GFX11-NEXT: ; %bb.12: ; %Flow6 -; GFX11-NEXT: s_mov_b32 s21, -1 +; GFX11-NEXT: s_mov_b32 s49, -1 ; GFX11-NEXT: .LBB2_13: ; %Flow11 -; GFX11-NEXT: s_and_b32 s20, s2, exec_lo -; GFX11-NEXT: s_or_not1_b32 s0, s21, exec_lo +; GFX11-NEXT: s_and_b32 s38, s8, exec_lo +; GFX11-NEXT: s_or_not1_b32 s6, s49, exec_lo ; GFX11-NEXT: .LBB2_14: ; %Flow9 -; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s24 -; GFX11-NEXT: s_and_saveexec_b32 s21, s0 +; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s37 +; GFX11-NEXT: s_and_saveexec_b32 s37, s6 ; GFX11-NEXT: s_cbranch_execz .LBB2_16 ; GFX11-NEXT: ; %bb.15: ; %bb43 -; GFX11-NEXT: s_add_u32 s8, s18, 0x58 -; GFX11-NEXT: s_addc_u32 s9, s19, 0 -; GFX11-NEXT: s_getpc_b64 s[0:1] -; GFX11-NEXT: s_add_u32 s0, s0, f0@gotpcrel32@lo+4 -; GFX11-NEXT: s_addc_u32 s1, s1, f0@gotpcrel32@hi+12 +; GFX11-NEXT: s_add_u32 s8, s4, 0x58 +; GFX11-NEXT: s_addc_u32 s9, s5, 0 +; GFX11-NEXT: s_getpc_b64 s[4:5] +; GFX11-NEXT: s_add_u32 s4, s4, f0@gotpcrel32@lo+4 +; GFX11-NEXT: s_addc_u32 s5, s5, f0@gotpcrel32@hi+12 +; GFX11-NEXT: v_mov_b32_e32 v31, v0 +; GFX11-NEXT: s_load_b64 s[16:17], s[4:5], 0x0 +; GFX11-NEXT: s_mov_b64 s[4:5], s[0:1] +; GFX11-NEXT: s_mov_b64 s[6:7], s[2:3] +; GFX11-NEXT: s_mov_b64 s[10:11], s[34:35] +; GFX11-NEXT: s_mov_b32 s12, s13 ; GFX11-NEXT: s_mov_b32 s13, s14 -; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0 -; GFX11-NEXT: s_mov_b32 s14, s17 +; GFX11-NEXT: s_mov_b32 s14, s36 ; GFX11-NEXT: ; implicit-def: $sgpr15 ; GFX11-NEXT: s_waitcnt lgkmcnt(0) -; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1] -; GFX11-NEXT: s_or_b32 s20, s20, exec_lo +; GFX11-NEXT: s_swappc_b64 s[30:31], s[16:17] +; GFX11-NEXT: s_or_b32 s38, s38, exec_lo ; GFX11-NEXT: .LBB2_16: ; %Flow14 -; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s21 -; GFX11-NEXT: s_and_saveexec_b32 s0, s20 +; GFX11-NEXT: s_or_b32 exec_lo, exec_lo, s37 +; GFX11-NEXT: s_and_saveexec_b32 s0, s38 ; GFX11-NEXT: ; %bb.17: ; %UnifiedUnreachableBlock ; GFX11-NEXT: ; divergent unreachable ; GFX11-NEXT: ; %bb.18: ; %UnifiedReturnBlock diff --git a/llvm/test/LTO/AArch64/link-branch-target-enforcement.ll b/llvm/test/LTO/AArch64/link-branch-target-enforcement.ll index 20254de995f73..951764432e94e 100644 --- a/llvm/test/LTO/AArch64/link-branch-target-enforcement.ll +++ b/llvm/test/LTO/AArch64/link-branch-target-enforcement.ll @@ -30,12 +30,10 @@ entry: ; CHECK-NOT: linking module flags 'branch-target-enforcement': IDs have conflicting values in ; CHECK-DUMP: <main>: -; CHECK-DUMP: paciasp -; CHECK-DUMP: str -; CHECK-DUMP: bl 0x8 <main+0x8> +; CHECK-DUMP: b {{.*}} ; CHECK-DUMP: <foo_on>: ; CHECK-DUMP: pacibsp ;; `main` doesn't support BTI while `foo` does, so in the binary ;; we should see only PAC which is supported by both. -; CHECK-PROP: Properties: aarch64 feature: PAC \ No newline at end of file +; CHECK-PROP: Properties: aarch64 feature: PAC diff --git a/llvm/unittests/Analysis/GlobalsModRefTest.cpp b/llvm/unittests/Analysis/GlobalsModRefTest.cpp index 755997f4d494f..c07d720af8b9a 100644 --- a/llvm/unittests/Analysis/GlobalsModRefTest.cpp +++ b/llvm/unittests/Analysis/GlobalsModRefTest.cpp @@ -53,7 +53,8 @@ TEST(GlobalsModRef, OptNone) { auto AAR = GlobalsAAResult::analyzeModule(*M, GetTLI, CG); + // Optnone definitions are maybe derefined. EXPECT_EQ(MemoryEffects::unknown(), AAR.getMemoryEffects(&F1)); - EXPECT_EQ(MemoryEffects::none(), AAR.getMemoryEffects(&F2)); - EXPECT_EQ(MemoryEffects::readOnly(), AAR.getMemoryEffects(&F3)); + EXPECT_EQ(MemoryEffects::unknown(), AAR.getMemoryEffects(&F2)); + EXPECT_EQ(MemoryEffects::unknown(), AAR.getMemoryEffects(&F3)); } >From 71b9d70a4c645d4553ecac9d18fb846622b82bb8 Mon Sep 17 00:00:00 2001 From: Joseph Huber <[email protected]> Date: Thu, 6 Aug 2026 09:27:19 -0500 Subject: [PATCH 4/5] nits --- llvm/lib/IR/Globals.cpp | 6 ++---- llvm/test/LTO/AArch64/link-branch-target-enforcement.ll | 2 +- 2 files changed, 3 insertions(+), 5 deletions(-) diff --git a/llvm/lib/IR/Globals.cpp b/llvm/lib/IR/Globals.cpp index 53351f38a4afa..9e068a8ed6b32 100644 --- a/llvm/lib/IR/Globals.cpp +++ b/llvm/lib/IR/Globals.cpp @@ -406,10 +406,8 @@ bool GlobalValue::isNoipaFnDef() const { } bool GlobalValue::isOptNoneFnDef() const { - const Function *F = dyn_cast<Function>(this); - if (!F || F->isDeclaration()) - return false; - return F->hasFnAttribute(Attribute::OptimizeNone); + const auto *F = dyn_cast<Function>(this); + return F && !F->isDeclaration() && F->hasFnAttribute(Attribute::OptimizeNone); } bool GlobalValue::isDeclaration() const { diff --git a/llvm/test/LTO/AArch64/link-branch-target-enforcement.ll b/llvm/test/LTO/AArch64/link-branch-target-enforcement.ll index 951764432e94e..87f5244937bb3 100644 --- a/llvm/test/LTO/AArch64/link-branch-target-enforcement.ll +++ b/llvm/test/LTO/AArch64/link-branch-target-enforcement.ll @@ -30,7 +30,7 @@ entry: ; CHECK-NOT: linking module flags 'branch-target-enforcement': IDs have conflicting values in ; CHECK-DUMP: <main>: -; CHECK-DUMP: b {{.*}} +; CHECK-DUMP: bl 0x8 <main+0x8> ; CHECK-DUMP: <foo_on>: ; CHECK-DUMP: pacibsp >From feaaecdb682837d99423650e31210aa274fdfa10 Mon Sep 17 00:00:00 2001 From: Joseph Huber <[email protected]> Date: Thu, 6 Aug 2026 09:34:45 -0500 Subject: [PATCH 5/5] Update llvm/test/LTO/AArch64/link-branch-target-enforcement.ll Co-authored-by: Antonio Frighetto <[email protected]> --- llvm/test/LTO/AArch64/link-branch-target-enforcement.ll | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/test/LTO/AArch64/link-branch-target-enforcement.ll b/llvm/test/LTO/AArch64/link-branch-target-enforcement.ll index 87f5244937bb3..5c1aa481f5845 100644 --- a/llvm/test/LTO/AArch64/link-branch-target-enforcement.ll +++ b/llvm/test/LTO/AArch64/link-branch-target-enforcement.ll @@ -30,7 +30,7 @@ entry: ; CHECK-NOT: linking module flags 'branch-target-enforcement': IDs have conflicting values in ; CHECK-DUMP: <main>: -; CHECK-DUMP: bl 0x8 <main+0x8> +; CHECK-DUMP: b 0x0 <main> ; CHECK-DUMP: <foo_on>: ; CHECK-DUMP: pacibsp _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
