https://github.com/eleviant created https://github.com/llvm/llvm-project/pull/215264
If parameter is explicitly rounded to 8 byte boundary, clang must emit either zext or sext instruction to convert the value to the target type. This is not really required, because contents of upper bits of extended value is not specified in AArch64 PCS. >From d6859103497caa7bbfd9f1d86c0bbdb2d001280d Mon Sep 17 00:00:00 2001 From: Evgeny Leviant <[email protected]> Date: Mon, 10 Aug 2026 14:28:45 +0200 Subject: [PATCH] [clang][AArch64] Don't round parameters to multiples of 8-byte If parameter is explicitly rounded to 8 byte boundary, clang must emit either zext or sext instruction to convert the value to the target type. This is not really required, because contents of upper bits of extended value is not specified in AArch64 PCS. --- clang/lib/CodeGen/Targets/AArch64.cpp | 4 ++ clang/test/CodeGen/AArch64/args.cpp | 2 +- clang/test/CodeGen/AArch64/soft-float-abi.c | 2 +- .../AArch64/struct-coerce-using-ptr.cpp | 57 +++++++++---------- clang/test/CodeGen/arm64-arguments.c | 9 +-- .../CodeGen/arm64-microsoft-arguments.cpp | 14 ++--- clang/test/CodeGen/arm64_32-vaarg.c | 2 +- clang/test/CodeGen/arm64ec-varargs.c | 3 +- clang/test/CodeGen/attr-noundef.cpp | 4 +- clang/test/CodeGen/noundef-analysis.cpp | 4 +- clang/test/CodeGenCXX/aarch64-arguments.cpp | 2 +- clang/test/CodeGenCXX/arm64-darwinpcs.cpp | 2 +- .../microsoft-abi-sret-and-byval.cpp | 6 +- 13 files changed, 55 insertions(+), 56 deletions(-) diff --git a/clang/lib/CodeGen/Targets/AArch64.cpp b/clang/lib/CodeGen/Targets/AArch64.cpp index 2d73dd8cc2916..9f35a39595e4a 100644 --- a/clang/lib/CodeGen/Targets/AArch64.cpp +++ b/clang/lib/CodeGen/Targets/AArch64.cpp @@ -504,6 +504,10 @@ ABIArgInfo AArch64ABIInfo::classifyArgumentType(QualType Ty, bool IsVariadicFn, std::max(getContext().getTypeAlign(Ty), (unsigned)getTarget().getPointerWidth(LangAS::Default)); } + if (Size < 64 && getDataLayout().isLittleEndian()) + return ABIArgInfo::getDirect( + llvm::IntegerType::get(getVMContext(), Size)); + Size = llvm::alignTo(Size, Alignment); // If the Aggregate is made up of pointers, use an array of pointers for the diff --git a/clang/test/CodeGen/AArch64/args.cpp b/clang/test/CodeGen/AArch64/args.cpp index 3b5ea2d7f5526..0db601e5649ae 100644 --- a/clang/test/CodeGen/AArch64/args.cpp +++ b/clang/test/CodeGen/AArch64/args.cpp @@ -17,7 +17,7 @@ struct Empty {}; // DARWIN: define{{.*}} i32 @empty_arg(i32 noundef %a) // C: define{{.*}} i32 @empty_arg(i32 noundef %a) -// CXX: define{{.*}} i32 @empty_arg(i64 %e.coerce, i32 noundef %a) +// CXX: define{{.*}} i32 @empty_arg(i8 %e.coerce, i32 noundef %a) EXTERNC int empty_arg(struct Empty e, int a) { return a; } diff --git a/clang/test/CodeGen/AArch64/soft-float-abi.c b/clang/test/CodeGen/AArch64/soft-float-abi.c index 0e1188117c21c..6afd677353b3b 100644 --- a/clang/test/CodeGen/AArch64/soft-float-abi.c +++ b/clang/test/CodeGen/AArch64/soft-float-abi.c @@ -24,7 +24,7 @@ long double test4(long double a) { return a; } struct A { float x; }; -// SOFT: define dso_local i32 @test10(i64 %a.coerce) +// SOFT: define dso_local i32 @test10(i32 %a.coerce) // HARD: define dso_local %struct.A @test10([1 x float] alignstack(8) %a.coerce) struct A test10(struct A a) { return a; } diff --git a/clang/test/CodeGen/AArch64/struct-coerce-using-ptr.cpp b/clang/test/CodeGen/AArch64/struct-coerce-using-ptr.cpp index d00d64c6e84d2..8053bb3fbf293 100644 --- a/clang/test/CodeGen/AArch64/struct-coerce-using-ptr.cpp +++ b/clang/test/CodeGen/AArch64/struct-coerce-using-ptr.cpp @@ -40,12 +40,12 @@ struct Sp { // CHECK-A64-NEXT: ret void // // CHECK-A64_32-LABEL: define void @_Z2Tp2Sp( -// CHECK-A64_32-SAME: i64 [[S_COERCE:%.*]]) #[[ATTR0]] { +// CHECK-A64_32-SAME: i32 [[S_COERCE:%.*]]) #[[ATTR0]] { // CHECK-A64_32-NEXT: [[ENTRY:.*:]] // CHECK-A64_32-NEXT: [[S:%.*]] = alloca [[STRUCT_SP:%.*]], align 4 // CHECK-A64_32-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_SP]], ptr [[S]], i32 0, i32 0 -// CHECK-A64_32-NEXT: [[COERCE_VAL_II:%.*]] = trunc i64 [[S_COERCE]] to i32 -// CHECK-A64_32-NEXT: store i32 [[COERCE_VAL_II]], ptr [[COERCE_DIVE]], align 4 +// CHECK-A64_32-NEXT: [[COERCE_VAL_IP:%.*]] = inttoptr i32 [[S_COERCE]] to ptr +// CHECK-A64_32-NEXT: store ptr [[COERCE_VAL_IP]], ptr [[COERCE_DIVE]], align 4 // CHECK-A64_32-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_SP]], ptr [[S]], i32 0, i32 0 // CHECK-A64_32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[X]], align 4 // CHECK-A64_32-NEXT: store i32 1, ptr [[TMP0]], align 4 @@ -224,12 +224,12 @@ union Upp { // CHECK-A64-NEXT: ret void // // CHECK-A64_32-LABEL: define void @_Z11Tupp_packed3Upp( -// CHECK-A64_32-SAME: i64 [[S_COERCE:%.*]]) #[[ATTR0]] { +// CHECK-A64_32-SAME: i32 [[S_COERCE:%.*]]) #[[ATTR0]] { // CHECK-A64_32-NEXT: [[ENTRY:.*:]] // CHECK-A64_32-NEXT: [[S:%.*]] = alloca [[UNION_UPP:%.*]], align 4 // CHECK-A64_32-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[UNION_UPP]], ptr [[S]], i32 0, i32 0 -// CHECK-A64_32-NEXT: [[COERCE_VAL_II:%.*]] = trunc i64 [[S_COERCE]] to i32 -// CHECK-A64_32-NEXT: store i32 [[COERCE_VAL_II]], ptr [[COERCE_DIVE]], align 4 +// CHECK-A64_32-NEXT: [[COERCE_VAL_IP:%.*]] = inttoptr i32 [[S_COERCE]] to ptr +// CHECK-A64_32-NEXT: store ptr [[COERCE_VAL_IP]], ptr [[COERCE_DIVE]], align 4 // CHECK-A64_32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S]], align 4 // CHECK-A64_32-NEXT: store i32 1, ptr [[TMP0]], align 4 // CHECK-A64_32-NEXT: ret void @@ -281,12 +281,12 @@ struct Spf { // CHECK-A64-NEXT: ret void // // CHECK-A64_32-LABEL: define void @_Z3Tpf3Spf( -// CHECK-A64_32-SAME: i64 [[S_COERCE:%.*]]) #[[ATTR0]] { +// CHECK-A64_32-SAME: i32 [[S_COERCE:%.*]]) #[[ATTR0]] { // CHECK-A64_32-NEXT: [[ENTRY:.*:]] // CHECK-A64_32-NEXT: [[S:%.*]] = alloca [[STRUCT_SPF:%.*]], align 4 // CHECK-A64_32-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_SPF]], ptr [[S]], i32 0, i32 0 -// CHECK-A64_32-NEXT: [[COERCE_VAL_II:%.*]] = trunc i64 [[S_COERCE]] to i32 -// CHECK-A64_32-NEXT: store i32 [[COERCE_VAL_II]], ptr [[COERCE_DIVE]], align 4 +// CHECK-A64_32-NEXT: [[COERCE_VAL_IP:%.*]] = inttoptr i32 [[S_COERCE]] to ptr +// CHECK-A64_32-NEXT: store ptr [[COERCE_VAL_IP]], ptr [[COERCE_DIVE]], align 4 // CHECK-A64_32-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_SPF]], ptr [[S]], i32 0, i32 0 // CHECK-A64_32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[X]], align 4 // CHECK-A64_32-NEXT: store i32 1, ptr [[TMP0]], align 4 @@ -443,12 +443,11 @@ struct Spa { // CHECK-A64-NEXT: ret void // // CHECK-A64_32-LABEL: define void @_Z3Tpa3Spa( -// CHECK-A64_32-SAME: i64 [[S_COERCE:%.*]]) #[[ATTR0]] { +// CHECK-A64_32-SAME: i32 [[S_COERCE:%.*]]) #[[ATTR0]] { // CHECK-A64_32-NEXT: [[ENTRY:.*:]] // CHECK-A64_32-NEXT: [[S:%.*]] = alloca [[STRUCT_SPA:%.*]], align 4 // CHECK-A64_32-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_SPA]], ptr [[S]], i32 0, i32 0 -// CHECK-A64_32-NEXT: [[COERCE_VAL_II:%.*]] = trunc i64 [[S_COERCE]] to i32 -// CHECK-A64_32-NEXT: store i32 [[COERCE_VAL_II]], ptr [[COERCE_DIVE]], align 4 +// CHECK-A64_32-NEXT: store i32 [[S_COERCE]], ptr [[COERCE_DIVE]], align 4 // CHECK-A64_32-NEXT: [[XS:%.*]] = getelementptr inbounds nuw [[STRUCT_SPA]], ptr [[S]], i32 0, i32 0 // CHECK-A64_32-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1 x ptr], ptr [[XS]], i32 0, i32 0 // CHECK-A64_32-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARRAYIDX]], align 4 @@ -575,21 +574,19 @@ void TSpp_align16(SSpp_align16 s) { *s.a.x = 1; } struct Sempty { }; // CHECK-A64-LABEL: define dso_local void @_Z6Tempty6Sempty( -// CHECK-A64-SAME: i64 [[S_COERCE:%.*]]) #[[ATTR0]] { +// CHECK-A64-SAME: i8 [[S_COERCE:%.*]]) #[[ATTR0]] { // CHECK-A64-NEXT: [[ENTRY:.*:]] // CHECK-A64-NEXT: [[S:%.*]] = alloca [[STRUCT_SEMPTY:%.*]], align 1 // CHECK-A64-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_SEMPTY]], ptr [[S]], i32 0, i32 0 -// CHECK-A64-NEXT: [[COERCE_VAL_II:%.*]] = trunc i64 [[S_COERCE]] to i8 -// CHECK-A64-NEXT: store i8 [[COERCE_VAL_II]], ptr [[COERCE_DIVE]], align 1 +// CHECK-A64-NEXT: store i8 [[S_COERCE]], ptr [[COERCE_DIVE]], align 1 // CHECK-A64-NEXT: ret void // // CHECK-A64_32-LABEL: define void @_Z6Tempty6Sempty( -// CHECK-A64_32-SAME: i64 [[S_COERCE:%.*]]) #[[ATTR0]] { +// CHECK-A64_32-SAME: i8 [[S_COERCE:%.*]]) #[[ATTR0]] { // CHECK-A64_32-NEXT: [[ENTRY:.*:]] // CHECK-A64_32-NEXT: [[S:%.*]] = alloca [[STRUCT_SEMPTY:%.*]], align 1 // CHECK-A64_32-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_SEMPTY]], ptr [[S]], i32 0, i32 0 -// CHECK-A64_32-NEXT: [[COERCE_VAL_II:%.*]] = trunc i64 [[S_COERCE]] to i8 -// CHECK-A64_32-NEXT: store i8 [[COERCE_VAL_II]], ptr [[COERCE_DIVE]], align 1 +// CHECK-A64_32-NEXT: store i8 [[S_COERCE]], ptr [[COERCE_DIVE]], align 1 // CHECK-A64_32-NEXT: ret void // void Tempty(Sempty s) { } @@ -638,12 +635,12 @@ struct Spaddrspace { // CHECK-A64-NEXT: ret void // // CHECK-A64_32-LABEL: define void @_Z11Tpaddrspace11Spaddrspace( -// CHECK-A64_32-SAME: i64 [[S_COERCE:%.*]]) #[[ATTR0]] { +// CHECK-A64_32-SAME: i32 [[S_COERCE:%.*]]) #[[ATTR0]] { // CHECK-A64_32-NEXT: [[ENTRY:.*:]] // CHECK-A64_32-NEXT: [[S:%.*]] = alloca [[STRUCT_SPADDRSPACE:%.*]], align 4 // CHECK-A64_32-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_SPADDRSPACE]], ptr [[S]], i32 0, i32 0 -// CHECK-A64_32-NEXT: [[COERCE_VAL_II:%.*]] = trunc i64 [[S_COERCE]] to i32 -// CHECK-A64_32-NEXT: store i32 [[COERCE_VAL_II]], ptr [[COERCE_DIVE]], align 4 +// CHECK-A64_32-NEXT: [[COERCE_VAL_IP:%.*]] = inttoptr i32 [[S_COERCE]] to ptr addrspace(100) +// CHECK-A64_32-NEXT: store ptr addrspace(100) [[COERCE_VAL_IP]], ptr [[COERCE_DIVE]], align 4 // CHECK-A64_32-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_SPADDRSPACE]], ptr [[S]], i32 0, i32 0 // CHECK-A64_32-NEXT: [[TMP0:%.*]] = load ptr addrspace(100), ptr [[X]], align 4 // CHECK-A64_32-NEXT: store i32 1, ptr addrspace(100) [[TMP0]], align 4 @@ -671,8 +668,7 @@ void Tpaddrspace(Spaddrspace s) { *s.x = 1; } // CHECK-A64_32-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_SPADDRSPACE]], ptr [[AGG_TMP]], i32 0, i32 0 // CHECK-A64_32-NEXT: [[TMP0:%.*]] = load ptr addrspace(100), ptr [[COERCE_DIVE]], align 4 // CHECK-A64_32-NEXT: [[COERCE_VAL_PI:%.*]] = ptrtoint ptr addrspace(100) [[TMP0]] to i32 -// CHECK-A64_32-NEXT: [[COERCE_VAL_II:%.*]] = zext i32 [[COERCE_VAL_PI]] to i64 -// CHECK-A64_32-NEXT: call void @_Z11Tpaddrspace11Spaddrspace(i64 [[COERCE_VAL_II]]) +// CHECK-A64_32-NEXT: call void @_Z11Tpaddrspace11Spaddrspace(i32 [[COERCE_VAL_PI]]) // CHECK-A64_32-NEXT: ret void // void Cpaddrspace() { Spaddrspace s; Tpaddrspace(s); } @@ -745,12 +741,12 @@ struct Sraddrspace { // CHECK-A64-NEXT: ret void // // CHECK-A64_32-LABEL: define void @_Z11Traddrspace11Sraddrspace( -// CHECK-A64_32-SAME: i64 [[S_COERCE:%.*]]) #[[ATTR0]] { +// CHECK-A64_32-SAME: i32 [[S_COERCE:%.*]]) #[[ATTR0]] { // CHECK-A64_32-NEXT: [[ENTRY:.*:]] // CHECK-A64_32-NEXT: [[S:%.*]] = alloca [[STRUCT_SRADDRSPACE:%.*]], align 4 // CHECK-A64_32-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_SRADDRSPACE]], ptr [[S]], i32 0, i32 0 -// CHECK-A64_32-NEXT: [[COERCE_VAL_II:%.*]] = trunc i64 [[S_COERCE]] to i32 -// CHECK-A64_32-NEXT: store i32 [[COERCE_VAL_II]], ptr [[COERCE_DIVE]], align 4 +// CHECK-A64_32-NEXT: [[COERCE_VAL_IP:%.*]] = inttoptr i32 [[S_COERCE]] to ptr addrspace(100) +// CHECK-A64_32-NEXT: store ptr addrspace(100) [[COERCE_VAL_IP]], ptr [[COERCE_DIVE]], align 4 // CHECK-A64_32-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_SRADDRSPACE]], ptr [[S]], i32 0, i32 0 // CHECK-A64_32-NEXT: [[TMP0:%.*]] = load ptr addrspace(100), ptr [[X]], align 4, !align [[META2]] // CHECK-A64_32-NEXT: store i32 1, ptr addrspace(100) [[TMP0]], align 4 @@ -773,19 +769,18 @@ void Traddrspace(Sraddrspace s) { s.x = 1; } // CHECK-A64-NEXT: ret void // // CHECK-A64_32-LABEL: define void @_Z11Craddrspace11Sraddrspace( -// CHECK-A64_32-SAME: i64 [[S_COERCE:%.*]]) #[[ATTR0]] { +// CHECK-A64_32-SAME: i32 [[S_COERCE:%.*]]) #[[ATTR0]] { // CHECK-A64_32-NEXT: [[ENTRY:.*:]] // CHECK-A64_32-NEXT: [[S:%.*]] = alloca [[STRUCT_SRADDRSPACE:%.*]], align 4 // CHECK-A64_32-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_SRADDRSPACE]], align 4 // CHECK-A64_32-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_SRADDRSPACE]], ptr [[S]], i32 0, i32 0 -// CHECK-A64_32-NEXT: [[COERCE_VAL_II:%.*]] = trunc i64 [[S_COERCE]] to i32 -// CHECK-A64_32-NEXT: store i32 [[COERCE_VAL_II]], ptr [[COERCE_DIVE]], align 4 +// CHECK-A64_32-NEXT: [[COERCE_VAL_IP:%.*]] = inttoptr i32 [[S_COERCE]] to ptr addrspace(100) +// CHECK-A64_32-NEXT: store ptr addrspace(100) [[COERCE_VAL_IP]], ptr [[COERCE_DIVE]], align 4 // CHECK-A64_32-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[AGG_TMP]], ptr align 4 [[S]], i32 4, i1 false) // CHECK-A64_32-NEXT: [[COERCE_DIVE1:%.*]] = getelementptr inbounds nuw [[STRUCT_SRADDRSPACE]], ptr [[AGG_TMP]], i32 0, i32 0 // CHECK-A64_32-NEXT: [[TMP0:%.*]] = load ptr addrspace(100), ptr [[COERCE_DIVE1]], align 4 // CHECK-A64_32-NEXT: [[COERCE_VAL_PI:%.*]] = ptrtoint ptr addrspace(100) [[TMP0]] to i32 -// CHECK-A64_32-NEXT: [[COERCE_VAL_II2:%.*]] = zext i32 [[COERCE_VAL_PI]] to i64 -// CHECK-A64_32-NEXT: call void @_Z11Traddrspace11Sraddrspace(i64 [[COERCE_VAL_II2]]) +// CHECK-A64_32-NEXT: call void @_Z11Traddrspace11Sraddrspace(i32 [[COERCE_VAL_PI]]) // CHECK-A64_32-NEXT: ret void // void Craddrspace(Sraddrspace s) { Traddrspace(s); } diff --git a/clang/test/CodeGen/arm64-arguments.c b/clang/test/CodeGen/arm64-arguments.c index 4a94841759bf8..a31240f22801e 100644 --- a/clang/test/CodeGen/arm64-arguments.c +++ b/clang/test/CodeGen/arm64-arguments.c @@ -149,11 +149,11 @@ struct s30 f30() {} struct s31 { char x; }; void f31(struct s31 s) { } -// CHECK: define{{.*}} void @f31(i64 %s.coerce) +// CHECK-LE: define{{.*}} void @f31(i8 %s.coerce) +// CHECK-BE: define{{.*}} void @f31(i64 %s.coerce) // CHECK: %s = alloca %struct.s31, align 1 // CHECK-BE: %coerce.highbits = lshr i64 %s.coerce, 56 // CHECK-BE: trunc i64 %coerce.highbits to i8 -// CHECK-LE: trunc i64 %s.coerce to i8 // CHECK: store i8 %{{.*}}, struct s32 { double x; }; @@ -170,8 +170,9 @@ void f34(struct s34 s); void g34(struct s34 *s) { f34(*s); } // CHECK: @g34(ptr noundef %s) // CHECK: %[[a:.*]] = load i8, ptr %{{.*}} -// CHECK: zext i8 %[[a]] to i64 -// CHECK: call void @f34(i64 %{{.*}}) +// CHECK-LE: call void @f34(i8 %{{.*}}) +// CHECK-BE: zext i8 %{{.*}} to i64 +// CHECK-BE: call void @f34(i64 %{{.*}}) /* * Check that va_arg accesses stack according to ABI alignment diff --git a/clang/test/CodeGen/arm64-microsoft-arguments.cpp b/clang/test/CodeGen/arm64-microsoft-arguments.cpp index 14707d9814cbb..5a951426357a3 100644 --- a/clang/test/CodeGen/arm64-microsoft-arguments.cpp +++ b/clang/test/CodeGen/arm64-microsoft-arguments.cpp @@ -57,7 +57,7 @@ S4 f4() { // Pass and return from instance method called from instance method. // CHECK: define {{.*}} void @{{.*}}bar@Q1{{.*}}(ptr {{[^,]*}} %this, ptr dead_on_unwind inreg noalias writable sret(%class.P1) align 1 %agg.result) -// CHECK: call void {{.*}}foo@P1{{.*}}(ptr noundef{{[^,]*}} %ref.tmp, ptr dead_on_unwind inreg writable sret(%class.P1) align 1 %agg.result, i64 %coerce.val.ii) +// CHECK: call void {{.*}}foo@P1{{.*}}(ptr noundef{{[^,]*}} %ref.tmp, ptr dead_on_unwind inreg writable sret(%class.P1) align 1 %agg.result, i8 %{{.*}}) class P1 { public: @@ -76,7 +76,7 @@ P1 Q1::bar() { // Pass and return from instance method called from free function. // CHECK: define {{.*}} void {{.*}}bar{{.*}}() -// CHECK: call void {{.*}}foo@P2{{.*}}(ptr noundef{{[^,]*}} %ref.tmp, ptr dead_on_unwind inreg writable sret(%class.P2) align 1 %retval, i64 %coerce.val.ii) +// CHECK: call void {{.*}}foo@P2{{.*}}(ptr noundef{{[^,]*}} %ref.tmp, ptr dead_on_unwind inreg writable sret(%class.P2) align 1 %retval, i8 %{{.*}}) class P2 { public: P2 foo(P2 x); @@ -90,7 +90,7 @@ P2 bar() { // Pass and return an object with a user-provided constructor (passed directly, // returned indirectly) // CHECK: define {{.*}} void @{{.*}}f5{{.*}}(ptr dead_on_unwind inreg noalias writable sret(%struct.S5) align 4 %agg.result) -// CHECK: call void {{.*}}func5{{.*}}(ptr dead_on_unwind inreg writable sret(%struct.S5) align 4 %agg.result, i64 {{.*}}) +// CHECK: call void {{.*}}func5{{.*}}(ptr dead_on_unwind inreg writable sret(%struct.S5) align 4 %agg.result, i32 {{.*}}) struct S5 { S5(); int x; @@ -105,7 +105,7 @@ S5 f5() { // Pass and return an object with a non-trivial explicitly defaulted constructor // (passed directly, returned directly) // CHECK: define {{.*}} i8 @"?f6@@YA?AUS6@@XZ"() -// CHECK: call i8 {{.*}}func6{{.*}}(i64 {{.*}}) +// CHECK: call i8 {{.*}}func6{{.*}}(i8 {{.*}}) struct S6a { S6a(); }; @@ -124,7 +124,7 @@ S6 f6() { // Pass and return an object with a non-trivial implicitly defaulted constructor // (passed directly, returned directly) // CHECK: define {{.*}} i8 @"?f7@@YA?AUS7@@XZ"() -// CHECK: call i8 {{.*}}func7{{.*}}(i64 {{.*}}) +// CHECK: call i8 {{.*}}func7{{.*}}(i8 {{.*}}) struct S7 { S6a x; }; @@ -158,7 +158,7 @@ S8 f8() { // Pass and return an object with a non-trivial copy-assignment operator and // a trivial copy constructor (passed directly, returned indirectly) // CHECK: define {{.*}} void @"?f9@@YA?AUS9@@XZ"(ptr dead_on_unwind inreg noalias writable sret(%struct.S9) align 4 {{.*}}) -// CHECK: call void {{.*}}func9{{.*}}(ptr dead_on_unwind inreg writable sret(%struct.S9) align 4 {{.*}}, i64 {{.*}}) +// CHECK: call void {{.*}}func9{{.*}}(ptr dead_on_unwind inreg writable sret(%struct.S9) align 4 {{.*}}, i32 {{.*}}) struct S9 { S9& operator=(const S9&); int x; @@ -206,7 +206,7 @@ S11 f11() { // Pass and return object with template constructor (pass directly, // return indirectly). // CHECK: define dso_local void @"?f12@@YA?AUS12@@XZ"(ptr dead_on_unwind inreg noalias writable sret(%struct.S12) align 4 {{.*}}) -// CHECK: call void @"?func12@@YA?AUS12@@U1@@Z"(ptr dead_on_unwind inreg writable sret(%struct.S12) align 4 {{.*}}, i64 {{.*}}) +// CHECK: call void @"?func12@@YA?AUS12@@U1@@Z"(ptr dead_on_unwind inreg writable sret(%struct.S12) align 4 {{.*}}, i32 {{.*}}) struct S12 { template<typename T> S12(T*) {} int x; diff --git a/clang/test/CodeGen/arm64_32-vaarg.c b/clang/test/CodeGen/arm64_32-vaarg.c index 72c23d4967d2d..5126ca2bbbae6 100644 --- a/clang/test/CodeGen/arm64_32-vaarg.c +++ b/clang/test/CodeGen/arm64_32-vaarg.c @@ -94,7 +94,7 @@ typedef struct { // alignment must be passed via "[N x i32]" to be correctly allocated in the // backend. short test_threeshorts(ThreeShorts input, va_list *mylist) { -// CHECK-LABEL: define{{.*}} signext i16 @test_threeshorts([2 x i32] %input +// CHECK-LABEL: define{{.*}} signext i16 @test_threeshorts(i48 %{{.*}} // CHECK: [[START:%.*]] = load ptr, ptr %mylist // CHECK: [[NEXT:%.*]] = getelementptr inbounds nuw i8, ptr [[START]], i32 8 diff --git a/clang/test/CodeGen/arm64ec-varargs.c b/clang/test/CodeGen/arm64ec-varargs.c index adb67644bf744..ceafb6042f464 100644 --- a/clang/test/CodeGen/arm64ec-varargs.c +++ b/clang/test/CodeGen/arm64ec-varargs.c @@ -66,8 +66,7 @@ void g(A a, B b, C c) { f(a, b, c); } // CHECK-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_A]], ptr [[A]], i32 0, i32 0 // CHECK-NEXT: store [2 x float] [[A_COERCE:%.*]], ptr [[COERCE_DIVE]], align 4 // CHECK-NEXT: [[COERCE_DIVE1:%.*]] = getelementptr inbounds nuw [[STRUCT_B]], ptr [[B]], i32 0, i32 0 -// CHECK-NEXT: [[COERCE_VAL_II:%.*]] = trunc i64 [[B_COERCE:%.*]] to i48 -// CHECK-NEXT: store i48 [[COERCE_VAL_II]], ptr [[COERCE_DIVE1]], align 1 +// CHECK-NEXT: store i48 {{.*}}, ptr [[COERCE_DIVE1]], align 1 // CHECK-NEXT: [[COERCE_DIVE2:%.*]] = getelementptr inbounds nuw [[STRUCT_C]], ptr [[C]], i32 0, i32 0 // CHECK-NEXT: store [4 x float] [[C_COERCE:%.*]], ptr [[COERCE_DIVE2]], align 4 // CHECK-NEXT: [[COERCE_DIVE3:%.*]] = getelementptr inbounds nuw [[STRUCT_A]], ptr [[A]], i32 0, i32 0 diff --git a/clang/test/CodeGen/attr-noundef.cpp b/clang/test/CodeGen/attr-noundef.cpp index f90d5a4355fb5..f4d792032c43b 100644 --- a/clang/test/CodeGen/attr-noundef.cpp +++ b/clang/test/CodeGen/attr-noundef.cpp @@ -18,7 +18,7 @@ void pass_trivial(Trivial e) {} // CHECK-INTEL: [[DEF:define( dso_local)?]] i32 @{{.*}}ret_trivial // CHECK-AARCH: [[DEF:define( dso_local)?]] i32 @{{.*}}ret_trivial // CHECK-INTEL: [[DEF]] void @{{.*}}pass_trivial{{.*}}(i32 % -// CHECK-AARCH: [[DEF]] void @{{.*}}pass_trivial{{.*}}(i64 % +// CHECK-AARCH: [[DEF]] void @{{.*}}pass_trivial{{.*}}(i32 % struct NoCopy { int a; @@ -51,7 +51,7 @@ void pass_trivial(Trivial e) {} // CHECK-INTEL: [[DEF]] i32 @{{.*}}ret_trivial // CHECK-AARCH: [[DEF]] i32 @{{.*}}ret_trivial // CHECK-INTEL: [[DEF]] void @{{.*}}pass_trivial{{.*}}(i32 % -// CHECK-AARCH: [[DEF]] void @{{.*}}pass_trivial{{.*}}(i64 % +// CHECK-AARCH: [[DEF]] void @{{.*}}pass_trivial{{.*}}(i32 % union NoCopy { int a; diff --git a/clang/test/CodeGen/noundef-analysis.cpp b/clang/test/CodeGen/noundef-analysis.cpp index 21184437b796d..db24311569e96 100644 --- a/clang/test/CodeGen/noundef-analysis.cpp +++ b/clang/test/CodeGen/noundef-analysis.cpp @@ -20,12 +20,12 @@ static void examineValue(int x) { sink = x; } // ENABLED-LABEL: @main( // ENABLED: [[CALL:%.*]] = call noundef {{.*}}i32 @_Z19indirect_callee_inti(i32 noundef {{.*}}0) -// ENABLED: [[CALL1:%.*]] = call i32 @_Z21indirect_callee_union2u1(i64 {{.*}}) +// ENABLED: [[CALL1:%.*]] = call i32 @_Z21indirect_callee_union2u1(i32 {{.*}}) // ENABLED: [[CALL2:%.*]] = call noalias noundef nonnull ptr @_Znwm(i64 noundef 4) #[[ATTR4:[0-9]+]] // ENABLED: call void @_ZL12examineValuei(i32 noundef {{.*}}) // DISABLED-LABEL: @main( // DISABLED: [[CALL:%.*]] = call {{.*}}i32 @_Z19indirect_callee_inti(i32 {{.*}}0) -// DISABLED: [[CALL1:%.*]] = call i32 @_Z21indirect_callee_union2u1(i64 {{.*}}) +// DISABLED: [[CALL1:%.*]] = call i32 @_Z21indirect_callee_union2u1(i32 {{.*}}) // DISABLED: [[CALL2:%.*]] = call noalias nonnull ptr @_Znwm(i64 4) #[[ATTR4:[0-9]+]] // DISABLED: call void @_ZL12examineValuei(i32 {{.*}}) int main() { diff --git a/clang/test/CodeGenCXX/aarch64-arguments.cpp b/clang/test/CodeGenCXX/aarch64-arguments.cpp index 3206e38ad0090..348b981ad5cb0 100644 --- a/clang/test/CodeGenCXX/aarch64-arguments.cpp +++ b/clang/test/CodeGenCXX/aarch64-arguments.cpp @@ -1,5 +1,5 @@ // RUN: %clang_cc1 -triple arm64-none-linux -emit-llvm -w -o - %s | FileCheck -check-prefix=PCS %s -// PCS: define{{.*}} void @{{.*}}(i64 %a.coerce) +// PCS: define{{.*}} void @{{.*}}(i8 %a.coerce) struct s0 {}; void f0(s0 a) {} diff --git a/clang/test/CodeGenCXX/arm64-darwinpcs.cpp b/clang/test/CodeGenCXX/arm64-darwinpcs.cpp index ef0e2da3effac..923755ea4ba95 100644 --- a/clang/test/CodeGenCXX/arm64-darwinpcs.cpp +++ b/clang/test/CodeGenCXX/arm64-darwinpcs.cpp @@ -7,7 +7,7 @@ void test_extensions(bool a, char b, short c) {} struct Empty {}; void test_empty(Empty e) {} -// CHECK: define{{.*}} void @_Z10test_empty5Empty(i64 %e.coerce) +// CHECK: define{{.*}} void @_Z10test_empty5Empty(i8 %e.coerce) // CHECK-DARWIN: define{{.*}} void @_Z10test_empty5Empty() struct HFA { diff --git a/clang/test/CodeGenCXX/microsoft-abi-sret-and-byval.cpp b/clang/test/CodeGenCXX/microsoft-abi-sret-and-byval.cpp index 9adf0c6b1c0d0..873f4eb6f5f0d 100644 --- a/clang/test/CodeGenCXX/microsoft-abi-sret-and-byval.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-sret-and-byval.cpp @@ -185,7 +185,7 @@ void small_arg_with_dtor(SmallWithDtor s) {} // WIN64: define dso_local void @"?small_arg_with_dtor@@YAXUSmallWithDtor@@@Z"(i32 %s.coerce) {{.*}} { // WIN64: call void @"??1SmallWithDtor@@QEAA@XZ" // WIN64: } -// WOA64: define dso_local void @"?small_arg_with_dtor@@YAXUSmallWithDtor@@@Z"(i64 %s.coerce) {{.*}} { +// WOA64: define dso_local void @"?small_arg_with_dtor@@YAXUSmallWithDtor@@@Z"(i32 %s.coerce) {{.*}} { // WOA64: call void @"??1SmallWithDtor@@QEAA@XZ"(ptr {{[^,]*}} %s) // WOA64: } @@ -197,10 +197,10 @@ void small_arg_with_dtor(SmallWithDtor s) {} // Test that the eligible non-aggregate is passed directly, but returned // indirectly on ARM64 Windows. -// WOA64: define dso_local void @"?small_arg_with_private_member@@YA?AUSmallWithPrivate@@U1@@Z"(ptr dead_on_unwind inreg noalias writable sret(%struct.SmallWithPrivate) align 4 %agg.result, i64 %s.coerce) {{.*}} { +// WOA64: define dso_local void @"?small_arg_with_private_member@@YA?AUSmallWithPrivate@@U1@@Z"(ptr dead_on_unwind inreg noalias writable sret(%struct.SmallWithPrivate) align 4 %agg.result, i32 %s.coerce) {{.*}} { SmallWithPrivate small_arg_with_private_member(SmallWithPrivate s) { return s; } -// WOA64: define dso_local i32 @"?small_arg_with_small_struct_with_private_member@@YA?AUSmallWithSmallWithPrivate@@U1@@Z"(i64 %s.coerce) {{.*}} { +// WOA64: define dso_local i32 @"?small_arg_with_small_struct_with_private_member@@YA?AUSmallWithSmallWithPrivate@@U1@@Z"(i32 %s.coerce) {{.*}} { // WIN64: define dso_local i32 @"?small_arg_with_small_struct_with_private_member@@YA?AUSmallWithSmallWithPrivate@@U1@@Z"(i32 %s.coerce) {{.*}} { SmallWithSmallWithPrivate small_arg_with_small_struct_with_private_member(SmallWithSmallWithPrivate s) { return s; } _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
