Author: Amr Hesham Date: 2026-08-18T13:06:42Z New Revision: 9df790ef12caca732ea3ed7af755807d60085f0c
URL: https://github.com/llvm/llvm-project/commit/9df790ef12caca732ea3ed7af755807d60085f0c DIFF: https://github.com/llvm/llvm-project/commit/9df790ef12caca732ea3ed7af755807d60085f0c.diff LOG: [CIR] Support Vector of bool in Bitwise And, Or and XOR ops (#216681) Support the Vector of bool type in Bitwise And, Or, and XOR operations Added: Modified: clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td clang/test/CIR/CodeGen/vector-bool.cpp Removed: ################################################################################ diff --git a/clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td b/clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td index 0975e25a15ad0..afdd732a5867f 100644 --- a/clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td +++ b/clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td @@ -361,10 +361,10 @@ def CIR_AnyFloatOrVecOfFloatType } // Types valid for bitwise ops (and/or/xor): -// integer, boolean, or vector of integer (no floating-point). +// integer, boolean, or vector of bool or integer (no floating-point). def CIR_AnyBitwiseType - : AnyTypeOf<[CIR_AnyIntType, CIR_AnyBoolType, CIR_VectorOfIntType], - "integer, boolean, or vector of integer">; + : AnyTypeOf<[CIR_AnyIntType, CIR_AnyBoolType, CIR_VectorOfIntOrBoolType], + "integer, boolean, or vector of bool or integer">; //===----------------------------------------------------------------------===// // Data member type predicates diff --git a/clang/test/CIR/CodeGen/vector-bool.cpp b/clang/test/CIR/CodeGen/vector-bool.cpp index 91fa366c0872e..4e6f95902b81e 100644 --- a/clang/test/CIR/CodeGen/vector-bool.cpp +++ b/clang/test/CIR/CodeGen/vector-bool.cpp @@ -180,3 +180,56 @@ void vec_bool_ternary_expr() { // SHARED: %[[RESULT:.*]] = select <8 x i1> %[[TMP_A_I8]], <8 x i1> %[[TMP_B_I8]], <8 x i1> %[[TMP_C_I8]] // SHARED: %[[RESULT_I8:.*]] = bitcast <8 x i1> %[[RESULT]] to i8 // SHARED: store i8 %[[RESULT_I8]], ptr %[[D_ADDR]], align 1 + +void vec_bool_bitwise_operators() { + v8b a; + v8b b; + v8b v_or = a | b; + v8b v_and = a & b; + v8b v_xor = a ^ b; +} + +// CIR: %[[A_ADDR:.*]] = cir.alloca "a" {{.*}} : !cir.ptr<!cir.vector<8 x !cir.bool>> +// CIR: %[[B_ADDR:.*]] = cir.alloca "b" {{.*}} : !cir.ptr<!cir.vector<8 x !cir.bool>> +// CIR: %[[OR_ADDR:.*]] = cir.alloca "v_or" {{.*}} init : !cir.ptr<!cir.vector<8 x !cir.bool>> +// CIR: %[[AND_ADDR:.*]] = cir.alloca "v_and" {{.*}} init : !cir.ptr<!cir.vector<8 x !cir.bool>> +// CIR: %[[XOR_ADDR:.*]] = cir.alloca "v_xor" {{.*}} init : !cir.ptr<!cir.vector<8 x !cir.bool>> +// CIR: %[[TMP_A:.*]] = cir.load {{.*}} %[[A_ADDR]] : !cir.ptr<!cir.vector<8 x !cir.bool>>, !cir.vector<8 x !cir.bool> +// CIR: %[[TMP_B:.*]] = cir.load {{.*}} %[[B_ADDR]] : !cir.ptr<!cir.vector<8 x !cir.bool>>, !cir.vector<8 x !cir.bool> +// CIR: %[[OR:.*]] = cir.or %[[TMP_A]], %[[TMP_B]] : !cir.vector<8 x !cir.bool> +// CIR: cir.store {{.*}} %[[OR]], %[[OR_ADDR]] : !cir.vector<8 x !cir.bool>, !cir.ptr<!cir.vector<8 x !cir.bool>> +// CIR: %[[TMP_A:.*]] = cir.load {{.*}} %[[A_ADDR]] : !cir.ptr<!cir.vector<8 x !cir.bool>>, !cir.vector<8 x !cir.bool> +// CIR: %[[TMP_B:.*]] = cir.load {{.*}} %[[B_ADDR]] : !cir.ptr<!cir.vector<8 x !cir.bool>>, !cir.vector<8 x !cir.bool> +// CIR: %[[AND:.*]] = cir.and %[[TMP_A]], %[[TMP_B]] : !cir.vector<8 x !cir.bool> +// CIR: cir.store {{.*}} %[[AND]], %[[AND_ADDR]] : !cir.vector<8 x !cir.bool>, !cir.ptr<!cir.vector<8 x !cir.bool>> +// CIR: %[[TMP_A:.*]] = cir.load {{.*}} %[[A_ADDR]] : !cir.ptr<!cir.vector<8 x !cir.bool>>, !cir.vector<8 x !cir.bool> +// CIR: %[[TMP_B:.*]] = cir.load {{.*}} %[[B_ADDR]] : !cir.ptr<!cir.vector<8 x !cir.bool>>, !cir.vector<8 x !cir.bool> +// CIR: %[[XOR:.*]] = cir.xor %[[TMP_A]], %[[TMP_B]] : !cir.vector<8 x !cir.bool> +// CIR: cir.store {{.*}} %[[XOR]], %[[XOR_ADDR]] : !cir.vector<8 x !cir.bool>, !cir.ptr<!cir.vector<8 x !cir.bool>> + +// SHARED: %[[A_ADDR:.*]] = alloca i8, align 1 +// SHARED: %[[B_ADDR:.*]] = alloca i8, align 1 +// SHARED: %[[OR_ADDR:.*]] = alloca i8, align 1 +// SHARED: %[[AND_ADDR:.*]] = alloca i8, align 1 +// SHARED: %[[XOR_ADDR:.*]] = alloca i8, align 1 +// SHARED: %[[TMP_A:.*]] = load i8, ptr %[[A_ADDR]], align 1 +// SHARED: %[[TMP_A_VEC:.*]] = bitcast i8 %[[TMP_A]] to <8 x i1> +// SHARED: %[[TMP_B:.*]] = load i8, ptr %[[B_ADDR]], align 1 +// SHARED: %[[TMP_B_VEC:.*]] = bitcast i8 %[[TMP_B]] to <8 x i1> +// SHARED: %[[OR:.*]] = or <8 x i1> %[[TMP_A_VEC]], %[[TMP_B_VEC]] +// SHARED: %[[OR_I8:.*]] = bitcast <8 x i1> %[[OR]] to i8 +// SHARED: store i8 %[[OR_I8]], ptr %[[OR_ADDR]], align 1 +// SHARED: %[[TMP_A:.*]] = load i8, ptr %[[A_ADDR]], align 1 +// SHARED: %[[TMP_A_VEC:.*]] = bitcast i8 %[[TMP_A]] to <8 x i1> +// SHARED: %[[TMP_B:.*]] = load i8, ptr %[[B_ADDR]], align 1 +// SHARED: %[[TMP_B_VEC:.*]] = bitcast i8 %[[TMP_B]] to <8 x i1> +// SHARED: %[[AND:.*]] = and <8 x i1> %[[TMP_A_VEC]], %[[TMP_B_VEC]] +// SHARED: %[[AND_I8:.*]] = bitcast <8 x i1> %[[AND]] to i8 +// SHARED: store i8 %[[AND_I8]], ptr %[[AND_ADDR]], align 1 +// SHARED: %[[TMP_A:.*]] = load i8, ptr %[[A_ADDR]], align 1 +// SHARED: %[[TMP_A_VEC:.*]] = bitcast i8 %[[TMP_A]] to <8 x i1> +// SHARED: %[[TMP_B:.*]] = load i8, ptr %[[B_ADDR]], align 1 +// SHARED: %[[TMP_B_VEC:.*]] = bitcast i8 %[[TMP_B]] to <8 x i1> +// SHARED: %[[XOR:.*]] = xor <8 x i1> %[[TMP_A_VEC]], %[[TMP_B_VEC]] +// SHARED: %[[XOR_I8:.*]] = bitcast <8 x i1> %[[XOR]] to i8 +// SHARED: store i8 %[[XOR_I8]], ptr %[[XOR_ADDR]], align 1 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
