================
@@ -2791,6 +2789,26 @@ let append Predicates = [IsRV64] in {
def : Pat<(v2i32 (mul GPR:$rs1, GPR:$rs2)),
(PACK (MUL_W00 GPR:$rs1, GPR:$rs2), (MUL_W11 GPR:$rs1, GPR:$rs2))>;
+ // Packed widening multiply patterns.
+ def : Pat<(v4i16 (riscv_pwmul (v8i8 GPR:$rs1), (v8i8 GPR:$rs2))),
+ (PMUL_H_B01 (ZIP8P GPR:$rs1, GPR:$rs2),
----------------
topperc wrote:
The ZIP8P should be emitted with RISCVISD::PZIP from lowering. And we should
have new ISD nodes for PMUL_H_B01/PMUL_W_H01/PMULSU_H_B00/PMULSU_W_H00.
https://github.com/llvm/llvm-project/pull/217534
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