================
@@ -282,6 +282,134 @@ def : Pat<(relaxed_store<atomic_store_64>
(am_unscaled64 GPR64sp:$Rn, simm9:$offset), (i64 (bitconvert
(f64 FPR64Op:$val)))),
(STURDi FPR64Op:$val, GPR64sp:$Rn, simm9:$offset)>;
+//===----------------------------------
+// Atomic store with hint pseudos
+//===----------------------------------
+
+let Size = 8, isCodeGenOnly = 1, hasSideEffects = 1, mayStore = 1 in {
+ class BaseStoreHintPseudo<RegisterClass regtype>
+ : Pseudo<(outs), (ins GPR64sp:$addr, regtype:$data,
+ i32imm:$order, i32imm:$hint), []>,
Sched<[WriteAtomic]>;
----------------
Lukacma wrote:
It looks like you only care whether it is relaxed memory order or not in pseudo
expansion. If that's the case, you can add that info directly to pseudo instead
of adding order. That will also allow you to use
IsAtomicOrderingAcquireOrStronger flag for patterns and you will not need to
instantiate separate pattterns for seq_cst atomics.
https://github.com/llvm/llvm-project/pull/198316
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