================ @@ -1174,6 +1174,33 @@ For more information, see [PTX ISA](https://docs.nvidia.com/cuda/parallel-thread ### Arithmetic Intrinsics +Some of these intrinsics take the rounding mode as an `i32` immediate operand +instead of encoding it in the intrinsic name. The accepted values match the +`llvm::RoundingMode` enumeration and are described in the following table: + +(fp-rounding-modes)= + +```{list-table} Floating-Point Rounding Modes +:widths: 15 15 70 +:header-rows: 1 + + * - Value + - Rounding Mode + - Description + * - 0 + - `rz` + - Round towards zero ---------------- durga4github wrote:
and this renders as one row of a table? https://github.com/llvm/llvm-project/pull/217336 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
