================
@@ -0,0 +1,3548 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown
--show-mc-encoding -mattr=+avx10v2aux | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown
--show-mc-encoding -mattr=+avx10v2aux | FileCheck %s --check-prefixes=CHECK,X86
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2bf8_128(<4 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtps2bf8_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtps2bf8 %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x39,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2bf8.128(<4 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2bf8_256(<8 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtps2bf8_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtps2bf8 %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x39,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2bf8.256(<8 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2bf8_512(<16 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtps2bf8_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtps2bf8 %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x39,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2bf8.512(<16 x float> %a)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtps2bf8.128(<4 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtps2bf8.256(<8 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtps2bf8.512(<16 x float>)
+
+; Memory folding tests for vcvtps2bf8
+define <16 x i8> @test_int_x86_avx10_vcvtps2bf8_mem_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtps2bf8_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vcvtps2bf8x (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x39,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtps2bf8_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtps2bf8x (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x39,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <4 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2bf8.128(<4 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2bf8_mem_256(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtps2bf8_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vcvtps2bf8y (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x39,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtps2bf8_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtps2bf8y (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x39,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <8 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2bf8.256(<8 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2bf8_mem_512(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtps2bf8_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vcvtps2bf8 (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x39,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtps2bf8_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtps2bf8 (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x39,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2bf8.512(<16 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2bf8s_128(<4 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtps2bf8s_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtps2bf8s %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x3b,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2bf8s.128(<4 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2bf8s_256(<8 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtps2bf8s_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtps2bf8s %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x3b,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2bf8s.256(<8 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2bf8s_512(<16 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtps2bf8s_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtps2bf8s %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x3b,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2bf8s.512(<16 x float> %a)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtps2bf8s.128(<4 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtps2bf8s.256(<8 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtps2bf8s.512(<16 x float>)
+
+; Memory folding tests for vcvtps2bf8s
+define <16 x i8> @test_int_x86_avx10_vcvtps2bf8s_mem_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtps2bf8s_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vcvtps2bf8sx (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x3b,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtps2bf8s_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtps2bf8sx (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x3b,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <4 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2bf8s.128(<4 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2bf8s_mem_256(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtps2bf8s_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vcvtps2bf8sy (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x3b,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtps2bf8s_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtps2bf8sy (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x3b,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <8 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2bf8s.256(<8 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2bf8s_mem_512(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtps2bf8s_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vcvtps2bf8s (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x3b,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtps2bf8s_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtps2bf8s (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x3b,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2bf8s.512(<16 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2hf8_128(<4 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtps2hf8_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtps2hf8 %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x38,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2hf8.128(<4 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2hf8_256(<8 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtps2hf8_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtps2hf8 %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x38,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2hf8.256(<8 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2hf8_512(<16 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtps2hf8_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtps2hf8 %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x38,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2hf8.512(<16 x float> %a)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtps2hf8.128(<4 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtps2hf8.256(<8 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtps2hf8.512(<16 x float>)
+
+; Memory folding tests for vcvtps2hf8
+define <16 x i8> @test_int_x86_avx10_vcvtps2hf8_mem_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtps2hf8_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vcvtps2hf8x (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x38,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtps2hf8_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtps2hf8x (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x38,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <4 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2hf8.128(<4 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2hf8_mem_256(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtps2hf8_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vcvtps2hf8y (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x38,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtps2hf8_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtps2hf8y (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x38,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <8 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2hf8.256(<8 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2hf8_mem_512(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtps2hf8_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vcvtps2hf8 (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x38,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtps2hf8_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtps2hf8 (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x38,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2hf8.512(<16 x float> %a)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtps2hf8s.128(<4 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtps2hf8s.256(<8 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtps2hf8s.512(<16 x float>)
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2hf8s_128(<4 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtps2hf8s_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtps2hf8s %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x3a,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2hf8s.128(<4 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2hf8s_256(<8 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtps2hf8s_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtps2hf8s %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x3a,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2hf8s.256(<8 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2hf8s_512(<16 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtps2hf8s_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtps2hf8s %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x3a,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2hf8s.512(<16 x float> %a)
+ ret <16 x i8> %ret
+}
+
+; Memory folding tests for vcvtps2hf8s
+define <16 x i8> @test_int_x86_avx10_vcvtps2hf8s_mem_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtps2hf8s_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vcvtps2hf8sx (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x3a,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtps2hf8s_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtps2hf8sx (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x3a,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <4 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2hf8s.128(<4 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2hf8s_mem_256(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtps2hf8s_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vcvtps2hf8sy (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x3a,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtps2hf8s_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtps2hf8sy (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x3a,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <8 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2hf8s.256(<8 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtps2hf8s_mem_512(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtps2hf8s_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vcvtps2hf8s (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x3a,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtps2hf8s_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtps2hf8s (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x3a,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtps2hf8s.512(<16 x float> %a)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtrops2hf8.128(<4 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtrops2hf8.256(<8 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtrops2hf8.512(<16 x float>)
+
+define <16 x i8> @test_int_x86_avx10_vcvtrops2hf8_128(<4 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtrops2hf8_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtrops2hf8 %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7d,0x08,0x38,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtrops2hf8.128(<4 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtrops2hf8_256(<8 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtrops2hf8_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtrops2hf8 %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7d,0x28,0x38,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtrops2hf8.256(<8 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtrops2hf8_512(<16 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtrops2hf8_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtrops2hf8 %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7d,0x48,0x38,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtrops2hf8.512(<16 x float> %a)
+ ret <16 x i8> %ret
+}
+
+; Memory folding tests for vcvtrops2hf8
+define <16 x i8> @test_int_x86_avx10_vcvtrops2hf8_mem_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtrops2hf8_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vcvtrops2hf8x (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7d,0x08,0x38,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtrops2hf8_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtrops2hf8x (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7d,0x08,0x38,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <4 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtrops2hf8.128(<4 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtrops2hf8_mem_256(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtrops2hf8_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vcvtrops2hf8y (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7d,0x28,0x38,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtrops2hf8_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtrops2hf8y (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7d,0x28,0x38,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <8 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtrops2hf8.256(<8 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtrops2hf8_mem_512(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtrops2hf8_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vcvtrops2hf8 (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7d,0x48,0x38,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtrops2hf8_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtrops2hf8 (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7d,0x48,0x38,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtrops2hf8.512(<16 x float> %a)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtrops2hf8s.128(<4 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtrops2hf8s.256(<8 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtrops2hf8s.512(<16 x float>)
+
+define <16 x i8> @test_int_x86_avx10_vcvtrops2hf8s_128(<4 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtrops2hf8s_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtrops2hf8s %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7d,0x08,0x3a,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtrops2hf8s.128(<4 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtrops2hf8s_256(<8 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtrops2hf8s_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtrops2hf8s %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7d,0x28,0x3a,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtrops2hf8s.256(<8 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtrops2hf8s_512(<16 x float> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtrops2hf8s_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtrops2hf8s %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7d,0x48,0x3a,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtrops2hf8s.512(<16 x float> %a)
+ ret <16 x i8> %ret
+}
+
+; Memory folding tests for vcvtrops2hf8s
+define <16 x i8> @test_int_x86_avx10_vcvtrops2hf8s_mem_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtrops2hf8s_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vcvtrops2hf8sx (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7d,0x08,0x3a,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtrops2hf8s_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtrops2hf8sx (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7d,0x08,0x3a,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <4 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtrops2hf8s.128(<4 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtrops2hf8s_mem_256(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtrops2hf8s_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vcvtrops2hf8sy (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7d,0x28,0x3a,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtrops2hf8s_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtrops2hf8sy (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7d,0x28,0x3a,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <8 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtrops2hf8s.256(<8 x float> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtrops2hf8s_mem_512(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtrops2hf8s_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vcvtrops2hf8s (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7d,0x48,0x3a,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtrops2hf8s_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtrops2hf8s (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7d,0x48,0x3a,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x float>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtrops2hf8s.512(<16 x float> %a)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8.128(<4 x i32>, <4 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8.256(<8 x i32>, <8 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8.512(<16 x i32>, <16 x float>)
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2bf8_128(<4 x i32> %A, <4 x
float> %b) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasps2bf8_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasps2bf8 %xmm1, %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x39,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8.128(<4 x i32> %A, <4 x
float> %b)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2bf8_256(<8 x i32> %A, <8 x
float> %b) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasps2bf8_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasps2bf8 %ymm1, %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x39,0xc1]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8.256(<8 x i32> %A, <8 x
float> %b)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2bf8_512(<16 x i32> %A, <16 x
float> %b) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasps2bf8_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasps2bf8 %zmm1, %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x39,0xc1]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8.512(<16 x i32> %A, <16
x float> %b)
+ ret <16 x i8> %ret
+}
+
+; Memory folding tests for vcvtbiasps2bf8 (second operand from memory)
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2bf8_mem_128(<4 x i32> %A, ptr
%ptr_b) {
+; X64-LABEL: test_int_x86_avx10_vcvtbiasps2bf8_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbiasps2bf8 (%rdi), %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x39,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbiasps2bf8_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbiasps2bf8 (%eax), %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x39,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %b = load <4 x float>, ptr %ptr_b
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8.128(<4 x i32> %A, <4 x
float> %b)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2bf8_mem_256(<8 x i32> %A, ptr
%ptr_b) {
+; X64-LABEL: test_int_x86_avx10_vcvtbiasps2bf8_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbiasps2bf8 (%rdi), %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x39,0x07]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbiasps2bf8_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbiasps2bf8 (%eax), %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x39,0x00]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %b = load <8 x float>, ptr %ptr_b
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8.256(<8 x i32> %A, <8 x
float> %b)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2bf8_mem_512(<16 x i32> %A, ptr
%ptr_b) {
+; X64-LABEL: test_int_x86_avx10_vcvtbiasps2bf8_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbiasps2bf8 (%rdi), %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x39,0x07]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbiasps2bf8_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbiasps2bf8 (%eax), %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x39,0x00]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %b = load <16 x float>, ptr %ptr_b
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8.512(<16 x i32> %A, <16
x float> %b)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8s.128(<4 x i32>, <4 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8s.256(<8 x i32>, <8 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8s.512(<16 x i32>, <16 x float>)
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2bf8s_128(<4 x i32> %A, <4 x
float> %b) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasps2bf8s_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasps2bf8s %xmm1, %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x3b,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8s.128(<4 x i32> %A, <4 x
float> %b)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2bf8s_256(<8 x i32> %A, <8 x
float> %b) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasps2bf8s_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasps2bf8s %ymm1, %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x3b,0xc1]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8s.256(<8 x i32> %A, <8 x
float> %b)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2bf8s_512(<16 x i32> %A, <16 x
float> %b) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasps2bf8s_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasps2bf8s %zmm1, %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x3b,0xc1]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8s.512(<16 x i32> %A, <16
x float> %b)
+ ret <16 x i8> %ret
+}
+
+; Memory folding tests for vcvtbiasps2bf8s
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2bf8s_mem_128(<4 x i32> %A, ptr
%ptr_b) {
+; X64-LABEL: test_int_x86_avx10_vcvtbiasps2bf8s_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbiasps2bf8s (%rdi), %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x3b,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbiasps2bf8s_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbiasps2bf8s (%eax), %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x3b,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %b = load <4 x float>, ptr %ptr_b
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8s.128(<4 x i32> %A, <4 x
float> %b)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2bf8s_mem_256(<8 x i32> %A, ptr
%ptr_b) {
+; X64-LABEL: test_int_x86_avx10_vcvtbiasps2bf8s_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbiasps2bf8s (%rdi), %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x3b,0x07]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbiasps2bf8s_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbiasps2bf8s (%eax), %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x3b,0x00]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %b = load <8 x float>, ptr %ptr_b
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8s.256(<8 x i32> %A, <8 x
float> %b)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2bf8s_mem_512(<16 x i32> %A,
ptr %ptr_b) {
+; X64-LABEL: test_int_x86_avx10_vcvtbiasps2bf8s_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbiasps2bf8s (%rdi), %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x3b,0x07]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbiasps2bf8s_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbiasps2bf8s (%eax), %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x3b,0x00]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %b = load <16 x float>, ptr %ptr_b
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2bf8s.512(<16 x i32> %A, <16
x float> %b)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8.128(<4 x i32>, <4 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8.256(<8 x i32>, <8 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8.512(<16 x i32>, <16 x float>)
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2hf8_128(<4 x i32> %A, <4 x
float> %b) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasps2hf8_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasps2hf8 %xmm1, %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x38,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8.128(<4 x i32> %A, <4 x
float> %b)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2hf8_256(<8 x i32> %A, <8 x
float> %b) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasps2hf8_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasps2hf8 %ymm1, %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x38,0xc1]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8.256(<8 x i32> %A, <8 x
float> %b)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2hf8_512(<16 x i32> %A, <16 x
float> %b) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasps2hf8_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasps2hf8 %zmm1, %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x38,0xc1]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8.512(<16 x i32> %A, <16
x float> %b)
+ ret <16 x i8> %ret
+}
+
+; Memory folding tests for vcvtbiasps2hf8
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2hf8_mem_128(<4 x i32> %A, ptr
%ptr_b) {
+; X64-LABEL: test_int_x86_avx10_vcvtbiasps2hf8_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbiasps2hf8 (%rdi), %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x38,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbiasps2hf8_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbiasps2hf8 (%eax), %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x38,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %b = load <4 x float>, ptr %ptr_b
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8.128(<4 x i32> %A, <4 x
float> %b)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2hf8_mem_256(<8 x i32> %A, ptr
%ptr_b) {
+; X64-LABEL: test_int_x86_avx10_vcvtbiasps2hf8_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbiasps2hf8 (%rdi), %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x38,0x07]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbiasps2hf8_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbiasps2hf8 (%eax), %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x38,0x00]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %b = load <8 x float>, ptr %ptr_b
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8.256(<8 x i32> %A, <8 x
float> %b)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2hf8_mem_512(<16 x i32> %A, ptr
%ptr_b) {
+; X64-LABEL: test_int_x86_avx10_vcvtbiasps2hf8_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbiasps2hf8 (%rdi), %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x38,0x07]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbiasps2hf8_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbiasps2hf8 (%eax), %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x38,0x00]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %b = load <16 x float>, ptr %ptr_b
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8.512(<16 x i32> %A, <16
x float> %b)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8s.128(<4 x i32>, <4 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8s.256(<8 x i32>, <8 x float>)
+declare <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8s.512(<16 x i32>, <16 x float>)
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2hf8s_128(<4 x i32> %A, <4 x
float> %b) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasps2hf8s_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasps2hf8s %xmm1, %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x3a,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8s.128(<4 x i32> %A, <4 x
float> %b)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2hf8s_256(<8 x i32> %A, <8 x
float> %b) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasps2hf8s_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasps2hf8s %ymm1, %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x3a,0xc1]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8s.256(<8 x i32> %A, <8 x
float> %b)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2hf8s_512(<16 x i32> %A, <16 x
float> %b) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasps2hf8s_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasps2hf8s %zmm1, %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x3a,0xc1]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8s.512(<16 x i32> %A, <16
x float> %b)
+ ret <16 x i8> %ret
+}
+
+; Memory folding tests for vcvtbiasps2hf8s
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2hf8s_mem_128(<4 x i32> %A, ptr
%ptr_b) {
+; X64-LABEL: test_int_x86_avx10_vcvtbiasps2hf8s_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbiasps2hf8s (%rdi), %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x3a,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbiasps2hf8s_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbiasps2hf8s (%eax), %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x3a,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %b = load <4 x float>, ptr %ptr_b
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8s.128(<4 x i32> %A, <4 x
float> %b)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2hf8s_mem_256(<8 x i32> %A, ptr
%ptr_b) {
+; X64-LABEL: test_int_x86_avx10_vcvtbiasps2hf8s_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbiasps2hf8s (%rdi), %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x3a,0x07]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbiasps2hf8s_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbiasps2hf8s (%eax), %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x3a,0x00]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %b = load <8 x float>, ptr %ptr_b
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8s.256(<8 x i32> %A, <8 x
float> %b)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasps2hf8s_mem_512(<16 x i32> %A,
ptr %ptr_b) {
+; X64-LABEL: test_int_x86_avx10_vcvtbiasps2hf8s_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbiasps2hf8s (%rdi), %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x3a,0x07]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbiasps2hf8s_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbiasps2hf8s (%eax), %zmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x3a,0x00]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %b = load <16 x float>, ptr %ptr_b
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbiasps2hf8s.512(<16 x i32> %A, <16
x float> %b)
+ ret <16 x i8> %ret
+}
+
+declare <4 x float> @llvm.x86.avx10.vcvtbf82ps.128(<16 x i8>)
+declare <8 x float> @llvm.x86.avx10.vcvtbf82ps.256(<16 x i8>)
+declare <16 x float> @llvm.x86.avx10.vcvtbf82ps.512(<16 x i8>)
+
+define <4 x float> @test_int_x86_avx10_vcvtbf82ps_128(<16 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbf82ps_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbf82ps %xmm0, %xmm0 # encoding:
[0x62,0xf5,0xfc,0x08,0x36,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <4 x float> @llvm.x86.avx10.vcvtbf82ps.128(<16 x i8> %a)
+ ret <4 x float> %ret
+}
+
+define <8 x float> @test_int_x86_avx10_vcvtbf82ps_256(<16 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbf82ps_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbf82ps %xmm0, %ymm0 # encoding:
[0x62,0xf5,0xfc,0x28,0x36,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <8 x float> @llvm.x86.avx10.vcvtbf82ps.256(<16 x i8> %a)
+ ret <8 x float> %ret
+}
+
+define <16 x float> @test_int_x86_avx10_vcvtbf82ps_512(<16 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbf82ps_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbf82ps %xmm0, %zmm0 # encoding:
[0x62,0xf5,0xfc,0x48,0x36,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x float> @llvm.x86.avx10.vcvtbf82ps.512(<16 x i8> %a)
+ ret <16 x float> %ret
+}
+
+; Memory folding tests for vcvtbf82ps
+define <4 x float> @test_int_x86_avx10_vcvtbf82ps_mem_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf82ps_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbf82ps (%rdi), %xmm0 # encoding:
[0x62,0xf5,0xfc,0x08,0x36,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf82ps_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbf82ps (%eax), %xmm0 # encoding:
[0x62,0xf5,0xfc,0x08,0x36,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x i8>, ptr %ptr_a
+ %ret = call <4 x float> @llvm.x86.avx10.vcvtbf82ps.128(<16 x i8> %a)
+ ret <4 x float> %ret
+}
+
+define <8 x float> @test_int_x86_avx10_vcvtbf82ps_mem_256(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf82ps_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbf82ps (%rdi), %ymm0 # encoding:
[0x62,0xf5,0xfc,0x28,0x36,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf82ps_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbf82ps (%eax), %ymm0 # encoding:
[0x62,0xf5,0xfc,0x28,0x36,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x i8>, ptr %ptr_a
+ %ret = call <8 x float> @llvm.x86.avx10.vcvtbf82ps.256(<16 x i8> %a)
+ ret <8 x float> %ret
+}
+
+define <16 x float> @test_int_x86_avx10_vcvtbf82ps_mem_512(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf82ps_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbf82ps (%rdi), %zmm0 # encoding:
[0x62,0xf5,0xfc,0x48,0x36,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf82ps_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbf82ps (%eax), %zmm0 # encoding:
[0x62,0xf5,0xfc,0x48,0x36,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x i8>, ptr %ptr_a
+ %ret = call <16 x float> @llvm.x86.avx10.vcvtbf82ps.512(<16 x i8> %a)
+ ret <16 x float> %ret
+}
+
+declare <4 x float> @llvm.x86.avx10.vcvthf82ps.128(<16 x i8>)
+declare <8 x float> @llvm.x86.avx10.vcvthf82ps.256(<16 x i8>)
+declare <16 x float> @llvm.x86.avx10.vcvthf82ps.512(<16 x i8>)
+
+define <4 x float> @test_int_x86_avx10_vcvthf82ps_128(<16 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvthf82ps_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvthf82ps %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x36,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <4 x float> @llvm.x86.avx10.vcvthf82ps.128(<16 x i8> %a)
+ ret <4 x float> %ret
+}
+
+define <8 x float> @test_int_x86_avx10_vcvthf82ps_256(<16 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvthf82ps_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvthf82ps %xmm0, %ymm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x36,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <8 x float> @llvm.x86.avx10.vcvthf82ps.256(<16 x i8> %a)
+ ret <8 x float> %ret
+}
+
+define <16 x float> @test_int_x86_avx10_vcvthf82ps_512(<16 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvthf82ps_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvthf82ps %xmm0, %zmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x36,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x float> @llvm.x86.avx10.vcvthf82ps.512(<16 x i8> %a)
+ ret <16 x float> %ret
+}
+
+; Memory folding tests for vcvthf82ps
+define <4 x float> @test_int_x86_avx10_vcvthf82ps_mem_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvthf82ps_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vcvthf82ps (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x36,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvthf82ps_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvthf82ps (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x36,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x i8>, ptr %ptr_a
+ %ret = call <4 x float> @llvm.x86.avx10.vcvthf82ps.128(<16 x i8> %a)
+ ret <4 x float> %ret
+}
+
+define <8 x float> @test_int_x86_avx10_vcvthf82ps_mem_256(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvthf82ps_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vcvthf82ps (%rdi), %ymm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x36,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvthf82ps_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvthf82ps (%eax), %ymm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x36,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x i8>, ptr %ptr_a
+ %ret = call <8 x float> @llvm.x86.avx10.vcvthf82ps.256(<16 x i8> %a)
+ ret <8 x float> %ret
+}
+
+define <16 x float> @test_int_x86_avx10_vcvthf82ps_mem_512(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvthf82ps_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vcvthf82ps (%rdi), %zmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x36,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvthf82ps_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvthf82ps (%eax), %zmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x36,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x i8>, ptr %ptr_a
+ %ret = call <16 x float> @llvm.x86.avx10.vcvthf82ps.512(<16 x i8> %a)
+ ret <16 x float> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbf82bf4s_128(<16 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbf82bf4s_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbf82bf4s %xmm0, %xmm0 # encoding:
[0x62,0xf5,0xfe,0x08,0x3d,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbf82bf4s.128(<16 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbf82bf4s_256(<32 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbf82bf4s_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbf82bf4s %ymm0, %xmm0 # encoding:
[0x62,0xf5,0xfe,0x28,0x3d,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbf82bf4s.256(<32 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtbf82bf4s_512(<64 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbf82bf4s_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbf82bf4s %zmm0, %ymm0 # encoding:
[0x62,0xf5,0xfe,0x48,0x3d,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvtbf82bf4s.512(<64 x i8> %a)
+ ret <32 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtbf82bf4s.128(<16 x i8>)
+declare <16 x i8> @llvm.x86.avx10.vcvtbf82bf4s.256(<32 x i8>)
+declare <32 x i8> @llvm.x86.avx10.vcvtbf82bf4s.512(<64 x i8>)
+
+; Memory folding tests for vcvtbf82bf4s
+define <16 x i8> @test_int_x86_avx10_vcvtbf82bf4s_mem_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf82bf4s_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vmovaps (%rdi), %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf8,0x28,0x07]
+; X64-NEXT: vcvtbf82bf4s %xmm0, %xmm0 # encoding:
[0x62,0xf5,0xfe,0x08,0x3d,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf82bf4s_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovaps (%eax), %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf8,0x28,0x00]
+; X86-NEXT: vcvtbf82bf4s %xmm0, %xmm0 # encoding:
[0x62,0xf5,0xfe,0x08,0x3d,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x i8>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbf82bf4s.128(<16 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbf82bf4s_mem_256(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf82bf4s_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vmovaps (%rdi), %ymm0 # EVEX TO VEX Compression encoding:
[0xc5,0xfc,0x28,0x07]
+; X64-NEXT: vcvtbf82bf4s %ymm0, %xmm0 # encoding:
[0x62,0xf5,0xfe,0x28,0x3d,0xc0]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf82bf4s_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovaps (%eax), %ymm0 # EVEX TO VEX Compression encoding:
[0xc5,0xfc,0x28,0x00]
+; X86-NEXT: vcvtbf82bf4s %ymm0, %xmm0 # encoding:
[0x62,0xf5,0xfe,0x28,0x3d,0xc0]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <32 x i8>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbf82bf4s.256(<32 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtbf82bf4s_mem_512(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf82bf4s_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vmovaps (%rdi), %zmm0 # encoding:
[0x62,0xf1,0x7c,0x48,0x28,0x07]
+; X64-NEXT: vcvtbf82bf4s %zmm0, %ymm0 # encoding:
[0x62,0xf5,0xfe,0x48,0x3d,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf82bf4s_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovaps (%eax), %zmm0 # encoding:
[0x62,0xf1,0x7c,0x48,0x28,0x00]
+; X86-NEXT: vcvtbf82bf4s %zmm0, %ymm0 # encoding:
[0x62,0xf5,0xfe,0x48,0x3d,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <64 x i8>, ptr %ptr_a
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvtbf82bf4s.512(<64 x i8> %a)
+ ret <32 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvthf82bf4s_128(<16 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvthf82bf4s_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvthf82bf4s %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x3d,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvthf82bf4s.128(<16 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvthf82bf4s_256(<32 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvthf82bf4s_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvthf82bf4s %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x3d,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvthf82bf4s.256(<32 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvthf82bf4s_512(<64 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvthf82bf4s_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvthf82bf4s %zmm0, %ymm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x3d,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvthf82bf4s.512(<64 x i8> %a)
+ ret <32 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvthf82bf4s.128(<16 x i8>)
+declare <16 x i8> @llvm.x86.avx10.vcvthf82bf4s.256(<32 x i8>)
+declare <32 x i8> @llvm.x86.avx10.vcvthf82bf4s.512(<64 x i8>)
+
+; Memory folding tests for vcvthf82bf4s
+define <16 x i8> @test_int_x86_avx10_vcvthf82bf4s_mem_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvthf82bf4s_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vmovaps (%rdi), %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf8,0x28,0x07]
+; X64-NEXT: vcvthf82bf4s %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x3d,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvthf82bf4s_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovaps (%eax), %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf8,0x28,0x00]
+; X86-NEXT: vcvthf82bf4s %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x3d,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x i8>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvthf82bf4s.128(<16 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvthf82bf4s_mem_256(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvthf82bf4s_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vmovaps (%rdi), %ymm0 # EVEX TO VEX Compression encoding:
[0xc5,0xfc,0x28,0x07]
+; X64-NEXT: vcvthf82bf4s %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x3d,0xc0]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvthf82bf4s_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovaps (%eax), %ymm0 # EVEX TO VEX Compression encoding:
[0xc5,0xfc,0x28,0x00]
+; X86-NEXT: vcvthf82bf4s %ymm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x3d,0xc0]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <32 x i8>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvthf82bf4s.256(<32 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvthf82bf4s_mem_512(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvthf82bf4s_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vmovaps (%rdi), %zmm0 # encoding:
[0x62,0xf1,0x7c,0x48,0x28,0x07]
+; X64-NEXT: vcvthf82bf4s %zmm0, %ymm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x3d,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvthf82bf4s_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovaps (%eax), %zmm0 # encoding:
[0x62,0xf1,0x7c,0x48,0x28,0x00]
+; X86-NEXT: vcvthf82bf4s %zmm0, %ymm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x3d,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <64 x i8>, ptr %ptr_a
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvthf82bf4s.512(<64 x i8> %a)
+ ret <32 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbf82bf6s_128(<16 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbf82bf6s_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbf82bf6s %xmm0, %xmm0 # encoding:
[0x62,0xf5,0xfe,0x08,0x3e,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbf82bf6s.128(<16 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtbf82bf6s_256(<32 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbf82bf6s_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbf82bf6s %ymm0, %ymm0 # encoding:
[0x62,0xf5,0xfe,0x28,0x3e,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvtbf82bf6s.256(<32 x i8> %a)
+ ret <32 x i8> %ret
+}
+
+define <64 x i8> @test_int_x86_avx10_vcvtbf82bf6s_512(<64 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbf82bf6s_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbf82bf6s %zmm0, %zmm0 # encoding:
[0x62,0xf5,0xfe,0x48,0x3e,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <64 x i8> @llvm.x86.avx10.vcvtbf82bf6s.512(<64 x i8> %a)
+ ret <64 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtbf82bf6s.128(<16 x i8>)
+declare <32 x i8> @llvm.x86.avx10.vcvtbf82bf6s.256(<32 x i8>)
+declare <64 x i8> @llvm.x86.avx10.vcvtbf82bf6s.512(<64 x i8>)
+
+; Memory folding tests for vcvtbf82bf6s
+define <16 x i8> @test_int_x86_avx10_vcvtbf82bf6s_mem_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf82bf6s_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vmovaps (%rdi), %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf8,0x28,0x07]
+; X64-NEXT: vcvtbf82bf6s %xmm0, %xmm0 # encoding:
[0x62,0xf5,0xfe,0x08,0x3e,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf82bf6s_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovaps (%eax), %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf8,0x28,0x00]
+; X86-NEXT: vcvtbf82bf6s %xmm0, %xmm0 # encoding:
[0x62,0xf5,0xfe,0x08,0x3e,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x i8>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbf82bf6s.128(<16 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtbf82bf6s_mem_256(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf82bf6s_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vmovaps (%rdi), %ymm0 # EVEX TO VEX Compression encoding:
[0xc5,0xfc,0x28,0x07]
+; X64-NEXT: vcvtbf82bf6s %ymm0, %ymm0 # encoding:
[0x62,0xf5,0xfe,0x28,0x3e,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf82bf6s_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovaps (%eax), %ymm0 # EVEX TO VEX Compression encoding:
[0xc5,0xfc,0x28,0x00]
+; X86-NEXT: vcvtbf82bf6s %ymm0, %ymm0 # encoding:
[0x62,0xf5,0xfe,0x28,0x3e,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <32 x i8>, ptr %ptr_a
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvtbf82bf6s.256(<32 x i8> %a)
+ ret <32 x i8> %ret
+}
+
+define <64 x i8> @test_int_x86_avx10_vcvtbf82bf6s_mem_512(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf82bf6s_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vmovaps (%rdi), %zmm0 # encoding:
[0x62,0xf1,0x7c,0x48,0x28,0x07]
+; X64-NEXT: vcvtbf82bf6s %zmm0, %zmm0 # encoding:
[0x62,0xf5,0xfe,0x48,0x3e,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf82bf6s_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovaps (%eax), %zmm0 # encoding:
[0x62,0xf1,0x7c,0x48,0x28,0x00]
+; X86-NEXT: vcvtbf82bf6s %zmm0, %zmm0 # encoding:
[0x62,0xf5,0xfe,0x48,0x3e,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <64 x i8>, ptr %ptr_a
+ %ret = call <64 x i8> @llvm.x86.avx10.vcvtbf82bf6s.512(<64 x i8> %a)
+ ret <64 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvthf82hf6s_128(<16 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvthf82hf6s_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvthf82hf6s %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x3c,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvthf82hf6s.128(<16 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvthf82hf6s_256(<32 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvthf82hf6s_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvthf82hf6s %ymm0, %ymm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x3c,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvthf82hf6s.256(<32 x i8> %a)
+ ret <32 x i8> %ret
+}
+
+define <64 x i8> @test_int_x86_avx10_vcvthf82hf6s_512(<64 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvthf82hf6s_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvthf82hf6s %zmm0, %zmm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x3c,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <64 x i8> @llvm.x86.avx10.vcvthf82hf6s.512(<64 x i8> %a)
+ ret <64 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvthf82hf6s.128(<16 x i8>)
+declare <32 x i8> @llvm.x86.avx10.vcvthf82hf6s.256(<32 x i8>)
+declare <64 x i8> @llvm.x86.avx10.vcvthf82hf6s.512(<64 x i8>)
+
+; Memory folding tests for vcvthf82hf6s
+define <16 x i8> @test_int_x86_avx10_vcvthf82hf6s_mem_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvthf82hf6s_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vmovaps (%rdi), %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf8,0x28,0x07]
+; X64-NEXT: vcvthf82hf6s %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x3c,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvthf82hf6s_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovaps (%eax), %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf8,0x28,0x00]
+; X86-NEXT: vcvthf82hf6s %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7e,0x08,0x3c,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x i8>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvthf82hf6s.128(<16 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvthf82hf6s_mem_256(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvthf82hf6s_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vmovaps (%rdi), %ymm0 # EVEX TO VEX Compression encoding:
[0xc5,0xfc,0x28,0x07]
+; X64-NEXT: vcvthf82hf6s %ymm0, %ymm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x3c,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvthf82hf6s_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovaps (%eax), %ymm0 # EVEX TO VEX Compression encoding:
[0xc5,0xfc,0x28,0x00]
+; X86-NEXT: vcvthf82hf6s %ymm0, %ymm0 # encoding:
[0x62,0xf5,0x7e,0x28,0x3c,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <32 x i8>, ptr %ptr_a
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvthf82hf6s.256(<32 x i8> %a)
+ ret <32 x i8> %ret
+}
+
+define <64 x i8> @test_int_x86_avx10_vcvthf82hf6s_mem_512(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvthf82hf6s_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vmovaps (%rdi), %zmm0 # encoding:
[0x62,0xf1,0x7c,0x48,0x28,0x07]
+; X64-NEXT: vcvthf82hf6s %zmm0, %zmm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x3c,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvthf82hf6s_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovaps (%eax), %zmm0 # encoding:
[0x62,0xf1,0x7c,0x48,0x28,0x00]
+; X86-NEXT: vcvthf82hf6s %zmm0, %zmm0 # encoding:
[0x62,0xf5,0x7e,0x48,0x3c,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <64 x i8>, ptr %ptr_a
+ %ret = call <64 x i8> @llvm.x86.avx10.vcvthf82hf6s.512(<64 x i8> %a)
+ ret <64 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbf42hf8_128(<16 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbf42hf8_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbf42hf8 %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x37,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbf42hf8.128(<16 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtbf42hf8_256(<16 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbf42hf8_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbf42hf8 %xmm0, %ymm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x37,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvtbf42hf8.256(<16 x i8> %a)
+ ret <32 x i8> %ret
+}
+
+define <64 x i8> @test_int_x86_avx10_vcvtbf42hf8_512(<32 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbf42hf8_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbf42hf8 %ymm0, %zmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x37,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <64 x i8> @llvm.x86.avx10.vcvtbf42hf8.512(<32 x i8> %a)
+ ret <64 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtbf42hf8.128(<16 x i8>)
+declare <32 x i8> @llvm.x86.avx10.vcvtbf42hf8.256(<16 x i8>)
+declare <64 x i8> @llvm.x86.avx10.vcvtbf42hf8.512(<32 x i8>)
+
+; Memory folding tests for vcvtbf42hf8
+define <16 x i8> @test_int_x86_avx10_vcvtbf42hf8_mem_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf42hf8_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbf42hf8 (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x37,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf42hf8_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbf42hf8 (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x37,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x i8>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbf42hf8.128(<16 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtbf42hf8_mem_256(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf42hf8_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbf42hf8 (%rdi), %ymm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x37,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf42hf8_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbf42hf8 (%eax), %ymm0 # encoding:
[0x62,0xf5,0x7c,0x28,0x37,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x i8>, ptr %ptr_a
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvtbf42hf8.256(<16 x i8> %a)
+ ret <32 x i8> %ret
+}
+
+define <64 x i8> @test_int_x86_avx10_vcvtbf42hf8_mem_512(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf42hf8_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbf42hf8 (%rdi), %zmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x37,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf42hf8_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbf42hf8 (%eax), %zmm0 # encoding:
[0x62,0xf5,0x7c,0x48,0x37,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <32 x i8>, ptr %ptr_a
+ %ret = call <64 x i8> @llvm.x86.avx10.vcvtbf42hf8.512(<32 x i8> %a)
+ ret <64 x i8> %ret
+}
+
+; The 128-bit form only reads 8 bytes, so a 64-bit zero-extending load
+; (_mm_loadu_si64) must fold into the memory operand too.
+define <16 x i8> @test_int_x86_avx10_vcvtbf42hf8_vzload_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf42hf8_vzload_128:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbf42hf8 (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x37,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf42hf8_vzload_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbf42hf8 (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x37,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %l = load i64, ptr %ptr_a, align 1
+ %v = insertelement <2 x i64> <i64 poison, i64 0>, i64 %l, i64 0
+ %a = bitcast <2 x i64> %v to <16 x i8>
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbf42hf8.128(<16 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbf42hf8_vzload_mask_128(ptr %ptr_a,
<16 x i8> %src, i16 %mask) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf42hf8_vzload_mask_128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %esi, %k1 # encoding: [0xc5,0xfb,0x92,0xce]
+; X64-NEXT: vcvtbf42hf8 (%rdi), %xmm0 {%k1} # encoding:
[0x62,0xf5,0x7c,0x09,0x37,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf42hf8_vzload_mask_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding:
[0xc5,0xf8,0x90,0x4c,0x24,0x08]
+; X86-NEXT: vcvtbf42hf8 (%eax), %xmm0 {%k1} # encoding:
[0x62,0xf5,0x7c,0x09,0x37,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %l = load i64, ptr %ptr_a, align 1
+ %v = insertelement <2 x i64> <i64 poison, i64 0>, i64 %l, i64 0
+ %a = bitcast <2 x i64> %v to <16 x i8>
+ %cvt = call <16 x i8> @llvm.x86.avx10.vcvtbf42hf8.128(<16 x i8> %a)
+ %msk = bitcast i16 %mask to <16 x i1>
+ %ret = select <16 x i1> %msk, <16 x i8> %cvt, <16 x i8> %src
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbf42hf8_vzload_maskz_128(ptr %ptr_a,
i16 %mask) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf42hf8_vzload_maskz_128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %esi, %k1 # encoding: [0xc5,0xfb,0x92,0xce]
+; X64-NEXT: vcvtbf42hf8 (%rdi), %xmm0 {%k1} {z} # encoding:
[0x62,0xf5,0x7c,0x89,0x37,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf42hf8_vzload_maskz_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding:
[0xc5,0xf8,0x90,0x4c,0x24,0x08]
+; X86-NEXT: vcvtbf42hf8 (%eax), %xmm0 {%k1} {z} # encoding:
[0x62,0xf5,0x7c,0x89,0x37,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %l = load i64, ptr %ptr_a, align 1
+ %v = insertelement <2 x i64> <i64 poison, i64 0>, i64 %l, i64 0
+ %a = bitcast <2 x i64> %v to <16 x i8>
+ %cvt = call <16 x i8> @llvm.x86.avx10.vcvtbf42hf8.128(<16 x i8> %a)
+ %msk = bitcast i16 %mask to <16 x i1>
+ %ret = select <16 x i1> %msk, <16 x i8> %cvt, <16 x i8> zeroinitializer
+ ret <16 x i8> %ret
+}
+
+; Same, spelled as a scalar_to_vector of an i64 load (_mm_loadl_epi64).
+define <16 x i8> @test_int_x86_avx10_vcvtbf42hf8_s2v_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf42hf8_s2v_128:
+; X64: # %bb.0:
+; X64-NEXT: vcvtbf42hf8 (%rdi), %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x37,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf42hf8_s2v_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vcvtbf42hf8 (%eax), %xmm0 # encoding:
[0x62,0xf5,0x7c,0x08,0x37,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %l = load i64, ptr %ptr_a, align 8
+ %v = insertelement <2 x i64> poison, i64 %l, i64 0
+ %a = bitcast <2 x i64> %v to <16 x i8>
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbf42hf8.128(<16 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+; Masked variants of the plain 16-byte load, which must keep folding.
+define <16 x i8> @test_int_x86_avx10_vcvtbf42hf8_mem_mask_128(ptr %ptr_a, <16
x i8> %src, i16 %mask) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf42hf8_mem_mask_128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %esi, %k1 # encoding: [0xc5,0xfb,0x92,0xce]
+; X64-NEXT: vcvtbf42hf8 (%rdi), %xmm0 {%k1} # encoding:
[0x62,0xf5,0x7c,0x09,0x37,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf42hf8_mem_mask_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding:
[0xc5,0xf8,0x90,0x4c,0x24,0x08]
+; X86-NEXT: vcvtbf42hf8 (%eax), %xmm0 {%k1} # encoding:
[0x62,0xf5,0x7c,0x09,0x37,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x i8>, ptr %ptr_a
+ %cvt = call <16 x i8> @llvm.x86.avx10.vcvtbf42hf8.128(<16 x i8> %a)
+ %msk = bitcast i16 %mask to <16 x i1>
+ %ret = select <16 x i1> %msk, <16 x i8> %cvt, <16 x i8> %src
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbf42hf8_mem_maskz_128(ptr %ptr_a, i16
%mask) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf42hf8_mem_maskz_128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %esi, %k1 # encoding: [0xc5,0xfb,0x92,0xce]
+; X64-NEXT: vcvtbf42hf8 (%rdi), %xmm0 {%k1} {z} # encoding:
[0x62,0xf5,0x7c,0x89,0x37,0x07]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf42hf8_mem_maskz_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding:
[0xc5,0xf8,0x90,0x4c,0x24,0x08]
+; X86-NEXT: vcvtbf42hf8 (%eax), %xmm0 {%k1} {z} # encoding:
[0x62,0xf5,0x7c,0x89,0x37,0x00]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x i8>, ptr %ptr_a
+ %cvt = call <16 x i8> @llvm.x86.avx10.vcvtbf42hf8.128(<16 x i8> %a)
+ %msk = bitcast i16 %mask to <16 x i1>
+ %ret = select <16 x i1> %msk, <16 x i8> %cvt, <16 x i8> zeroinitializer
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbf62hf8_128(<16 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbf62hf8_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbf62hf8 %xmm0, %xmm0 # encoding:
[0x62,0xf5,0xfd,0x08,0x37,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbf62hf8.128(<16 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtbf62hf8_256(<32 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbf62hf8_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbf62hf8 %ymm0, %ymm0 # encoding:
[0x62,0xf5,0xfd,0x28,0x37,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvtbf62hf8.256(<32 x i8> %a)
+ ret <32 x i8> %ret
+}
+
+define <64 x i8> @test_int_x86_avx10_vcvtbf62hf8_512(<64 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbf62hf8_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbf62hf8 %zmm0, %zmm0 # encoding:
[0x62,0xf5,0xfd,0x48,0x37,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <64 x i8> @llvm.x86.avx10.vcvtbf62hf8.512(<64 x i8> %a)
+ ret <64 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtbf62hf8.128(<16 x i8>)
+declare <32 x i8> @llvm.x86.avx10.vcvtbf62hf8.256(<32 x i8>)
+declare <64 x i8> @llvm.x86.avx10.vcvtbf62hf8.512(<64 x i8>)
+
+; Memory folding tests for vcvtbf62hf8
+define <16 x i8> @test_int_x86_avx10_vcvtbf62hf8_mem_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf62hf8_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vmovdqa (%rdi), %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf9,0x6f,0x07]
+; X64-NEXT: vcvtbf62hf8 %xmm0, %xmm0 # encoding:
[0x62,0xf5,0xfd,0x08,0x37,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf62hf8_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovdqa (%eax), %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf9,0x6f,0x00]
+; X86-NEXT: vcvtbf62hf8 %xmm0, %xmm0 # encoding:
[0x62,0xf5,0xfd,0x08,0x37,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x i8>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtbf62hf8.128(<16 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtbf62hf8_mem_256(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf62hf8_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vmovdqa (%rdi), %ymm0 # EVEX TO VEX Compression encoding:
[0xc5,0xfd,0x6f,0x07]
+; X64-NEXT: vcvtbf62hf8 %ymm0, %ymm0 # encoding:
[0x62,0xf5,0xfd,0x28,0x37,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf62hf8_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovdqa (%eax), %ymm0 # EVEX TO VEX Compression encoding:
[0xc5,0xfd,0x6f,0x00]
+; X86-NEXT: vcvtbf62hf8 %ymm0, %ymm0 # encoding:
[0x62,0xf5,0xfd,0x28,0x37,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <32 x i8>, ptr %ptr_a
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvtbf62hf8.256(<32 x i8> %a)
+ ret <32 x i8> %ret
+}
+
+define <64 x i8> @test_int_x86_avx10_vcvtbf62hf8_mem_512(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvtbf62hf8_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vmovdqa64 (%rdi), %zmm0 # encoding:
[0x62,0xf1,0xfd,0x48,0x6f,0x07]
+; X64-NEXT: vcvtbf62hf8 %zmm0, %zmm0 # encoding:
[0x62,0xf5,0xfd,0x48,0x37,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtbf62hf8_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovdqa64 (%eax), %zmm0 # encoding:
[0x62,0xf1,0xfd,0x48,0x6f,0x00]
+; X86-NEXT: vcvtbf62hf8 %zmm0, %zmm0 # encoding:
[0x62,0xf5,0xfd,0x48,0x37,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <64 x i8>, ptr %ptr_a
+ %ret = call <64 x i8> @llvm.x86.avx10.vcvtbf62hf8.512(<64 x i8> %a)
+ ret <64 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvthf62hf8_128(<16 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvthf62hf8_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvthf62hf8 %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7d,0x08,0x37,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvthf62hf8.128(<16 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvthf62hf8_256(<32 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvthf62hf8_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvthf62hf8 %ymm0, %ymm0 # encoding:
[0x62,0xf5,0x7d,0x28,0x37,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvthf62hf8.256(<32 x i8> %a)
+ ret <32 x i8> %ret
+}
+
+define <64 x i8> @test_int_x86_avx10_vcvthf62hf8_512(<64 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vcvthf62hf8_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvthf62hf8 %zmm0, %zmm0 # encoding:
[0x62,0xf5,0x7d,0x48,0x37,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <64 x i8> @llvm.x86.avx10.vcvthf62hf8.512(<64 x i8> %a)
+ ret <64 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvthf62hf8.128(<16 x i8>)
+declare <32 x i8> @llvm.x86.avx10.vcvthf62hf8.256(<32 x i8>)
+declare <64 x i8> @llvm.x86.avx10.vcvthf62hf8.512(<64 x i8>)
+
+; Memory folding tests for vcvthf62hf8
+define <16 x i8> @test_int_x86_avx10_vcvthf62hf8_mem_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvthf62hf8_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vmovdqa (%rdi), %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf9,0x6f,0x07]
+; X64-NEXT: vcvthf62hf8 %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7d,0x08,0x37,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvthf62hf8_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovdqa (%eax), %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf9,0x6f,0x00]
+; X86-NEXT: vcvthf62hf8 %xmm0, %xmm0 # encoding:
[0x62,0xf5,0x7d,0x08,0x37,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x i8>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvthf62hf8.128(<16 x i8> %a)
+ ret <16 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvthf62hf8_mem_256(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvthf62hf8_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vmovdqa (%rdi), %ymm0 # EVEX TO VEX Compression encoding:
[0xc5,0xfd,0x6f,0x07]
+; X64-NEXT: vcvthf62hf8 %ymm0, %ymm0 # encoding:
[0x62,0xf5,0x7d,0x28,0x37,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvthf62hf8_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovdqa (%eax), %ymm0 # EVEX TO VEX Compression encoding:
[0xc5,0xfd,0x6f,0x00]
+; X86-NEXT: vcvthf62hf8 %ymm0, %ymm0 # encoding:
[0x62,0xf5,0x7d,0x28,0x37,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <32 x i8>, ptr %ptr_a
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvthf62hf8.256(<32 x i8> %a)
+ ret <32 x i8> %ret
+}
+
+define <64 x i8> @test_int_x86_avx10_vcvthf62hf8_mem_512(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vcvthf62hf8_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vmovdqa64 (%rdi), %zmm0 # encoding:
[0x62,0xf1,0xfd,0x48,0x6f,0x07]
+; X64-NEXT: vcvthf62hf8 %zmm0, %zmm0 # encoding:
[0x62,0xf5,0x7d,0x48,0x37,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvthf62hf8_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovdqa64 (%eax), %zmm0 # encoding:
[0x62,0xf1,0xfd,0x48,0x6f,0x00]
+; X86-NEXT: vcvthf62hf8 %zmm0, %zmm0 # encoding:
[0x62,0xf5,0x7d,0x48,0x37,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <64 x i8>, ptr %ptr_a
+ %ret = call <64 x i8> @llvm.x86.avx10.vcvthf62hf8.512(<64 x i8> %a)
+ ret <64 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vunpackb_128(<16 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vunpackb_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vunpackb $1, %xmm0, %xmm0 # encoding:
[0x62,0xf3,0x7c,0x08,0x3d,0xc0,0x01]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vunpackb.128(<16 x i8> %a, i8 1)
+ ret <16 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vunpackb_256(<32 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vunpackb_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vunpackb $2, %ymm0, %ymm0 # encoding:
[0x62,0xf3,0x7c,0x28,0x3d,0xc0,0x02]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.vunpackb.256(<32 x i8> %a, i8 2)
+ ret <32 x i8> %ret
+}
+
+define <64 x i8> @test_int_x86_avx10_vunpackb_512(<64 x i8> %a) {
+; CHECK-LABEL: test_int_x86_avx10_vunpackb_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vunpackb $3, %zmm0, %zmm0 # encoding:
[0x62,0xf3,0x7c,0x48,0x3d,0xc0,0x03]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <64 x i8> @llvm.x86.avx10.vunpackb.512(<64 x i8> %a, i8 3)
+ ret <64 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.vunpackb.128(<16 x i8>, i8)
+declare <32 x i8> @llvm.x86.avx10.vunpackb.256(<32 x i8>, i8)
+declare <64 x i8> @llvm.x86.avx10.vunpackb.512(<64 x i8>, i8)
+
+; Memory folding tests for vunpackb
+define <16 x i8> @test_int_x86_avx10_vunpackb_mem_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vunpackb_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vunpackb $1, (%rdi), %xmm0 # encoding:
[0x62,0xf3,0x7c,0x08,0x3d,0x07,0x01]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vunpackb_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vunpackb $1, (%eax), %xmm0 # encoding:
[0x62,0xf3,0x7c,0x08,0x3d,0x00,0x01]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <16 x i8>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.vunpackb.128(<16 x i8> %a, i8 1)
+ ret <16 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vunpackb_mem_256(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vunpackb_mem_256:
+; X64: # %bb.0:
+; X64-NEXT: vunpackb $2, (%rdi), %ymm0 # encoding:
[0x62,0xf3,0x7c,0x28,0x3d,0x07,0x02]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vunpackb_mem_256:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vunpackb $2, (%eax), %ymm0 # encoding:
[0x62,0xf3,0x7c,0x28,0x3d,0x00,0x02]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <32 x i8>, ptr %ptr_a
+ %ret = call <32 x i8> @llvm.x86.avx10.vunpackb.256(<32 x i8> %a, i8 2)
+ ret <32 x i8> %ret
+}
+
+define <64 x i8> @test_int_x86_avx10_vunpackb_mem_512(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_vunpackb_mem_512:
+; X64: # %bb.0:
+; X64-NEXT: vunpackb $3, (%rdi), %zmm0 # encoding:
[0x62,0xf3,0x7c,0x48,0x3d,0x07,0x03]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vunpackb_mem_512:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vunpackb $3, (%eax), %zmm0 # encoding:
[0x62,0xf3,0x7c,0x48,0x3d,0x00,0x03]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <64 x i8>, ptr %ptr_a
+ %ret = call <64 x i8> @llvm.x86.avx10.vunpackb.512(<64 x i8> %a, i8 3)
+ ret <64 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_pmovssdb_128(<4 x i32> %a) {
+; CHECK-LABEL: test_int_x86_avx10_pmovssdb_128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vpmovssdb %xmm0, %xmm0 # encoding:
[0x62,0xf2,0x7e,0x08,0x41,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.pmovss.db.128(<4 x i32> %a, <16 x
i8> zeroinitializer, i8 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_pmovssdb_256(<8 x i32> %a) {
+; CHECK-LABEL: test_int_x86_avx10_pmovssdb_256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vpmovssdb %ymm0, %xmm0 # encoding:
[0x62,0xf2,0x7e,0x28,0x41,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.pmovss.db.256(<8 x i32> %a, <16 x
i8> zeroinitializer, i8 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_pmovssdb_512(<16 x i32> %a) {
+; CHECK-LABEL: test_int_x86_avx10_pmovssdb_512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vpmovssdb %zmm0, %xmm0 # encoding:
[0x62,0xf2,0x7e,0x48,0x41,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.pmovss.db.512(<16 x i32> %a, <16
x i8> zeroinitializer, i16 -1)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.mask.pmovss.db.128(<4 x i32>, <16 x i8>, i8)
+declare <16 x i8> @llvm.x86.avx10.mask.pmovss.db.256(<8 x i32>, <16 x i8>, i8)
+declare <16 x i8> @llvm.x86.avx10.mask.pmovss.db.512(<16 x i32>, <16 x i8>,
i16)
+
+; Masked tests for vpmovssdb
+define <16 x i8> @test_int_x86_avx10_mask_pmovssdb_128(<4 x i32> %a, <16 x i8>
%passthru, i8 %mask) {
+; X64-LABEL: test_int_x86_avx10_mask_pmovssdb_128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vpmovssdb %xmm0, %xmm2 # encoding:
[0x62,0xf2,0x7e,0x08,0x41,0xc2]
+; X64-NEXT: vpmovssdb %xmm0, %xmm1 {%k1} # encoding:
[0x62,0xf2,0x7e,0x09,0x41,0xc1]
+; X64-NEXT: vpaddb %xmm1, %xmm2, %xmm1 # EVEX TO VEX Compression encoding:
[0xc5,0xe9,0xfc,0xc9]
+; X64-NEXT: vpmovssdb %xmm0, %xmm0 {%k1} {z} # encoding:
[0x62,0xf2,0x7e,0x89,0x41,0xc0]
+; X64-NEXT: vpaddb %xmm0, %xmm1, %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf1,0xfc,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_pmovssdb_128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding:
[0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vpmovssdb %xmm0, %xmm2 # encoding:
[0x62,0xf2,0x7e,0x08,0x41,0xc2]
+; X86-NEXT: vpmovssdb %xmm0, %xmm1 {%k1} # encoding:
[0x62,0xf2,0x7e,0x09,0x41,0xc1]
+; X86-NEXT: vpaddb %xmm1, %xmm2, %xmm1 # EVEX TO VEX Compression encoding:
[0xc5,0xe9,0xfc,0xc9]
+; X86-NEXT: vpmovssdb %xmm0, %xmm0 {%k1} {z} # encoding:
[0x62,0xf2,0x7e,0x89,0x41,0xc0]
+; X86-NEXT: vpaddb %xmm0, %xmm1, %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf1,0xfc,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %res0 = call <16 x i8> @llvm.x86.avx10.mask.pmovss.db.128(<4 x i32> %a, <16
x i8> %passthru, i8 -1)
+ %res1 = call <16 x i8> @llvm.x86.avx10.mask.pmovss.db.128(<4 x i32> %a, <16
x i8> %passthru, i8 %mask)
+ %res2 = call <16 x i8> @llvm.x86.avx10.mask.pmovss.db.128(<4 x i32> %a, <16
x i8> zeroinitializer, i8 %mask)
+ %add1 = add <16 x i8> %res0, %res1
+ %add2 = add <16 x i8> %add1, %res2
+ ret <16 x i8> %add2
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_pmovssdb_256(<8 x i32> %a, <16 x i8>
%passthru, i8 %mask) {
+; X64-LABEL: test_int_x86_avx10_mask_pmovssdb_256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vpmovssdb %ymm0, %xmm2 # encoding:
[0x62,0xf2,0x7e,0x28,0x41,0xc2]
+; X64-NEXT: vpmovssdb %ymm0, %xmm1 {%k1} # encoding:
[0x62,0xf2,0x7e,0x29,0x41,0xc1]
+; X64-NEXT: vpaddb %xmm1, %xmm2, %xmm1 # EVEX TO VEX Compression encoding:
[0xc5,0xe9,0xfc,0xc9]
+; X64-NEXT: vpmovssdb %ymm0, %xmm0 {%k1} {z} # encoding:
[0x62,0xf2,0x7e,0xa9,0x41,0xc0]
+; X64-NEXT: vpaddb %xmm0, %xmm1, %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf1,0xfc,0xc0]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_pmovssdb_256:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding:
[0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vpmovssdb %ymm0, %xmm2 # encoding:
[0x62,0xf2,0x7e,0x28,0x41,0xc2]
+; X86-NEXT: vpmovssdb %ymm0, %xmm1 {%k1} # encoding:
[0x62,0xf2,0x7e,0x29,0x41,0xc1]
+; X86-NEXT: vpaddb %xmm1, %xmm2, %xmm1 # EVEX TO VEX Compression encoding:
[0xc5,0xe9,0xfc,0xc9]
+; X86-NEXT: vpmovssdb %ymm0, %xmm0 {%k1} {z} # encoding:
[0x62,0xf2,0x7e,0xa9,0x41,0xc0]
+; X86-NEXT: vpaddb %xmm0, %xmm1, %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf1,0xfc,0xc0]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %res0 = call <16 x i8> @llvm.x86.avx10.mask.pmovss.db.256(<8 x i32> %a, <16
x i8> %passthru, i8 -1)
+ %res1 = call <16 x i8> @llvm.x86.avx10.mask.pmovss.db.256(<8 x i32> %a, <16
x i8> %passthru, i8 %mask)
+ %res2 = call <16 x i8> @llvm.x86.avx10.mask.pmovss.db.256(<8 x i32> %a, <16
x i8> zeroinitializer, i8 %mask)
+ %add1 = add <16 x i8> %res0, %res1
+ %add2 = add <16 x i8> %add1, %res2
+ ret <16 x i8> %add2
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_pmovssdb_512(<16 x i32> %a, <16 x
i8> %passthru, i16 %mask) {
+; X64-LABEL: test_int_x86_avx10_mask_pmovssdb_512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vpmovssdb %zmm0, %xmm2 # encoding:
[0x62,0xf2,0x7e,0x48,0x41,0xc2]
+; X64-NEXT: vpmovssdb %zmm0, %xmm1 {%k1} # encoding:
[0x62,0xf2,0x7e,0x49,0x41,0xc1]
+; X64-NEXT: vpaddb %xmm1, %xmm2, %xmm1 # EVEX TO VEX Compression encoding:
[0xc5,0xe9,0xfc,0xc9]
+; X64-NEXT: vpmovssdb %zmm0, %xmm0 {%k1} {z} # encoding:
[0x62,0xf2,0x7e,0xc9,0x41,0xc0]
+; X64-NEXT: vpaddb %xmm0, %xmm1, %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf1,0xfc,0xc0]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_pmovssdb_512:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding:
[0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vpmovssdb %zmm0, %xmm2 # encoding:
[0x62,0xf2,0x7e,0x48,0x41,0xc2]
+; X86-NEXT: vpmovssdb %zmm0, %xmm1 {%k1} # encoding:
[0x62,0xf2,0x7e,0x49,0x41,0xc1]
+; X86-NEXT: vpaddb %xmm1, %xmm2, %xmm1 # EVEX TO VEX Compression encoding:
[0xc5,0xe9,0xfc,0xc9]
+; X86-NEXT: vpmovssdb %zmm0, %xmm0 {%k1} {z} # encoding:
[0x62,0xf2,0x7e,0xc9,0x41,0xc0]
+; X86-NEXT: vpaddb %xmm0, %xmm1, %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf1,0xfc,0xc0]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %res0 = call <16 x i8> @llvm.x86.avx10.mask.pmovss.db.512(<16 x i32> %a, <16
x i8> %passthru, i16 -1)
+ %res1 = call <16 x i8> @llvm.x86.avx10.mask.pmovss.db.512(<16 x i32> %a, <16
x i8> %passthru, i16 %mask)
+ %res2 = call <16 x i8> @llvm.x86.avx10.mask.pmovss.db.512(<16 x i32> %a, <16
x i8> zeroinitializer, i16 %mask)
+ %add1 = add <16 x i8> %res0, %res1
+ %add2 = add <16 x i8> %add1, %res2
+ ret <16 x i8> %add2
+}
+
+; Memory folding tests for vpmovssdb
+define <16 x i8> @test_int_x86_avx10_pmovssdb_mem_128(ptr %ptr_a) {
+; X64-LABEL: test_int_x86_avx10_pmovssdb_mem_128:
+; X64: # %bb.0:
+; X64-NEXT: vmovdqa (%rdi), %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf9,0x6f,0x07]
+; X64-NEXT: vpmovssdb %xmm0, %xmm0 # encoding:
[0x62,0xf2,0x7e,0x08,0x41,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_pmovssdb_mem_128:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
+; X86-NEXT: vmovdqa (%eax), %xmm0 # EVEX TO VEX Compression encoding:
[0xc5,0xf9,0x6f,0x00]
+; X86-NEXT: vpmovssdb %xmm0, %xmm0 # encoding:
[0x62,0xf2,0x7e,0x08,0x41,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %a = load <4 x i32>, ptr %ptr_a
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.pmovss.db.128(<4 x i32> %a, <16 x
i8> zeroinitializer, i8 -1)
+ ret <16 x i8> %ret
+}
----------------
e-kud wrote:
No memory folding as well.
https://github.com/llvm/llvm-project/pull/206888
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