https://github.com/iamvickynguyen created https://github.com/llvm/llvm-project/pull/221389
Related to https://github.com/llvm/llvm-project/issues/185382 Port tests from clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c to clang/test/CodeGen/AArch64/neon/rounding-v8.5.c >From d8465289b7d1455ab6151970ec133ed73c0b5c63 Mon Sep 17 00:00:00 2001 From: Vicky Nguyen <[email protected]> Date: Fri, 4 Sep 2026 21:40:49 -0700 Subject: [PATCH] [CIR][AArch64] Port f64 tests for v8.5 rounding NEON builtins --- .../test/CodeGen/AArch64/neon/rounding-v8.5.c | 124 +++++++++++++++ .../AArch64/v8.5a-neon-frint3264-intrinsic.c | 145 ------------------ 2 files changed, 124 insertions(+), 145 deletions(-) delete mode 100644 clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c diff --git a/clang/test/CodeGen/AArch64/neon/rounding-v8.5.c b/clang/test/CodeGen/AArch64/neon/rounding-v8.5.c index b95c63c1e611e..e9bcf6ea22b7d 100644 --- a/clang/test/CodeGen/AArch64/neon/rounding-v8.5.c +++ b/clang/test/CodeGen/AArch64/neon/rounding-v8.5.c @@ -130,3 +130,127 @@ float32x4_t test_vrnd64zq_f32(float32x4_t a) { // LLVM: [[VRND64ZQ1_I:%.*]] = call <4 x float> @llvm.aarch64.neon.frint64z.v4f32(<4 x float> [[VRND64ZQ_I]]) return vrnd64zq_f32(a); } + +// LLVM-LABEL: @test_vrnd32x_f64( +// CIR-LABEL: @vrnd32x_f64( +float64x1_t test_vrnd32x_f64(float64x1_t a) { +// CIR: [[LOAD:%.*]] = cir.load {{.*}} : !cir.ptr<!cir.vector<8 x !s8i>>, !cir.vector<8 x !s8i> +// CIR: [[CAST:%.*]] = cir.cast bitcast [[LOAD]] : !cir.vector<8 x !s8i> -> !cir.vector<1 x !cir.double> +// CIR: cir.call_llvm_intrinsic "aarch64.neon.frint32x" [[CAST]] : (!cir.vector<1 x !cir.double>) -> !cir.vector<1 x !cir.double> + +// LLVM-SAME: <1 x double> noundef [[A:%.*]]) +// LLVM: [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i64 +// LLVM: [[INS:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i64 0 +// LLVM: [[TMP1:%.*]] = bitcast <1 x i64> [[INS]] to <8 x i8> +// LLVM: [[VRND32X_F64_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double> +// LLVM: [[VRND32X_F641_I:%.*]] = call <1 x double> @llvm.aarch64.neon.frint32x.v1f64(<1 x double> [[VRND32X_F64_I]]) + return vrnd32x_f64(a); +} + +// LLVM-LABEL: @test_vrnd32xq_f64( +// CIR-LABEL: @vrnd32xq_f64( +float64x2_t test_vrnd32xq_f64(float64x2_t a) { +// CIR: [[LOAD:%.*]] = cir.load {{.*}} : !cir.ptr<!cir.vector<16 x !s8i>>, !cir.vector<16 x !s8i> +// CIR: [[CAST:%.*]] = cir.cast bitcast [[LOAD]] : !cir.vector<16 x !s8i> -> !cir.vector<2 x !cir.double> +// CIR: cir.call_llvm_intrinsic "aarch64.neon.frint32x" [[CAST]] : (!cir.vector<2 x !cir.double>) -> !cir.vector<2 x !cir.double> + +// LLVM-SAME: <2 x double> noundef [[A:%.*]]) +// LLVM: [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64> +// LLVM: [[TMP1:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8> +// LLVM: [[VRND32XQ_F64_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double> +// LLVM: [[VRND32XQ1_F64_I:%.*]] = call <2 x double> @llvm.aarch64.neon.frint32x.v2f64(<2 x double> [[VRND32XQ_F64_I]]) + return vrnd32xq_f64(a); +} + +// LLVM-LABEL: @test_vrnd32z_f64( +// CIR-LABEL: @vrnd32z_f64( +float64x1_t test_vrnd32z_f64(float64x1_t a) { +// CIR: [[LOAD:%.*]] = cir.load {{.*}} : !cir.ptr<!cir.vector<8 x !s8i>>, !cir.vector<8 x !s8i> +// CIR: [[CAST:%.*]] = cir.cast bitcast [[LOAD]] : !cir.vector<8 x !s8i> -> !cir.vector<1 x !cir.double> +// CIR: cir.call_llvm_intrinsic "aarch64.neon.frint32z" [[CAST]] : (!cir.vector<1 x !cir.double>) -> !cir.vector<1 x !cir.double> + +// LLVM-SAME: <1 x double> noundef [[A:%.*]]) +// LLVM: [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i64 +// LLVM: [[INS:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i64 0 +// LLVM: [[TMP1:%.*]] = bitcast <1 x i64> [[INS]] to <8 x i8> +// LLVM: [[VRND32Z_F64_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double> +// LLVM: [[VRND32Z_F641_I:%.*]] = call <1 x double> @llvm.aarch64.neon.frint32z.v1f64(<1 x double> [[VRND32Z_F64_I]]) + return vrnd32z_f64(a); +} + +// LLVM-LABEL: @test_vrnd32zq_f64( +// CIR-LABEL: @vrnd32zq_f64( +float64x2_t test_vrnd32zq_f64(float64x2_t a) { +// CIR: [[LOAD:%.*]] = cir.load {{.*}} : !cir.ptr<!cir.vector<16 x !s8i>>, !cir.vector<16 x !s8i> +// CIR: [[CAST:%.*]] = cir.cast bitcast [[LOAD]] : !cir.vector<16 x !s8i> -> !cir.vector<2 x !cir.double> +// CIR: cir.call_llvm_intrinsic "aarch64.neon.frint32z" [[CAST]] : (!cir.vector<2 x !cir.double>) -> !cir.vector<2 x !cir.double> + +// LLVM-SAME: <2 x double> noundef [[A:%.*]]) +// LLVM: [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64> +// LLVM: [[TMP1:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8> +// LLVM: [[VRND32ZQ_F64_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double> +// LLVM: [[VRND32ZQ1_F64_I:%.*]] = call <2 x double> @llvm.aarch64.neon.frint32z.v2f64(<2 x double> [[VRND32ZQ_F64_I]]) + return vrnd32zq_f64(a); +} + +// LLVM-LABEL: @test_vrnd64x_f64( +// CIR-LABEL: @vrnd64x_f64( +float64x1_t test_vrnd64x_f64(float64x1_t a) { +// CIR: [[LOAD:%.*]] = cir.load {{.*}} : !cir.ptr<!cir.vector<8 x !s8i>>, !cir.vector<8 x !s8i> +// CIR: [[CAST:%.*]] = cir.cast bitcast [[LOAD]] : !cir.vector<8 x !s8i> -> !cir.vector<1 x !cir.double> +// CIR: cir.call_llvm_intrinsic "aarch64.neon.frint64x" [[CAST]] : (!cir.vector<1 x !cir.double>) -> !cir.vector<1 x !cir.double> + +// LLVM-SAME: <1 x double> noundef [[A:%.*]]) +// LLVM: [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i64 +// LLVM: [[INS:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i64 0 +// LLVM: [[TMP1:%.*]] = bitcast <1 x i64> [[INS]] to <8 x i8> +// LLVM: [[VRND64X_F64_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double> +// LLVM: [[VRND64X_F641_I:%.*]] = call <1 x double> @llvm.aarch64.neon.frint64x.v1f64(<1 x double> [[VRND64X_F64_I]]) + return vrnd64x_f64(a); +} + +// LLVM-LABEL: @test_vrnd64xq_f64( +// CIR-LABEL: @vrnd64xq_f64( +float64x2_t test_vrnd64xq_f64(float64x2_t a) { +// CIR: [[LOAD:%.*]] = cir.load {{.*}} : !cir.ptr<!cir.vector<16 x !s8i>>, !cir.vector<16 x !s8i> +// CIR: [[CAST:%.*]] = cir.cast bitcast [[LOAD]] : !cir.vector<16 x !s8i> -> !cir.vector<2 x !cir.double> +// CIR: cir.call_llvm_intrinsic "aarch64.neon.frint64x" [[CAST]] : (!cir.vector<2 x !cir.double>) -> !cir.vector<2 x !cir.double> + +// LLVM-SAME: <2 x double> noundef [[A:%.*]]) +// LLVM: [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64> +// LLVM: [[TMP1:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8> +// LLVM: [[VRND64XQ_F64_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double> +// LLVM: [[VRND64XQ1_F64_I:%.*]] = call <2 x double> @llvm.aarch64.neon.frint64x.v2f64(<2 x double> [[VRND64XQ_F64_I]]) + return vrnd64xq_f64(a); +} + +// LLVM-LABEL: @test_vrnd64z_f64( +// CIR-LABEL: @vrnd64z_f64( +float64x1_t test_vrnd64z_f64(float64x1_t a) { +// CIR: [[LOAD:%.*]] = cir.load {{.*}} : !cir.ptr<!cir.vector<8 x !s8i>>, !cir.vector<8 x !s8i> +// CIR: [[CAST:%.*]] = cir.cast bitcast [[LOAD]] : !cir.vector<8 x !s8i> -> !cir.vector<1 x !cir.double> +// CIR: cir.call_llvm_intrinsic "aarch64.neon.frint64z" [[CAST]] : (!cir.vector<1 x !cir.double>) -> !cir.vector<1 x !cir.double> + +// LLVM-SAME: <1 x double> noundef [[A:%.*]]) +// LLVM: [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i64 +// LLVM: [[INS:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i64 0 +// LLVM: [[TMP1:%.*]] = bitcast <1 x i64> [[INS]] to <8 x i8> +// LLVM: [[VRND64Z_F64_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double> +// LLVM: [[VRND64Z_F641_I:%.*]] = call <1 x double> @llvm.aarch64.neon.frint64z.v1f64(<1 x double> [[VRND64Z_F64_I]]) + return vrnd64z_f64(a); +} + +// LLVM-LABEL: @test_vrnd64zq_f64( +// CIR-LABEL: @vrnd64zq_f64( +float64x2_t test_vrnd64zq_f64(float64x2_t a) { +// CIR: [[LOAD:%.*]] = cir.load {{.*}} : !cir.ptr<!cir.vector<16 x !s8i>>, !cir.vector<16 x !s8i> +// CIR: [[CAST:%.*]] = cir.cast bitcast [[LOAD]] : !cir.vector<16 x !s8i> -> !cir.vector<2 x !cir.double> +// CIR: cir.call_llvm_intrinsic "aarch64.neon.frint64z" [[CAST]] : (!cir.vector<2 x !cir.double>) -> !cir.vector<2 x !cir.double> + +// LLVM-SAME: <2 x double> noundef [[A:%.*]]) +// LLVM: [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64> +// LLVM: [[TMP1:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8> +// LLVM: [[VRND64ZQ_F64_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double> +// LLVM: [[VRND64ZQ1_F64_I:%.*]] = call <2 x double> @llvm.aarch64.neon.frint64z.v2f64(<2 x double> [[VRND64ZQ_F64_I]]) + return vrnd64zq_f64(a); +} diff --git a/clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c b/clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c deleted file mode 100644 index d10e8b8344346..0000000000000 --- a/clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c +++ /dev/null @@ -1,145 +0,0 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5 -// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon -target-feature +v8.5a\ -// RUN: -flax-vector-conversions=none -disable-O0-optnone -emit-llvm -o - %s \ -// RUN: | opt -S -passes=mem2reg,sroa \ -// RUN: | FileCheck %s - -// REQUIRES: aarch64-registered-target - -#include <arm_neon.h> - -// CHECK-LABEL: define dso_local <1 x double> @test_vrnd32x_f64( -// CHECK-SAME: <1 x double> noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] { -// CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i64 -// CHECK-NEXT: [[__P0_ADDR_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i64 0 -// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x i64> [[__P0_ADDR_I_SROA_0_0_VEC_INSERT]] to <8 x i8> -// CHECK-NEXT: [[VRND32X_F64_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double> -// CHECK-NEXT: [[VRND32X_F641_I:%.*]] = call <1 x double> @llvm.aarch64.neon.frint32x.v1f64(<1 x double> [[VRND32X_F64_I]]) -// CHECK-NEXT: [[VRND32X_F642_I:%.*]] = bitcast <1 x double> [[VRND32X_F641_I]] to <8 x i8> -// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[VRND32X_F642_I]] to i64 -// CHECK-NEXT: [[REF_TMP_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = bitcast <1 x i64> [[REF_TMP_I_SROA_0_0_VEC_INSERT]] to <1 x double> -// CHECK-NEXT: ret <1 x double> [[TMP3]] -// -float64x1_t test_vrnd32x_f64(float64x1_t a) { - return vrnd32x_f64(a); -} - -// CHECK-LABEL: define dso_local <2 x double> @test_vrnd32xq_f64( -// CHECK-SAME: <2 x double> noundef [[A:%.*]]) #[[ATTR0]] { -// CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64> -// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8> -// CHECK-NEXT: [[VRND32XQ_F64_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double> -// CHECK-NEXT: [[VRND32XQ_F641_I:%.*]] = call <2 x double> @llvm.aarch64.neon.frint32x.v2f64(<2 x double> [[VRND32XQ_F64_I]]) -// CHECK-NEXT: [[VRND32XQ_F642_I:%.*]] = bitcast <2 x double> [[VRND32XQ_F641_I]] to <16 x i8> -// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[VRND32XQ_F642_I]] to <2 x i64> -// CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i64> [[TMP2]] to <2 x double> -// CHECK-NEXT: ret <2 x double> [[TMP3]] -// -float64x2_t test_vrnd32xq_f64(float64x2_t a) { - return vrnd32xq_f64(a); -} - -// CHECK-LABEL: define dso_local <1 x double> @test_vrnd32z_f64( -// CHECK-SAME: <1 x double> noundef [[A:%.*]]) #[[ATTR0]] { -// CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i64 -// CHECK-NEXT: [[__P0_ADDR_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i64 0 -// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x i64> [[__P0_ADDR_I_SROA_0_0_VEC_INSERT]] to <8 x i8> -// CHECK-NEXT: [[VRND32Z_F64_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double> -// CHECK-NEXT: [[VRND32Z_F641_I:%.*]] = call <1 x double> @llvm.aarch64.neon.frint32z.v1f64(<1 x double> [[VRND32Z_F64_I]]) -// CHECK-NEXT: [[VRND32Z_F642_I:%.*]] = bitcast <1 x double> [[VRND32Z_F641_I]] to <8 x i8> -// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[VRND32Z_F642_I]] to i64 -// CHECK-NEXT: [[REF_TMP_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = bitcast <1 x i64> [[REF_TMP_I_SROA_0_0_VEC_INSERT]] to <1 x double> -// CHECK-NEXT: ret <1 x double> [[TMP3]] -// -float64x1_t test_vrnd32z_f64(float64x1_t a) { - return vrnd32z_f64(a); -} - -// CHECK-LABEL: define dso_local <2 x double> @test_vrnd32zq_f64( -// CHECK-SAME: <2 x double> noundef [[A:%.*]]) #[[ATTR0]] { -// CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64> -// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8> -// CHECK-NEXT: [[VRND32ZQ_F64_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double> -// CHECK-NEXT: [[VRND32ZQ_F641_I:%.*]] = call <2 x double> @llvm.aarch64.neon.frint32z.v2f64(<2 x double> [[VRND32ZQ_F64_I]]) -// CHECK-NEXT: [[VRND32ZQ_F642_I:%.*]] = bitcast <2 x double> [[VRND32ZQ_F641_I]] to <16 x i8> -// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[VRND32ZQ_F642_I]] to <2 x i64> -// CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i64> [[TMP2]] to <2 x double> -// CHECK-NEXT: ret <2 x double> [[TMP3]] -// -float64x2_t test_vrnd32zq_f64(float64x2_t a) { - return vrnd32zq_f64(a); -} - -// CHECK-LABEL: define dso_local <1 x double> @test_vrnd64x_f64( -// CHECK-SAME: <1 x double> noundef [[A:%.*]]) #[[ATTR0]] { -// CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i64 -// CHECK-NEXT: [[__P0_ADDR_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i64 0 -// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x i64> [[__P0_ADDR_I_SROA_0_0_VEC_INSERT]] to <8 x i8> -// CHECK-NEXT: [[VRND64X_F64_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double> -// CHECK-NEXT: [[VRND64X_F641_I:%.*]] = call <1 x double> @llvm.aarch64.neon.frint64x.v1f64(<1 x double> [[VRND64X_F64_I]]) -// CHECK-NEXT: [[VRND64X_F642_I:%.*]] = bitcast <1 x double> [[VRND64X_F641_I]] to <8 x i8> -// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[VRND64X_F642_I]] to i64 -// CHECK-NEXT: [[REF_TMP_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = bitcast <1 x i64> [[REF_TMP_I_SROA_0_0_VEC_INSERT]] to <1 x double> -// CHECK-NEXT: ret <1 x double> [[TMP3]] -// -float64x1_t test_vrnd64x_f64(float64x1_t a) { - return vrnd64x_f64(a); -} - -// CHECK-LABEL: define dso_local <2 x double> @test_vrnd64xq_f64( -// CHECK-SAME: <2 x double> noundef [[A:%.*]]) #[[ATTR0]] { -// CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64> -// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8> -// CHECK-NEXT: [[VRND64XQ_F64_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double> -// CHECK-NEXT: [[VRND64XQ_F641_I:%.*]] = call <2 x double> @llvm.aarch64.neon.frint64x.v2f64(<2 x double> [[VRND64XQ_F64_I]]) -// CHECK-NEXT: [[VRND64XQ_F642_I:%.*]] = bitcast <2 x double> [[VRND64XQ_F641_I]] to <16 x i8> -// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[VRND64XQ_F642_I]] to <2 x i64> -// CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i64> [[TMP2]] to <2 x double> -// CHECK-NEXT: ret <2 x double> [[TMP3]] -// -float64x2_t test_vrnd64xq_f64(float64x2_t a) { - return vrnd64xq_f64(a); -} - -// CHECK-LABEL: define dso_local <1 x double> @test_vrnd64z_f64( -// CHECK-SAME: <1 x double> noundef [[A:%.*]]) #[[ATTR0]] { -// CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x double> [[A]] to i64 -// CHECK-NEXT: [[__P0_ADDR_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP0]], i64 0 -// CHECK-NEXT: [[TMP1:%.*]] = bitcast <1 x i64> [[__P0_ADDR_I_SROA_0_0_VEC_INSERT]] to <8 x i8> -// CHECK-NEXT: [[VRND64Z_F64_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double> -// CHECK-NEXT: [[VRND64Z_F641_I:%.*]] = call <1 x double> @llvm.aarch64.neon.frint64z.v1f64(<1 x double> [[VRND64Z_F64_I]]) -// CHECK-NEXT: [[VRND64Z_F642_I:%.*]] = bitcast <1 x double> [[VRND64Z_F641_I]] to <8 x i8> -// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[VRND64Z_F642_I]] to i64 -// CHECK-NEXT: [[REF_TMP_I_SROA_0_0_VEC_INSERT:%.*]] = insertelement <1 x i64> undef, i64 [[TMP2]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = bitcast <1 x i64> [[REF_TMP_I_SROA_0_0_VEC_INSERT]] to <1 x double> -// CHECK-NEXT: ret <1 x double> [[TMP3]] -// -float64x1_t test_vrnd64z_f64(float64x1_t a) { - return vrnd64z_f64(a); -} - -// CHECK-LABEL: define dso_local <2 x double> @test_vrnd64zq_f64( -// CHECK-SAME: <2 x double> noundef [[A:%.*]]) #[[ATTR0]] { -// CHECK-NEXT: [[ENTRY:.*:]] -// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x double> [[A]] to <2 x i64> -// CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[TMP0]] to <16 x i8> -// CHECK-NEXT: [[VRND64ZQ_F64_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double> -// CHECK-NEXT: [[VRND64ZQ_F641_I:%.*]] = call <2 x double> @llvm.aarch64.neon.frint64z.v2f64(<2 x double> [[VRND64ZQ_F64_I]]) -// CHECK-NEXT: [[VRND64ZQ_F642_I:%.*]] = bitcast <2 x double> [[VRND64ZQ_F641_I]] to <16 x i8> -// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[VRND64ZQ_F642_I]] to <2 x i64> -// CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i64> [[TMP2]] to <2 x double> -// CHECK-NEXT: ret <2 x double> [[TMP3]] -// -float64x2_t test_vrnd64zq_f64(float64x2_t a) { - return vrnd64zq_f64(a); -} _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
