================ @@ -0,0 +1,67 @@ +//===-- IntelGPUTargetParser.h - Parser for Intel GPU targets ---*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file provides access to the Intel GPU list in IntelGPUTargetParser.def. +// Only what is needed to name the device a driver reports is declared here; the +// table itself carries more, and a consumer that needs the rest either declares +// it here as well or expands the table directly. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_TARGETPARSER_INTELGPUTARGETPARSER_H +#define LLVM_TARGETPARSER_INTELGPUTARGETPARSER_H + +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/Compiler.h" +#include <cstdint> +#include <string> + +namespace llvm { +namespace IntelGPU { + +/// The Intel GPU architecture names this build knows, covering both physical +/// devices and the compatibility names that stand for a whole product line. +enum GPUKind : uint16_t { + GK_NONE = 0, +#define INTEL_GPU(NAME, KIND, ARCHITECTURE, RELEASE, IGCA_LEVEL, IGCA_SUFFIX) \ + GK_##KIND, +#define INTEL_GPU_COMPAT(NAME, KIND, IGCA_LEVEL, IGCA_SUFFIX) GK_##KIND, +#include "llvm/TargetParser/IntelGPUTargetParser.def" +}; + +/// The components that a GPU IP version, the "GMDID", packs into one 32-bit +/// value. The revision identifies the hardware stepping. +struct GMDID { + unsigned Architecture = 0; + unsigned Release = 0; + unsigned Revision = 0; +}; ---------------- KornevNikita wrote:
@srividya-sundaram is it needed for FE or we can drop this layer? https://github.com/llvm/llvm-project/pull/222072 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
