llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-llvm-transforms Author: Luke Kiernan (luke-kiernan) <details> <summary>Changes</summary> The Darwin_libsystem_m veclib table mapped 17 of the 38 stems exported by libsystem_m.dylib. This adds 16 more, in both VecFuncs.def and the DARWIN_LIBSYSTEM_M_VECFUNCS defset, bringing it to 33. The remaining 5 are round, fma, fmod, sincos and sincospi; see #<!-- -->223283 for why each is skipped or deferred. Fixes #<!-- -->223283 --- Patch is 73.84 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/224792.diff 5 Files Affected: - (modified) clang/test/CodeGen/veclib-darwin-libsystem-m.c (+13) - (modified) llvm/include/llvm/Analysis/VecFuncs.def (+43) - (modified) llvm/include/llvm/IR/RuntimeLibcalls.td (+34) - (modified) llvm/test/CodeGen/Generic/replace-intrinsics-with-veclib-darwin-libsystem-m.ll (+96) - (modified) llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll (+893-221) ``````````diff diff --git a/clang/test/CodeGen/veclib-darwin-libsystem-m.c b/clang/test/CodeGen/veclib-darwin-libsystem-m.c index 23915147ded14..c6aa78fd88f7b 100644 --- a/clang/test/CodeGen/veclib-darwin-libsystem-m.c +++ b/clang/test/CodeGen/veclib-darwin-libsystem-m.c @@ -14,3 +14,16 @@ void apply_sin(float *A, float *B, float *C, unsigned N) { for (unsigned i = 0; i < N; i++) C[i] = sinf(A[i]) + sinf(B[i]); } + +// __exp10f is a Darwin-only spelling with no plain-named counterpart in +// math.h, so check that the mapping keyed on it is reachable from C. + +extern float __exp10f(float); + +// CHECK-LABEL: define{{.*}}@apply_exp10 +// CHECK: call <4 x float> @_simd_exp10_f4( +// +void apply_exp10(float *A, float *B, float *C, unsigned N) { + for (unsigned i = 0; i < N; i++) + C[i] = __exp10f(A[i]) + __exp10f(B[i]); +} diff --git a/llvm/include/llvm/Analysis/VecFuncs.def b/llvm/include/llvm/Analysis/VecFuncs.def index 58fe1248dae3b..4a62c76477262 100644 --- a/llvm/include/llvm/Analysis/VecFuncs.def +++ b/llvm/include/llvm/Analysis/VecFuncs.def @@ -79,6 +79,29 @@ TLI_DEFINE_VECFUNC("exp", "_simd_exp_d2", FIXED(2), "_ZGV_LLVM_N2v") TLI_DEFINE_VECFUNC("llvm.exp.f64", "_simd_exp_d2", FIXED(2), "_ZGV_LLVM_N2v") TLI_DEFINE_VECFUNC("expf", "_simd_exp_f4", FIXED(4), "_ZGV_LLVM_N4v") TLI_DEFINE_VECFUNC("llvm.exp.f32", "_simd_exp_f4", FIXED(4), "_ZGV_LLVM_N4v") +// clang doesn't emit an intrinsic for exp10. +TLI_DEFINE_VECFUNC("__exp10", "_simd_exp10_d2", FIXED(2), "_ZGV_LLVM_N2v") +TLI_DEFINE_VECFUNC("__exp10f", "_simd_exp10_f4", FIXED(4), "_ZGV_LLVM_N4v") +TLI_DEFINE_VECFUNC("exp2", "_simd_exp2_d2", FIXED(2), "_ZGV_LLVM_N2v") +TLI_DEFINE_VECFUNC("llvm.exp2.f64", "_simd_exp2_d2", FIXED(2), "_ZGV_LLVM_N2v") +TLI_DEFINE_VECFUNC("exp2f", "_simd_exp2_f4", FIXED(4), "_ZGV_LLVM_N4v") +TLI_DEFINE_VECFUNC("llvm.exp2.f32", "_simd_exp2_f4", FIXED(4), "_ZGV_LLVM_N4v") +TLI_DEFINE_VECFUNC("expm1", "_simd_expm1_d2", FIXED(2), "_ZGV_LLVM_N2v") +TLI_DEFINE_VECFUNC("expm1f", "_simd_expm1_f4", FIXED(4), "_ZGV_LLVM_N4v") +TLI_DEFINE_VECFUNC("log", "_simd_log_d2", FIXED(2), "_ZGV_LLVM_N2v") +TLI_DEFINE_VECFUNC("llvm.log.f64", "_simd_log_d2", FIXED(2), "_ZGV_LLVM_N2v") +TLI_DEFINE_VECFUNC("logf", "_simd_log_f4", FIXED(4), "_ZGV_LLVM_N4v") +TLI_DEFINE_VECFUNC("llvm.log.f32", "_simd_log_f4", FIXED(4), "_ZGV_LLVM_N4v") +TLI_DEFINE_VECFUNC("log10", "_simd_log10_d2", FIXED(2), "_ZGV_LLVM_N2v") +TLI_DEFINE_VECFUNC("llvm.log10.f64", "_simd_log10_d2", FIXED(2), "_ZGV_LLVM_N2v") +TLI_DEFINE_VECFUNC("log10f", "_simd_log10_f4", FIXED(4), "_ZGV_LLVM_N4v") +TLI_DEFINE_VECFUNC("llvm.log10.f32", "_simd_log10_f4", FIXED(4), "_ZGV_LLVM_N4v") +TLI_DEFINE_VECFUNC("log1p", "_simd_log1p_d2", FIXED(2), "_ZGV_LLVM_N2v") +TLI_DEFINE_VECFUNC("log1pf", "_simd_log1p_f4", FIXED(4), "_ZGV_LLVM_N4v") +TLI_DEFINE_VECFUNC("log2", "_simd_log2_d2", FIXED(2), "_ZGV_LLVM_N2v") +TLI_DEFINE_VECFUNC("llvm.log2.f64", "_simd_log2_d2", FIXED(2), "_ZGV_LLVM_N2v") +TLI_DEFINE_VECFUNC("log2f", "_simd_log2_f4", FIXED(4), "_ZGV_LLVM_N4v") +TLI_DEFINE_VECFUNC("llvm.log2.f32", "_simd_log2_f4", FIXED(4), "_ZGV_LLVM_N4v") // Trigonometric Functions TLI_DEFINE_VECFUNC("acos", "_simd_acos_d2", FIXED(2), "_ZGV_LLVM_N2v") @@ -103,26 +126,44 @@ TLI_DEFINE_VECFUNC("cos", "_simd_cos_d2", FIXED(2), "_ZGV_LLVM_N2v") TLI_DEFINE_VECFUNC("llvm.cos.f64", "_simd_cos_d2", FIXED(2), "_ZGV_LLVM_N2v") TLI_DEFINE_VECFUNC("cosf", "_simd_cos_f4", FIXED(4), "_ZGV_LLVM_N4v") TLI_DEFINE_VECFUNC("llvm.cos.f32", "_simd_cos_f4", FIXED(4), "_ZGV_LLVM_N4v") +TLI_DEFINE_VECFUNC("__cospi", "_simd_cospi_d2", FIXED(2), "_ZGV_LLVM_N2v") +TLI_DEFINE_VECFUNC("__cospif", "_simd_cospi_f4", FIXED(4), "_ZGV_LLVM_N4v") TLI_DEFINE_VECFUNC("sin", "_simd_sin_d2", FIXED(2), "_ZGV_LLVM_N2v") TLI_DEFINE_VECFUNC("llvm.sin.f64", "_simd_sin_d2", FIXED(2), "_ZGV_LLVM_N2v") TLI_DEFINE_VECFUNC("sinf", "_simd_sin_f4", FIXED(4), "_ZGV_LLVM_N4v") TLI_DEFINE_VECFUNC("llvm.sin.f32", "_simd_sin_f4", FIXED(4), "_ZGV_LLVM_N4v") +TLI_DEFINE_VECFUNC("__sinpi", "_simd_sinpi_d2", FIXED(2), "_ZGV_LLVM_N2v") +TLI_DEFINE_VECFUNC("__sinpif", "_simd_sinpi_f4", FIXED(4), "_ZGV_LLVM_N4v") TLI_DEFINE_VECFUNC("tan", "_simd_tan_d2", FIXED(2), "_ZGV_LLVM_N2v") TLI_DEFINE_VECFUNC("llvm.tan.f64", "_simd_tan_d2", FIXED(2), "_ZGV_LLVM_N2v") TLI_DEFINE_VECFUNC("tanf", "_simd_tan_f4", FIXED(4), "_ZGV_LLVM_N4v") TLI_DEFINE_VECFUNC("llvm.tan.f32", "_simd_tan_f4", FIXED(4), "_ZGV_LLVM_N4v") +TLI_DEFINE_VECFUNC("__tanpi", "_simd_tanpi_d2", FIXED(2), "_ZGV_LLVM_N2v") +TLI_DEFINE_VECFUNC("__tanpif", "_simd_tanpi_f4", FIXED(4), "_ZGV_LLVM_N4v") // Floating-Point Arithmetic and Auxiliary Functions TLI_DEFINE_VECFUNC("cbrt", "_simd_cbrt_d2", FIXED(2), "_ZGV_LLVM_N2v") TLI_DEFINE_VECFUNC("cbrtf", "_simd_cbrt_f4", FIXED(4), "_ZGV_LLVM_N4v") TLI_DEFINE_VECFUNC("erf", "_simd_erf_d2", FIXED(2), "_ZGV_LLVM_N2v") TLI_DEFINE_VECFUNC("erff", "_simd_erf_f4", FIXED(4), "_ZGV_LLVM_N4v") +TLI_DEFINE_VECFUNC("erfc", "_simd_erfc_d2", FIXED(2), "_ZGV_LLVM_N2v") +TLI_DEFINE_VECFUNC("erfcf", "_simd_erfc_f4", FIXED(4), "_ZGV_LLVM_N4v") +TLI_DEFINE_VECFUNC("hypot", "_simd_hypot_d2", FIXED(2), "_ZGV_LLVM_N2vv") +TLI_DEFINE_VECFUNC("hypotf", "_simd_hypot_f4", FIXED(4), "_ZGV_LLVM_N4vv") +TLI_DEFINE_VECFUNC("lgamma", "_simd_lgamma_d2", FIXED(2), "_ZGV_LLVM_N2v") +TLI_DEFINE_VECFUNC("lgammaf", "_simd_lgamma_f4", FIXED(4), "_ZGV_LLVM_N4v") +TLI_DEFINE_VECFUNC("nextafter", "_simd_nextafter_d2", FIXED(2), "_ZGV_LLVM_N2vv") +TLI_DEFINE_VECFUNC("nextafterf", "_simd_nextafter_f4", FIXED(4), "_ZGV_LLVM_N4vv") TLI_DEFINE_VECFUNC("pow", "_simd_pow_d2", FIXED(2), "_ZGV_LLVM_N2vv") TLI_DEFINE_VECFUNC("llvm.pow.f64", "_simd_pow_d2", FIXED(2), "_ZGV_LLVM_N2vv") TLI_DEFINE_VECFUNC("powf", "_simd_pow_f4", FIXED(4), "_ZGV_LLVM_N4vv") TLI_DEFINE_VECFUNC("llvm.pow.f32", "_simd_pow_f4", FIXED(4), "_ZGV_LLVM_N4vv") +TLI_DEFINE_VECFUNC("remainder", "_simd_remainder_d2", FIXED(2), "_ZGV_LLVM_N2vv") +TLI_DEFINE_VECFUNC("remainderf", "_simd_remainder_f4", FIXED(4), "_ZGV_LLVM_N4vv") +TLI_DEFINE_VECFUNC("tgamma", "_simd_tgamma_d2", FIXED(2), "_ZGV_LLVM_N2v") +TLI_DEFINE_VECFUNC("tgammaf", "_simd_tgamma_f4", FIXED(4), "_ZGV_LLVM_N4v") // Hyperbolic Functions TLI_DEFINE_VECFUNC("sinh", "_simd_sinh_d2", FIXED(2), "_ZGV_LLVM_N2v") @@ -144,6 +185,8 @@ TLI_DEFINE_VECFUNC("acoshf", "_simd_acosh_f4", FIXED(4), "_ZGV_LLVM_N4v") TLI_DEFINE_VECFUNC("atanh", "_simd_atanh_d2", FIXED(2), "_ZGV_LLVM_N2v") TLI_DEFINE_VECFUNC("atanhf", "_simd_atanh_f4", FIXED(4), "_ZGV_LLVM_N4v") + +// end of darwin #elif defined(TLI_DEFINE_LIBMVEC_X86_VECFUNCS) // GLIBC Vector math Functions diff --git a/llvm/include/llvm/IR/RuntimeLibcalls.td b/llvm/include/llvm/IR/RuntimeLibcalls.td index 46b9aba86ddd6..e44fc62820e36 100644 --- a/llvm/include/llvm/IR/RuntimeLibcalls.td +++ b/llvm/include/llvm/IR/RuntimeLibcalls.td @@ -432,6 +432,7 @@ foreach S = !listconcat(F32VectorSuffixes, F64VectorSuffixes) in { def MODF_#S : RuntimeLibcall; def NEXTAFTER_#S : RuntimeLibcall; def POW_#S : RuntimeLibcall; + def REMAINDER_#S : RuntimeLibcall; def SINCOS_#S : RuntimeLibcall; def SINCOSPI_#S : RuntimeLibcall; def SIN_#S : RuntimeLibcall; @@ -440,6 +441,7 @@ foreach S = !listconcat(F32VectorSuffixes, F64VectorSuffixes) in { def SQRT_#S : RuntimeLibcall; def TAN_#S : RuntimeLibcall; def TANH_#S : RuntimeLibcall; + def TANPI_#S : RuntimeLibcall; def TGAMMA_#S : RuntimeLibcall; def CDFNORM_#S : RuntimeLibcall; def CDFNORMINV_#S : RuntimeLibcall; @@ -3725,20 +3727,52 @@ defset list<RuntimeLibcallImpl> DARWIN_LIBSYSTEM_M_VECFUNCS = { def _simd_cos_f4 : RuntimeLibcallImpl<COS_V4F32>; def _simd_cosh_d2 : RuntimeLibcallImpl<COSH_V2F64>; def _simd_cosh_f4 : RuntimeLibcallImpl<COSH_V4F32>; + def _simd_cospi_d2 : RuntimeLibcallImpl<COSPI_V2F64>; + def _simd_cospi_f4 : RuntimeLibcallImpl<COSPI_V4F32>; def _simd_erf_d2 : RuntimeLibcallImpl<ERF_V2F64>; def _simd_erf_f4 : RuntimeLibcallImpl<ERF_V4F32>; + def _simd_erfc_d2 : RuntimeLibcallImpl<ERFC_V2F64>; + def _simd_erfc_f4 : RuntimeLibcallImpl<ERFC_V4F32>; + def _simd_exp10_d2 : RuntimeLibcallImpl<EXP10_V2F64>; + def _simd_exp10_f4 : RuntimeLibcallImpl<EXP10_V4F32>; + def _simd_exp2_d2 : RuntimeLibcallImpl<EXP2_V2F64>; + def _simd_exp2_f4 : RuntimeLibcallImpl<EXP2_V4F32>; def _simd_exp_d2 : RuntimeLibcallImpl<EXP_V2F64>; def _simd_exp_f4 : RuntimeLibcallImpl<EXP_V4F32>; + def _simd_expm1_d2 : RuntimeLibcallImpl<EXPM1_V2F64>; + def _simd_expm1_f4 : RuntimeLibcallImpl<EXPM1_V4F32>; + def _simd_hypot_d2 : RuntimeLibcallImpl<HYPOT_V2F64>; + def _simd_hypot_f4 : RuntimeLibcallImpl<HYPOT_V4F32>; + def _simd_lgamma_d2 : RuntimeLibcallImpl<LGAMMA_V2F64>; + def _simd_lgamma_f4 : RuntimeLibcallImpl<LGAMMA_V4F32>; + def _simd_log10_d2 : RuntimeLibcallImpl<LOG10_V2F64>; + def _simd_log10_f4 : RuntimeLibcallImpl<LOG10_V4F32>; + def _simd_log1p_d2 : RuntimeLibcallImpl<LOG1P_V2F64>; + def _simd_log1p_f4 : RuntimeLibcallImpl<LOG1P_V4F32>; + def _simd_log2_d2 : RuntimeLibcallImpl<LOG2_V2F64>; + def _simd_log2_f4 : RuntimeLibcallImpl<LOG2_V4F32>; + def _simd_log_d2 : RuntimeLibcallImpl<LOG_V2F64>; + def _simd_log_f4 : RuntimeLibcallImpl<LOG_V4F32>; + def _simd_nextafter_d2 : RuntimeLibcallImpl<NEXTAFTER_V2F64>; + def _simd_nextafter_f4 : RuntimeLibcallImpl<NEXTAFTER_V4F32>; def _simd_pow_d2 : RuntimeLibcallImpl<POW_V2F64>; def _simd_pow_f4 : RuntimeLibcallImpl<POW_V4F32>; + def _simd_remainder_d2 : RuntimeLibcallImpl<REMAINDER_V2F64>; + def _simd_remainder_f4 : RuntimeLibcallImpl<REMAINDER_V4F32>; def _simd_sin_d2 : RuntimeLibcallImpl<SIN_V2F64>; def _simd_sin_f4 : RuntimeLibcallImpl<SIN_V4F32>; def _simd_sinh_d2 : RuntimeLibcallImpl<SINH_V2F64>; def _simd_sinh_f4 : RuntimeLibcallImpl<SINH_V4F32>; + def _simd_sinpi_d2 : RuntimeLibcallImpl<SINPI_V2F64>; + def _simd_sinpi_f4 : RuntimeLibcallImpl<SINPI_V4F32>; def _simd_tan_d2 : RuntimeLibcallImpl<TAN_V2F64>; def _simd_tan_f4 : RuntimeLibcallImpl<TAN_V4F32>; def _simd_tanh_d2 : RuntimeLibcallImpl<TANH_V2F64>; def _simd_tanh_f4 : RuntimeLibcallImpl<TANH_V4F32>; + def _simd_tanpi_d2 : RuntimeLibcallImpl<TANPI_V2F64>; + def _simd_tanpi_f4 : RuntimeLibcallImpl<TANPI_V4F32>; + def _simd_tgamma_d2 : RuntimeLibcallImpl<TGAMMA_V2F64>; + def _simd_tgamma_f4 : RuntimeLibcallImpl<TGAMMA_V4F32>; } //===----------------------------------------------------------------------===// diff --git a/llvm/test/CodeGen/Generic/replace-intrinsics-with-veclib-darwin-libsystem-m.ll b/llvm/test/CodeGen/Generic/replace-intrinsics-with-veclib-darwin-libsystem-m.ll index 7602e1900e436..d1a6dba8b465f 100644 --- a/llvm/test/CodeGen/Generic/replace-intrinsics-with-veclib-darwin-libsystem-m.ll +++ b/llvm/test/CodeGen/Generic/replace-intrinsics-with-veclib-darwin-libsystem-m.ll @@ -62,3 +62,99 @@ define <3 x double> @exp_v3(<3 x double> %in) { } declare <3 x double> @llvm.exp.v3f64(<3 x double>) #0 + +define <4 x float> @exp2_v4f32(<4 x float> %in) { +; CHECK-LABEL: define {{[^@]+}}@exp2_v4f32 +; CHECK-SAME: (<4 x float> [[IN:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call <4 x float> @_simd_exp2_f4(<4 x float> [[IN]]) +; CHECK-NEXT: ret <4 x float> [[TMP1]] +; + %call = call <4 x float> @llvm.exp2.v4f32(<4 x float> %in) + ret <4 x float> %call +} + +declare <4 x float> @llvm.exp2.v4f32(<4 x float>) #0 + +define <2 x double> @exp2_v2f64(<2 x double> %in) { +; CHECK-LABEL: define {{[^@]+}}@exp2_v2f64 +; CHECK-SAME: (<2 x double> [[IN:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x double> @_simd_exp2_d2(<2 x double> [[IN]]) +; CHECK-NEXT: ret <2 x double> [[TMP1]] +; + %call = call <2 x double> @llvm.exp2.v2f64(<2 x double> %in) + ret <2 x double> %call +} + +declare <2 x double> @llvm.exp2.v2f64(<2 x double>) #0 + +define <4 x float> @log_v4f32(<4 x float> %in) { +; CHECK-LABEL: define {{[^@]+}}@log_v4f32 +; CHECK-SAME: (<4 x float> [[IN:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call <4 x float> @_simd_log_f4(<4 x float> [[IN]]) +; CHECK-NEXT: ret <4 x float> [[TMP1]] +; + %call = call <4 x float> @llvm.log.v4f32(<4 x float> %in) + ret <4 x float> %call +} + +declare <4 x float> @llvm.log.v4f32(<4 x float>) #0 + +define <2 x double> @log_v2f64(<2 x double> %in) { +; CHECK-LABEL: define {{[^@]+}}@log_v2f64 +; CHECK-SAME: (<2 x double> [[IN:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x double> @_simd_log_d2(<2 x double> [[IN]]) +; CHECK-NEXT: ret <2 x double> [[TMP1]] +; + %call = call <2 x double> @llvm.log.v2f64(<2 x double> %in) + ret <2 x double> %call +} + +declare <2 x double> @llvm.log.v2f64(<2 x double>) #0 + +define <4 x float> @log2_v4f32(<4 x float> %in) { +; CHECK-LABEL: define {{[^@]+}}@log2_v4f32 +; CHECK-SAME: (<4 x float> [[IN:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call <4 x float> @_simd_log2_f4(<4 x float> [[IN]]) +; CHECK-NEXT: ret <4 x float> [[TMP1]] +; + %call = call <4 x float> @llvm.log2.v4f32(<4 x float> %in) + ret <4 x float> %call +} + +declare <4 x float> @llvm.log2.v4f32(<4 x float>) #0 + +define <2 x double> @log2_v2f64(<2 x double> %in) { +; CHECK-LABEL: define {{[^@]+}}@log2_v2f64 +; CHECK-SAME: (<2 x double> [[IN:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x double> @_simd_log2_d2(<2 x double> [[IN]]) +; CHECK-NEXT: ret <2 x double> [[TMP1]] +; + %call = call <2 x double> @llvm.log2.v2f64(<2 x double> %in) + ret <2 x double> %call +} + +declare <2 x double> @llvm.log2.v2f64(<2 x double>) #0 + +define <4 x float> @log10_v4f32(<4 x float> %in) { +; CHECK-LABEL: define {{[^@]+}}@log10_v4f32 +; CHECK-SAME: (<4 x float> [[IN:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call <4 x float> @_simd_log10_f4(<4 x float> [[IN]]) +; CHECK-NEXT: ret <4 x float> [[TMP1]] +; + %call = call <4 x float> @llvm.log10.v4f32(<4 x float> %in) + ret <4 x float> %call +} + +declare <4 x float> @llvm.log10.v4f32(<4 x float>) #0 + +define <2 x double> @log10_v2f64(<2 x double> %in) { +; CHECK-LABEL: define {{[^@]+}}@log10_v2f64 +; CHECK-SAME: (<2 x double> [[IN:%.*]]) { +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x double> @_simd_log10_d2(<2 x double> [[IN]]) +; CHECK-NEXT: ret <2 x double> [[TMP1]] +; + %call = call <2 x double> @llvm.log10.v2f64(<2 x double> %in) + ret <2 x double> %call +} + +declare <2 x double> @llvm.log10.v2f64(<2 x double>) #0 diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll index 792564226e2ed..fe3ecc2ef2cdf 100644 --- a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll @@ -51,6 +51,342 @@ for.end: ret void } +declare float @exp2f(float) nounwind readnone +define void @exp2f_v4f32(i64 %n, ptr noalias %y, ptr noalias %x) { +; CHECK-LABEL: @exp2f_v4f32( +; CHECK: call <4 x float> @_simd_exp2_f4( +; CHECK: ret void + +entry: + br label %for.body + +for.body: + %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] + %gep.y = getelementptr inbounds float, ptr %y, i64 %iv + %lv = load float, ptr %gep.y, align 4 + %call = tail call float @exp2f(float %lv) + %gep.x = getelementptr inbounds float, ptr %x, i64 %iv + store float %call, ptr %gep.x, align 4 + %iv.next = add i64 %iv, 1 + %exitcond = icmp eq i64 %iv.next, %n + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} + +declare double @exp2(double) nounwind readnone +define void @exp2_v2f64(i64 %n, ptr noalias %y, ptr noalias %x) { +; CHECK-LABEL: @exp2_v2f64( +; CHECK: call <2 x double> @_simd_exp2_d2( +; CHECK: ret void + +entry: + br label %for.body + +for.body: + %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] + %gep.y = getelementptr inbounds double, ptr %y, i64 %iv + %lv = load double, ptr %gep.y, align 4 + %call = tail call double @exp2(double %lv) + %gep.x = getelementptr inbounds double, ptr %x, i64 %iv + store double %call, ptr %gep.x, align 4 + %iv.next = add i64 %iv, 1 + %exitcond = icmp eq i64 %iv.next, %n + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} + +declare float @__exp10f(float) nounwind readnone +define void @__exp10f_v4f32(i64 %n, ptr noalias %y, ptr noalias %x) { +; CHECK-LABEL: @__exp10f_v4f32( +; CHECK: call <4 x float> @_simd_exp10_f4( +; CHECK: ret void + +entry: + br label %for.body + +for.body: + %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] + %gep.y = getelementptr inbounds float, ptr %y, i64 %iv + %lv = load float, ptr %gep.y, align 4 + %call = tail call float @__exp10f(float %lv) + %gep.x = getelementptr inbounds float, ptr %x, i64 %iv + store float %call, ptr %gep.x, align 4 + %iv.next = add i64 %iv, 1 + %exitcond = icmp eq i64 %iv.next, %n + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} + +declare double @__exp10(double) nounwind readnone +define void @__exp10_v2f64(i64 %n, ptr noalias %y, ptr noalias %x) { +; CHECK-LABEL: @__exp10_v2f64( +; CHECK: call <2 x double> @_simd_exp10_d2( +; CHECK: ret void + +entry: + br label %for.body + +for.body: + %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] + %gep.y = getelementptr inbounds double, ptr %y, i64 %iv + %lv = load double, ptr %gep.y, align 4 + %call = tail call double @__exp10(double %lv) + %gep.x = getelementptr inbounds double, ptr %x, i64 %iv + store double %call, ptr %gep.x, align 4 + %iv.next = add i64 %iv, 1 + %exitcond = icmp eq i64 %iv.next, %n + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} + +declare float @expm1f(float) nounwind readnone +define void @expm1f_v4f32(i64 %n, ptr noalias %y, ptr noalias %x) { +; CHECK-LABEL: @expm1f_v4f32( +; CHECK: call <4 x float> @_simd_expm1_f4( +; CHECK: ret void + +entry: + br label %for.body + +for.body: + %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] + %gep.y = getelementptr inbounds float, ptr %y, i64 %iv + %lv = load float, ptr %gep.y, align 4 + %call = tail call float @expm1f(float %lv) + %gep.x = getelementptr inbounds float, ptr %x, i64 %iv + store float %call, ptr %gep.x, align 4 + %iv.next = add i64 %iv, 1 + %exitcond = icmp eq i64 %iv.next, %n + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} + +declare double @expm1(double) nounwind readnone +define void @expm1_v2f64(i64 %n, ptr noalias %y, ptr noalias %x) { +; CHECK-LABEL: @expm1_v2f64( +; CHECK: call <2 x double> @_simd_expm1_d2( +; CHECK: ret void + +entry: + br label %for.body + +for.body: + %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] + %gep.y = getelementptr inbounds double, ptr %y, i64 %iv + %lv = load double, ptr %gep.y, align 4 + %call = tail call double @expm1(double %lv) + %gep.x = getelementptr inbounds double, ptr %x, i64 %iv + store double %call, ptr %gep.x, align 4 + %iv.next = add i64 %iv, 1 + %exitcond = icmp eq i64 %iv.next, %n + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} + +declare float @logf(float) nounwind readnone +define void @logf_v4f32(i64 %n, ptr noalias %y, ptr noalias %x) { +; CHECK-LABEL: @logf_v4f32( +; CHECK: call <4 x float> @_simd_log_f4( +; CHECK: ret void + +entry: + br label %for.body + +for.body: + %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] + %gep.y = getelementptr inbounds float, ptr %y, i64 %iv + %lv = load float, ptr %gep.y, align 4 + %call = tail call float @logf(float %lv) + %gep.x = getelementptr inbounds float, ptr %x, i64 %iv + store float %call, ptr %gep.x, align 4 + %iv.next = add i64 %iv, 1 + %exitcond = icmp eq i64 %iv.next, %n + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} + +declare double @log(double) nounwind readnone +define void @log_v2f64(i64 %n, ptr noalias %y, ptr noalias %x) { +; CHECK-LABEL: @log_v2f64( +; CHECK: call <2 x double> @_simd_log_d2( +; CHECK: ret void + +entry: + br label %for.body + +for.body: + %iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ] + %gep.y = getelementptr inbounds double, ptr %y, i64 %iv + %lv = load double, ptr %gep.y, align 4 + %call = tail call double @log(double %lv) + %gep.x = getelementptr inbounds double, ptr %x, i64 %iv + store double %call, ptr %gep.x, align 4 + %iv.next = add i64 %iv, 1 + %exitcond = icmp eq i64 %iv.next, %n + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} + +declare float @log10f(float) nounwind readnone +define void @log10f_v4f32(i64 ... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/224792 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
