================
@@ -1403,29 +1403,65 @@ PTX instruction. The supported combinations are:
- None
```
-#### '`llvm.nvvm.mul.*`' Half-precision Intrinsics
+#### '`llvm.nvvm.fmul.*`' Intrinsics
##### Syntax:
-```llvm
-declare half @llvm.nvvm.mul.rn.sat.f16(half %a, half %b)
-declare <2 x half> @llvm.nvvm.mul.rn.sat.v2f16(<2 x half> %a, <2 x half> %b)
+This is an overloaded intrinsic. The '`.ftz`' and '`.sat`' modifiers are
+optional.
-declare half @llvm.nvvm.mul.rn.ftz.sat.f16(half %a, half %b)
-declare <2 x half> @llvm.nvvm.mul.rn.ftz.sat.v2f16(<2 x half> %a, <2 x half>
%b)
+```llvm
+declare half @llvm.nvvm.fmul{.ftz}{.sat}.f16(half %a, half %b, i32
immarg %rnd)
----------------
durga4github wrote:
ok, before we list the specific types, I believe it is
https://github.com/llvm/llvm-project/pull/224546
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