================
@@ -17590,6 +17623,48 @@ void RISCVTargetLowering::ReplaceNodeResults(SDNode *N,
Results.push_back(DAG.getExtractSubvector(DL, VT, Res, 0));
return;
}
+ case Intrinsic::riscv_mulh_i32:
+ case Intrinsic::riscv_mulhr_i32:
+ case Intrinsic::riscv_mulhu_u32:
+ case Intrinsic::riscv_mulhru_u32:
+ case Intrinsic::riscv_mulhsu_i32:
+ case Intrinsic::riscv_mulhrsu_i32: {
+ // RV64 has no scalar mulh instructions; reuse the packed pmulh.w
+ // family on the low words, whose element 0 is the scalar product.
+ MVT VT = N->getSimpleValueType(0);
+ if (!Subtarget.is64Bit() || VT != MVT::i32)
+ return;
+ unsigned Opc;
+ switch (IntNo) {
----------------
topperc wrote:
This switch is duplicated. Should make a helper function?
https://github.com/llvm/llvm-project/pull/225561
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