================
@@ -3433,11 +3433,38 @@ bool SPIRVInstructionSelector::selectOpIsNan(Register
ResVReg,
bool SPIRVInstructionSelector::selectOpIsFinite(Register ResVReg,
SPIRVTypeInst ResType,
MachineInstr &I) const {
+ // OpIsFinite requires Kernel capability; emulate with OpIsInf & OpIsNan
----------------
danbrown-amd wrote:
Awaiting guidance.
https://github.com/llvm/llvm-project/pull/225947
_______________________________________________
cfe-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits