https://github.com/bob80905 updated https://github.com/llvm/llvm-project/pull/223874
>From eb927f0d6119feecb7f04d15cac5fc2ed723ab88 Mon Sep 17 00:00:00 2001 From: Joshua Batista <[email protected]> Date: Tue, 15 Sep 2026 15:00:27 -0700 Subject: [PATCH 1/4] first attempt --- llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp | 2 +- .../Target/SPIRV/SPIRVInstructionSelector.cpp | 54 ++++++++++++++++--- .../Target/SPIRV/SPIRVLegalizePointerCast.cpp | 36 +++++++++++++ .../lib/Target/SPIRV/SPIRVSymbolicOperands.td | 2 +- .../pointers/byte-address-buffer-atomicrmw.ll | 38 +++++++++++++ 5 files changed, 124 insertions(+), 8 deletions(-) create mode 100644 llvm/test/CodeGen/SPIRV/pointers/byte-address-buffer-atomicrmw.ll diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp index 021bc1806d284c..8372c1abfe5263 100644 --- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp @@ -2142,7 +2142,7 @@ SPIRVTypeInst SPIRVGlobalRegistry::getOrCreateSPIRVUntypedPointerType( [[maybe_unused]] const SPIRVSubtarget &ST = cast<SPIRVSubtarget>(MIRBuilder.getMF().getSubtarget()); assert(ST.canUseExtension(SPIRV::Extension::SPV_KHR_untyped_pointers) && - !ST.isShader() && "Untyped pointers are not available"); + "Untyped pointers are not available"); unsigned AddressSpace = storageClassToAddressSpace(SC); // Use STK_UntypedPointer handle keyed by address space only. auto Handle = SPIRV::irhandle_untyped_pointer(AddressSpace); diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp index 41e4dc290c0995..4c433513813a9c 100644 --- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp @@ -6605,12 +6605,54 @@ bool SPIRVInstructionSelector::selectResourceGetPointer(Register &ResVReg, Register ZeroReg = buildZerosVal(GR.getOrCreateSPIRVIntegerType(32, I, TII), I); - auto MIB = - BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpAccessChain)) - .addDef(ResVReg) - .addUse(GR.getSPIRVTypeID(ResType)) - .addUse(ResourcePtr) - .addUse(ZeroReg); + SPIRVTypeInst ResourceType = GR.getPointeeType(RegType); + auto getIndexedType = [&](SPIRVTypeInst Type, unsigned Index) { + if (!Type) + return SPIRVTypeInst(); + unsigned OperandIndex = 1; + if (Type->getOpcode() == SPIRV::OpTypeStruct) + OperandIndex += Index; + else if (Type->getOpcode() != SPIRV::OpTypeArray && + Type->getOpcode() != SPIRV::OpTypeRuntimeArray) + return SPIRVTypeInst(); + return GR.getSPIRVTypeForVReg(Type->getOperand(OperandIndex).getReg()); + }; + + SPIRVTypeInst ResourceElemType = getIndexedType(ResourceType, 0); + if (I.getNumExplicitOperands() > 3) { + assert(ResourceElemType && "Resource type is not indexable"); + unsigned Index = ResourceElemType->getOpcode() == SPIRV::OpTypeStruct + ? getIConstVal(I.getOperand(3).getReg(), MRI) + : 0; + ResourceElemType = getIndexedType(ResourceElemType, Index); + } + + SPIRVTypeInst ResultElemType = GR.getPointeeType(ResType); + const bool IsByteResource = + ResourceElemType && ResourceElemType->getOpcode() == SPIRV::OpTypeInt && + ResourceElemType->getOperand(1).getImm() == 8; + const bool NeedsUntypedPointer = + IsByteResource && ResourceElemType != ResultElemType; + if (NeedsUntypedPointer && + !STI.canUseExtension(SPIRV::Extension::SPV_KHR_untyped_pointers)) + return diagnoseUnsupported( + I, "typed byte-buffer access requires SPV_KHR_untyped_pointers"); + + SPIRVTypeInst ResultType = ResType; + unsigned Opcode = SPIRV::OpAccessChain; + if (NeedsUntypedPointer) { + ResultType = GR.getOrCreateSPIRVUntypedPointerType( + GR.getPointerStorageClass(ResType), MIRBuilder); + GR.assignSPIRVTypeToVReg(ResultType, ResVReg, *I.getMF()); + Opcode = SPIRV::OpUntypedAccessChainKHR; + } + + auto MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(Opcode)) + .addDef(ResVReg) + .addUse(GR.getSPIRVTypeID(ResultType)); + if (NeedsUntypedPointer) + MIB.addUse(GR.getSPIRVTypeID(ResourceType)); + MIB.addUse(ResourcePtr).addUse(ZeroReg); if (I.getNumExplicitOperands() > 3) { Register IndexReg = I.getOperand(3).getReg(); diff --git a/llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp b/llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp index 0addccdff47843..66fd78fb41224b 100644 --- a/llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp @@ -770,6 +770,37 @@ class SPIRVLegalizePointerCastImpl { DeadInstructions.push_back(IllegalStore); } + void transformAtomicRMW(IRBuilder<> &B, AtomicRMWInst *RMW, + Value *OriginalOperand) { + B.SetInsertPoint(RMW); + Type *AccessTy = RMW->getValOperand()->getType(); + Value *AtomicPtr = OriginalOperand; + + if (shouldReinterpretByteWise(B, AccessTy, OriginalOperand)) { + auto *ResourcePtr = getResourceGetPointer(OriginalOperand); + if (!ResourcePtr) + llvm_unreachable( + "Atomic byte layout pointer must come from resource.getpointer."); + AtomicPtr = B.Insert(ResourcePtr->clone()); + GR->buildAssignPtr(B, AccessTy, AtomicPtr); + } else { + auto ResultOpt = getPointerToFirstCompatibleType( + B, OriginalOperand, RMW->getPointerOperand()->getType(), AccessTy, + false); + if (!ResultOpt || ResultOpt->second != AccessTy) + llvm_unreachable("Failed to legalize atomic pointer."); + AtomicPtr = ResultOpt->first; + } + + AtomicRMWInst *NewRMW = B.CreateAtomicRMW( + RMW->getOperation(), AtomicPtr, RMW->getValOperand(), RMW->getAlign(), + RMW->getOrdering(), RMW->getSyncScopeID()); + NewRMW->setVolatile(RMW->isVolatile()); + NewRMW->copyMetadata(*RMW); + GR->replaceAllUsesWith(RMW, NewRMW, /* DeleteOld= */ true); + DeadInstructions.push_back(RMW); + } + void legalizePointerCast(IntrinsicInst *II) { Value *CastedOperand = II; Value *OriginalOperand = II->getOperand(0); @@ -791,6 +822,11 @@ class SPIRVLegalizePointerCastImpl { continue; } + if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(User)) { + transformAtomicRMW(B, RMW, OriginalOperand); + continue; + } + if (IntrinsicInst *Intrin = dyn_cast<IntrinsicInst>(User)) { if (Intrin->getIntrinsicID() == Intrinsic::spv_assign_ptr_type) { DeadInstructions.push_back(Intrin); diff --git a/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td b/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td index 561d0fdef40264..ceaad2de12d533 100644 --- a/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td +++ b/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td @@ -404,7 +404,7 @@ defm SPV_AMD_weak_linkage : ExtensionOperand<137, [EnvOpenCL]>; // Message Type, which is not yet implemented. defm SPV_KHR_abort : ExtensionOperand<138, [EnvOpenCL]>; defm SPV_KHR_poison_freeze : ExtensionOperand<139, [EnvVulkan, EnvOpenCL]>; -defm SPV_KHR_untyped_pointers : ExtensionOperand<140, [EnvOpenCL]>; +defm SPV_KHR_untyped_pointers : ExtensionOperand<140, [EnvVulkan, EnvOpenCL]>; defm SPV_EXT_long_vector : ExtensionOperand<141, [EnvOpenCL, EnvVulkan]>; //===----------------------------------------------------------------------===// diff --git a/llvm/test/CodeGen/SPIRV/pointers/byte-address-buffer-atomicrmw.ll b/llvm/test/CodeGen/SPIRV/pointers/byte-address-buffer-atomicrmw.ll new file mode 100644 index 00000000000000..83e411754ef064 --- /dev/null +++ b/llvm/test/CodeGen/SPIRV/pointers/byte-address-buffer-atomicrmw.ll @@ -0,0 +1,38 @@ +; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-vulkan-compute \ +; RUN: --spirv-ext=+SPV_KHR_untyped_pointers %s -o - | FileCheck %s +; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-vulkan-compute \ +; RUN: --spirv-ext=+SPV_KHR_untyped_pointers %s -o - -filetype=obj | \ +; RUN: spirv-val %} + +; Check that an atomic operation on a byte-address buffer uses an untyped +; resource pointer without an unsupported pointer cast. + +; CHECK: OpCapability UntypedPointersKHR +; CHECK: OpExtension "SPV_KHR_untyped_pointers" +; CHECK-DAG: %[[#UINT:]] = OpTypeInt 32 0 +; CHECK-DAG: %[[#ONE:]] = OpConstant %[[#UINT]] 1 +; CHECK: %[[#ATOMIC_PTR:]] = OpUntypedAccessChainKHR +; CHECK: OpAtomicAnd %[[#UINT]] %[[#ATOMIC_PTR]] {{%[0-9]+}} {{%[0-9]+}} +; CHECK-SAME: %[[#ONE]] + [email protected] = private unnamed_addr constant [4 x i8] c"Buf\00", align 1 + +define void @main() #0 { +entry: + %handle = tail call target("spirv.VulkanBuffer", [0 x i8], 12, 1) + @llvm.spv.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, + ptr nonnull @.str) + %ptr = tail call noundef align 4 dereferenceable(4) ptr addrspace(11) + @llvm.spv.resource.getpointer( + target("spirv.VulkanBuffer", [0 x i8], 12, 1) %handle, i32 0) + %old = atomicrmw and ptr addrspace(11) %ptr, i32 1 + syncscope("device") monotonic, align 4 + ret void +} + +attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" } + +declare target("spirv.VulkanBuffer", [0 x i8], 12, 1) + @llvm.spv.resource.handlefrombinding(i32, i32, i32, i32, ptr) +declare ptr addrspace(11) @llvm.spv.resource.getpointer( + target("spirv.VulkanBuffer", [0 x i8], 12, 1), i32) >From ae32ffe29ffdb7d5364356415862c297cd6416b8 Mon Sep 17 00:00:00 2001 From: Joshua Batista <[email protected]> Date: Tue, 15 Sep 2026 16:13:37 -0700 Subject: [PATCH 2/4] remove volatile --- llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp b/llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp index 66fd78fb41224b..8beb07c0b4dad3 100644 --- a/llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp @@ -795,7 +795,7 @@ class SPIRVLegalizePointerCastImpl { AtomicRMWInst *NewRMW = B.CreateAtomicRMW( RMW->getOperation(), AtomicPtr, RMW->getValOperand(), RMW->getAlign(), RMW->getOrdering(), RMW->getSyncScopeID()); - NewRMW->setVolatile(RMW->isVolatile()); + NewRMW->copyMetadata(*RMW); GR->replaceAllUsesWith(RMW, NewRMW, /* DeleteOld= */ true); DeadInstructions.push_back(RMW); >From 75dafb167a981c09f4e2098235bdde28f3251437 Mon Sep 17 00:00:00 2001 From: Joshua Batista <[email protected]> Date: Wed, 16 Sep 2026 13:18:11 -0700 Subject: [PATCH 3/4] iterate --- clang/lib/CodeGen/Targets/SPIR.cpp | 5 +++++ .../ByteAddressBuffers-elementtype.hlsl | 19 +++++++++++++++++++ llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp | 7 ++++--- .../Target/SPIRV/SPIRVInstructionSelector.cpp | 2 ++ 4 files changed, 30 insertions(+), 3 deletions(-) create mode 100644 clang/test/CodeGenHLSL/resources/ByteAddressBuffers-elementtype.hlsl diff --git a/clang/lib/CodeGen/Targets/SPIR.cpp b/clang/lib/CodeGen/Targets/SPIR.cpp index e8148d1566f857..881e56e746237a 100644 --- a/clang/lib/CodeGen/Targets/SPIR.cpp +++ b/clang/lib/CodeGen/Targets/SPIR.cpp @@ -796,6 +796,11 @@ llvm::Type *CommonSPIRTargetCodeGenInfo::getHLSLType( llvm::ArrayType *RuntimeArrayType = llvm::ArrayType::get(ElemType, 0); uint32_t StorageClass = /* StorageBuffer storage class */ 12; bool IsWritable = ResAttrs.ResourceClass == llvm::dxil::ResourceClass::UAV; + bool IsByteAddressBuffer = ContainedTy == CGM.getContext().Char8Ty; + if (IsByteAddressBuffer) + return llvm::TargetExtType::get( + Ctx, "spirv.VulkanBuffer", {RuntimeArrayType}, + {StorageClass, IsWritable, IsByteAddressBuffer}); return llvm::TargetExtType::get(Ctx, "spirv.VulkanBuffer", {RuntimeArrayType}, {StorageClass, IsWritable}); diff --git a/clang/test/CodeGenHLSL/resources/ByteAddressBuffers-elementtype.hlsl b/clang/test/CodeGenHLSL/resources/ByteAddressBuffers-elementtype.hlsl new file mode 100644 index 00000000000000..8321f3443946c9 --- /dev/null +++ b/clang/test/CodeGenHLSL/resources/ByteAddressBuffers-elementtype.hlsl @@ -0,0 +1,19 @@ +// RUN: %clang_cc1 -triple spirv-unknown-vulkan1.3-compute \ +// RUN: -finclude-default-header -emit-llvm -disable-llvm-passes -o - %s | \ +// RUN: FileCheck %s + +// Preserve byte-address semantics when the storage layout matches another +// buffer type. +// CHECK: %"class.hlsl::ByteAddressBuffer" = type { +// CHECK-SAME: target("spirv.VulkanBuffer", [0 x i8], 12, 0, 1) } +// CHECK: %"class.hlsl::RWByteAddressBuffer" = type { +// CHECK-SAME: target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1) } +// CHECK: %"class.hlsl::StructuredBuffer" = type { +// CHECK-SAME: target("spirv.VulkanBuffer", [0 x i32], 12, 0) } + +ByteAddressBuffer ByteBuffer; +RWByteAddressBuffer RWByteBuffer; +StructuredBuffer<uint> Structured; + +[numthreads(1, 1, 1)] +void main() {} diff --git a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp index 20cf9275af8df8..7e44a06ed0f16c 100644 --- a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp @@ -4028,9 +4028,10 @@ static SPIRVTypeInst getVulkanBufferType(const TargetExtType *ExtensionType, SPIRVGlobalRegistry *GR) { assert(ExtensionType->getNumTypeParameters() == 1 && "Vulkan buffers have exactly one type for the type of the buffer."); - assert(ExtensionType->getNumIntParameters() == 2 && - "Vulkan buffer have 2 integer parameters: storage class and is " - "writable."); + assert((ExtensionType->getNumIntParameters() == 2 || + ExtensionType->getNumIntParameters() == 3) && + "Vulkan buffers have storage class, writable, and optional byte " + "address parameters."); auto *T = ExtensionType->getTypeParameter(0); auto SC = static_cast<SPIRV::StorageClass::StorageClass>( diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp index 4c433513813a9c..0d344ac6b1a623 100644 --- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp @@ -6619,6 +6619,8 @@ bool SPIRVInstructionSelector::selectResourceGetPointer(Register &ResVReg, }; SPIRVTypeInst ResourceElemType = getIndexedType(ResourceType, 0); + // Only resource.getpointer has an index operand; resource.getbasepointer + // stops at the resource operand. if (I.getNumExplicitOperands() > 3) { assert(ResourceElemType && "Resource type is not indexable"); unsigned Index = ResourceElemType->getOpcode() == SPIRV::OpTypeStruct >From b1de059d23a06f7517b9149770eb0a6cb9daf1a7 Mon Sep 17 00:00:00 2001 From: Joshua Batista <[email protected]> Date: Tue, 6 Oct 2026 14:51:39 -0700 Subject: [PATCH 4/4] edit tests --- .../RWByteAddressBuffer-InterlockedAdd.hlsl | 16 ++++++++-------- .../RWByteAddressBuffer-InterlockedAnd.hlsl | 16 ++++++++-------- .../RWByteAddressBuffer-InterlockedMin.hlsl | 16 ++++++++-------- .../RWByteAddressBuffer-InterlockedOr.hlsl | 16 ++++++++-------- .../RWByteAddressBuffer-InterlockedXor.hlsl | 16 ++++++++-------- 5 files changed, 40 insertions(+), 40 deletions(-) diff --git a/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedAdd.hlsl b/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedAdd.hlsl index 5342c0a7c93f76..e34187a44d8d44 100644 --- a/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedAdd.hlsl +++ b/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedAdd.hlsl @@ -17,8 +17,8 @@ RWByteAddressBuffer BAB : register(u0); // DXCHECK: %[[HANDLE:.*]] = load target("dx.RawBuffer", i8, 1, 0), ptr {{.*}} // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32(target("dx.RawBuffer", i8, 1, 0) %[[HANDLE]], i32 %{{.*}}) // DXCHECK: atomicrmw add ptr %[[PTR]], i32 %{{.*}} syncscope("device") monotonic -// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1), ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1) %[[HANDLE]], i32 %{{.*}}) +// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1), ptr {{.*}} +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1) %[[HANDLE]], i32 %{{.*}}) // SPVCHECK: atomicrmw add ptr addrspace(11) %[[PTR]], i32 %{{.*}} syncscope("device") monotonic export void test_bab_int_2arg(uint off, int v) { BAB.InterlockedAdd(off, v); @@ -29,8 +29,8 @@ export void test_bab_int_2arg(uint off, int v) { // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32(target("dx.RawBuffer", i8, 1, 0) %[[HANDLE]], i32 %{{.*}}) // DXCHECK: %[[R:.*]] = atomicrmw add ptr %[[PTR]], i32 %{{.*}} syncscope("device") monotonic // DXCHECK: store i32 %[[R]], ptr {{.*}} -// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1), ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1) %[[HANDLE]], i32 %{{.*}}) +// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1), ptr {{.*}} +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1) %[[HANDLE]], i32 %{{.*}}) // SPVCHECK: %[[R:.*]] = atomicrmw add ptr addrspace(11) %[[PTR]], i32 %{{.*}} syncscope("device") monotonic // SPVCHECK: store i32 %[[R]], ptr {{.*}} export void test_bab_uint_3arg(uint off, uint v, out uint orig) { @@ -41,8 +41,8 @@ export void test_bab_uint_3arg(uint off, uint v, out uint orig) { // DXCHECK: %[[HANDLE:.*]] = load target("dx.RawBuffer", i8, 1, 0), ptr {{.*}} // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32(target("dx.RawBuffer", i8, 1, 0) %[[HANDLE]], i32 %{{.*}}) // DXCHECK: atomicrmw add ptr %[[PTR]], i64 %{{.*}} syncscope("device") monotonic -// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1), ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1) %[[HANDLE]], i32 %{{.*}}) +// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1), ptr {{.*}} +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1) %[[HANDLE]], i32 %{{.*}}) // SPVCHECK: atomicrmw add ptr addrspace(11) %[[PTR]], i64 %{{.*}} syncscope("device") monotonic export void test_bab_int64_2arg(uint off, int64_t v) { BAB.InterlockedAdd64(off, v); @@ -53,8 +53,8 @@ export void test_bab_int64_2arg(uint off, int64_t v) { // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32(target("dx.RawBuffer", i8, 1, 0) %[[HANDLE]], i32 %{{.*}}) // DXCHECK: %[[R:.*]] = atomicrmw add ptr %[[PTR]], i64 %{{.*}} syncscope("device") monotonic // DXCHECK: store i64 %[[R]], ptr {{.*}} -// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1), ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1) %[[HANDLE]], i32 %{{.*}}) +// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1), ptr {{.*}} +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1) %[[HANDLE]], i32 %{{.*}}) // SPVCHECK: %[[R:.*]] = atomicrmw add ptr addrspace(11) %[[PTR]], i64 %{{.*}} syncscope("device") monotonic // SPVCHECK: store i64 %[[R]], ptr {{.*}} export void test_bab_uint64_3arg(uint off, uint64_t v, out uint64_t orig) { diff --git a/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedAnd.hlsl b/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedAnd.hlsl index f6f19f05805230..a3a07b784092f1 100644 --- a/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedAnd.hlsl +++ b/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedAnd.hlsl @@ -17,8 +17,8 @@ RWByteAddressBuffer BAB : register(u0); // DXCHECK: %[[HANDLE:.*]] = load target("dx.RawBuffer", i8, 1, 0), ptr {{.*}} // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32(target("dx.RawBuffer", i8, 1, 0) %[[HANDLE]], i32 %{{.*}}) // DXCHECK: atomicrmw and ptr %[[PTR]], i32 %{{.*}} syncscope("device") monotonic -// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1), ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1) %[[HANDLE]], i32 %{{.*}}) +// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1), ptr {{.*}} +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1) %[[HANDLE]], i32 %{{.*}}) // SPVCHECK: atomicrmw and ptr addrspace(11) %[[PTR]], i32 %{{.*}} syncscope("device") monotonic export void test_bab_int_2arg(uint off, int v) { BAB.InterlockedAnd(off, v); @@ -29,8 +29,8 @@ export void test_bab_int_2arg(uint off, int v) { // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32(target("dx.RawBuffer", i8, 1, 0) %[[HANDLE]], i32 %{{.*}}) // DXCHECK: %[[R:.*]] = atomicrmw and ptr %[[PTR]], i32 %{{.*}} syncscope("device") monotonic // DXCHECK: store i32 %[[R]], ptr {{.*}} -// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1), ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1) %[[HANDLE]], i32 %{{.*}}) +// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1), ptr {{.*}} +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1) %[[HANDLE]], i32 %{{.*}}) // SPVCHECK: %[[R:.*]] = atomicrmw and ptr addrspace(11) %[[PTR]], i32 %{{.*}} syncscope("device") monotonic // SPVCHECK: store i32 %[[R]], ptr {{.*}} export void test_bab_uint_3arg(uint off, uint v, out uint orig) { @@ -41,8 +41,8 @@ export void test_bab_uint_3arg(uint off, uint v, out uint orig) { // DXCHECK: %[[HANDLE:.*]] = load target("dx.RawBuffer", i8, 1, 0), ptr {{.*}} // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32(target("dx.RawBuffer", i8, 1, 0) %[[HANDLE]], i32 %{{.*}}) // DXCHECK: atomicrmw and ptr %[[PTR]], i64 %{{.*}} syncscope("device") monotonic -// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1), ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1) %[[HANDLE]], i32 %{{.*}}) +// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1), ptr {{.*}} +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1) %[[HANDLE]], i32 %{{.*}}) // SPVCHECK: atomicrmw and ptr addrspace(11) %[[PTR]], i64 %{{.*}} syncscope("device") monotonic export void test_bab_int64_2arg(uint off, int64_t v) { BAB.InterlockedAnd64(off, v); @@ -53,8 +53,8 @@ export void test_bab_int64_2arg(uint off, int64_t v) { // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32(target("dx.RawBuffer", i8, 1, 0) %[[HANDLE]], i32 %{{.*}}) // DXCHECK: %[[R:.*]] = atomicrmw and ptr %[[PTR]], i64 %{{.*}} syncscope("device") monotonic // DXCHECK: store i64 %[[R]], ptr {{.*}} -// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1), ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1) %[[HANDLE]], i32 %{{.*}}) +// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1), ptr {{.*}} +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1) %[[HANDLE]], i32 %{{.*}}) // SPVCHECK: %[[R:.*]] = atomicrmw and ptr addrspace(11) %[[PTR]], i64 %{{.*}} syncscope("device") monotonic // SPVCHECK: store i64 %[[R]], ptr {{.*}} export void test_bab_uint64_3arg(uint off, uint64_t v, out uint64_t orig) { diff --git a/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedMin.hlsl b/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedMin.hlsl index f81edc44a6745c..ea7330486e3dd2 100644 --- a/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedMin.hlsl +++ b/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedMin.hlsl @@ -14,7 +14,7 @@ RWByteAddressBuffer BAB : register(u0); // CHECK-LABEL: define {{(dso_local |hidden |internal |protected |spir_func )*}}void @{{.*}}test_bab_int // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32({{.*}}) // DXCHECK: atomicrmw min ptr %[[PTR]], i32 %{{.*}} syncscope("device") monotonic -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32({{.*}}) +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32({{.*}}) // SPVCHECK: atomicrmw min ptr addrspace(11) %[[PTR]], i32 %{{.*}} syncscope("device") monotonic export void test_bab_int(uint off, int v) { BAB.InterlockedMin(off, v); @@ -23,7 +23,7 @@ export void test_bab_int(uint off, int v) { // CHECK-LABEL: define {{(dso_local |hidden |internal |protected |spir_func )*}}void @{{.*}}test_bab_uint // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32({{.*}}) // DXCHECK: atomicrmw umin ptr %[[PTR]], i32 %{{.*}} syncscope("device") monotonic -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32({{.*}}) +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32({{.*}}) // SPVCHECK: atomicrmw umin ptr addrspace(11) %[[PTR]], i32 %{{.*}} syncscope("device") monotonic export void test_bab_uint(uint off, uint v) { BAB.InterlockedMin(off, v); @@ -33,7 +33,7 @@ export void test_bab_uint(uint off, uint v) { // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32({{.*}}) // DXCHECK: %[[R:.*]] = atomicrmw min ptr %[[PTR]], i32 %{{.*}} syncscope("device") monotonic // DXCHECK: store i32 %[[R]], ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32({{.*}}) +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32({{.*}}) // SPVCHECK: %[[R:.*]] = atomicrmw min ptr addrspace(11) %[[PTR]], i32 %{{.*}} syncscope("device") monotonic // SPVCHECK: store i32 %[[R]], ptr {{.*}} export void test_bab_int_orig(uint off, int v, out int orig) { @@ -44,7 +44,7 @@ export void test_bab_int_orig(uint off, int v, out int orig) { // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32({{.*}}) // DXCHECK: %[[R:.*]] = atomicrmw umin ptr %[[PTR]], i32 %{{.*}} syncscope("device") monotonic // DXCHECK: store i32 %[[R]], ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32({{.*}}) +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32({{.*}}) // SPVCHECK: %[[R:.*]] = atomicrmw umin ptr addrspace(11) %[[PTR]], i32 %{{.*}} syncscope("device") monotonic // SPVCHECK: store i32 %[[R]], ptr {{.*}} export void test_bab_uint_orig(uint off, uint v, out uint orig) { @@ -54,7 +54,7 @@ export void test_bab_uint_orig(uint off, uint v, out uint orig) { // CHECK-LABEL: define {{(dso_local |hidden |internal |protected |spir_func )*}}void @{{.*}}test_bab_int64 // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32({{.*}}) // DXCHECK: atomicrmw min ptr %[[PTR]], i64 %{{.*}} syncscope("device") monotonic -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32({{.*}}) +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32({{.*}}) // SPVCHECK: atomicrmw min ptr addrspace(11) %[[PTR]], i64 %{{.*}} syncscope("device") monotonic export void test_bab_int64(uint off, int64_t v) { BAB.InterlockedMin64(off, v); @@ -63,7 +63,7 @@ export void test_bab_int64(uint off, int64_t v) { // CHECK-LABEL: define {{(dso_local |hidden |internal |protected |spir_func )*}}void @{{.*}}test_bab_uint64 // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32({{.*}}) // DXCHECK: atomicrmw umin ptr %[[PTR]], i64 %{{.*}} syncscope("device") monotonic -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32({{.*}}) +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32({{.*}}) // SPVCHECK: atomicrmw umin ptr addrspace(11) %[[PTR]], i64 %{{.*}} syncscope("device") monotonic export void test_bab_uint64(uint off, uint64_t v) { BAB.InterlockedMin64(off, v); @@ -73,7 +73,7 @@ export void test_bab_uint64(uint off, uint64_t v) { // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32({{.*}}) // DXCHECK: %[[R:.*]] = atomicrmw min ptr %[[PTR]], i64 %{{.*}} syncscope("device") monotonic // DXCHECK: store i64 %[[R]], ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32({{.*}}) +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32({{.*}}) // SPVCHECK: %[[R:.*]] = atomicrmw min ptr addrspace(11) %[[PTR]], i64 %{{.*}} syncscope("device") monotonic // SPVCHECK: store i64 %[[R]], ptr {{.*}} export void test_bab_int64_orig(uint off, int64_t v, out int64_t orig) { @@ -84,7 +84,7 @@ export void test_bab_int64_orig(uint off, int64_t v, out int64_t orig) { // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32({{.*}}) // DXCHECK: %[[R:.*]] = atomicrmw umin ptr %[[PTR]], i64 %{{.*}} syncscope("device") monotonic // DXCHECK: store i64 %[[R]], ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32({{.*}}) +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32({{.*}}) // SPVCHECK: %[[R:.*]] = atomicrmw umin ptr addrspace(11) %[[PTR]], i64 %{{.*}} syncscope("device") monotonic // SPVCHECK: store i64 %[[R]], ptr {{.*}} export void test_bab_uint64_orig(uint off, uint64_t v, out uint64_t orig) { diff --git a/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedOr.hlsl b/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedOr.hlsl index b9c6bbb4dcdd5e..591156e9eeba1f 100644 --- a/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedOr.hlsl +++ b/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedOr.hlsl @@ -17,8 +17,8 @@ RWByteAddressBuffer BAB : register(u0); // DXCHECK: %[[HANDLE:.*]] = load target("dx.RawBuffer", i8, 1, 0), ptr {{.*}} // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32(target("dx.RawBuffer", i8, 1, 0) %[[HANDLE]], i32 %{{.*}}) // DXCHECK: atomicrmw or ptr %[[PTR]], i32 %{{.*}} syncscope("device") monotonic -// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1), ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1) %[[HANDLE]], i32 %{{.*}}) +// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1), ptr {{.*}} +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1) %[[HANDLE]], i32 %{{.*}}) // SPVCHECK: atomicrmw or ptr addrspace(11) %[[PTR]], i32 %{{.*}} syncscope("device") monotonic export void test_bab_int_2arg(uint off, int v) { BAB.InterlockedOr(off, v); @@ -29,8 +29,8 @@ export void test_bab_int_2arg(uint off, int v) { // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32(target("dx.RawBuffer", i8, 1, 0) %[[HANDLE]], i32 %{{.*}}) // DXCHECK: %[[R:.*]] = atomicrmw or ptr %[[PTR]], i32 %{{.*}} syncscope("device") monotonic // DXCHECK: store i32 %[[R]], ptr {{.*}} -// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1), ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1) %[[HANDLE]], i32 %{{.*}}) +// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1), ptr {{.*}} +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1) %[[HANDLE]], i32 %{{.*}}) // SPVCHECK: %[[R:.*]] = atomicrmw or ptr addrspace(11) %[[PTR]], i32 %{{.*}} syncscope("device") monotonic // SPVCHECK: store i32 %[[R]], ptr {{.*}} export void test_bab_uint_3arg(uint off, uint v, out uint orig) { @@ -41,8 +41,8 @@ export void test_bab_uint_3arg(uint off, uint v, out uint orig) { // DXCHECK: %[[HANDLE:.*]] = load target("dx.RawBuffer", i8, 1, 0), ptr {{.*}} // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32(target("dx.RawBuffer", i8, 1, 0) %[[HANDLE]], i32 %{{.*}}) // DXCHECK: atomicrmw or ptr %[[PTR]], i64 %{{.*}} syncscope("device") monotonic -// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1), ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1) %[[HANDLE]], i32 %{{.*}}) +// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1), ptr {{.*}} +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1) %[[HANDLE]], i32 %{{.*}}) // SPVCHECK: atomicrmw or ptr addrspace(11) %[[PTR]], i64 %{{.*}} syncscope("device") monotonic export void test_bab_int64_2arg(uint off, int64_t v) { BAB.InterlockedOr64(off, v); @@ -53,8 +53,8 @@ export void test_bab_int64_2arg(uint off, int64_t v) { // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32(target("dx.RawBuffer", i8, 1, 0) %[[HANDLE]], i32 %{{.*}}) // DXCHECK: %[[R:.*]] = atomicrmw or ptr %[[PTR]], i64 %{{.*}} syncscope("device") monotonic // DXCHECK: store i64 %[[R]], ptr {{.*}} -// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1), ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1) %[[HANDLE]], i32 %{{.*}}) +// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1), ptr {{.*}} +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1) %[[HANDLE]], i32 %{{.*}}) // SPVCHECK: %[[R:.*]] = atomicrmw or ptr addrspace(11) %[[PTR]], i64 %{{.*}} syncscope("device") monotonic // SPVCHECK: store i64 %[[R]], ptr {{.*}} export void test_bab_uint64_3arg(uint off, uint64_t v, out uint64_t orig) { diff --git a/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedXor.hlsl b/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedXor.hlsl index 41cd077442d8ee..f9000c933d9ba6 100644 --- a/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedXor.hlsl +++ b/clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedXor.hlsl @@ -17,8 +17,8 @@ RWByteAddressBuffer BAB : register(u0); // DXCHECK: %[[HANDLE:.*]] = load target("dx.RawBuffer", i8, 1, 0), ptr {{.*}} // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32(target("dx.RawBuffer", i8, 1, 0) %[[HANDLE]], i32 %{{.*}}) // DXCHECK: atomicrmw xor ptr %[[PTR]], i32 %{{.*}} syncscope("device") monotonic -// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1), ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1) %[[HANDLE]], i32 %{{.*}}) +// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1), ptr {{.*}} +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1) %[[HANDLE]], i32 %{{.*}}) // SPVCHECK: atomicrmw xor ptr addrspace(11) %[[PTR]], i32 %{{.*}} syncscope("device") monotonic export void test_bab_int_2arg(uint off, int v) { BAB.InterlockedXor(off, v); @@ -29,8 +29,8 @@ export void test_bab_int_2arg(uint off, int v) { // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32(target("dx.RawBuffer", i8, 1, 0) %[[HANDLE]], i32 %{{.*}}) // DXCHECK: %[[R:.*]] = atomicrmw xor ptr %[[PTR]], i32 %{{.*}} syncscope("device") monotonic // DXCHECK: store i32 %[[R]], ptr {{.*}} -// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1), ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1) %[[HANDLE]], i32 %{{.*}}) +// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1), ptr {{.*}} +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1) %[[HANDLE]], i32 %{{.*}}) // SPVCHECK: %[[R:.*]] = atomicrmw xor ptr addrspace(11) %[[PTR]], i32 %{{.*}} syncscope("device") monotonic // SPVCHECK: store i32 %[[R]], ptr {{.*}} export void test_bab_uint_3arg(uint off, uint v, out uint orig) { @@ -41,8 +41,8 @@ export void test_bab_uint_3arg(uint off, uint v, out uint orig) { // DXCHECK: %[[HANDLE:.*]] = load target("dx.RawBuffer", i8, 1, 0), ptr {{.*}} // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32(target("dx.RawBuffer", i8, 1, 0) %[[HANDLE]], i32 %{{.*}}) // DXCHECK: atomicrmw xor ptr %[[PTR]], i64 %{{.*}} syncscope("device") monotonic -// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1), ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1) %[[HANDLE]], i32 %{{.*}}) +// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1), ptr {{.*}} +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1) %[[HANDLE]], i32 %{{.*}}) // SPVCHECK: atomicrmw xor ptr addrspace(11) %[[PTR]], i64 %{{.*}} syncscope("device") monotonic export void test_bab_int64_2arg(uint off, int64_t v) { BAB.InterlockedXor64(off, v); @@ -53,8 +53,8 @@ export void test_bab_int64_2arg(uint off, int64_t v) { // DXCHECK: %[[PTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i8_1_0t.i32(target("dx.RawBuffer", i8, 1, 0) %[[HANDLE]], i32 %{{.*}}) // DXCHECK: %[[R:.*]] = atomicrmw xor ptr %[[PTR]], i64 %{{.*}} syncscope("device") monotonic // DXCHECK: store i64 %[[R]], ptr {{.*}} -// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1), ptr {{.*}} -// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1) %[[HANDLE]], i32 %{{.*}}) +// SPVCHECK: %[[HANDLE:.*]] = load target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1), ptr {{.*}} +// SPVCHECK: %[[PTR:.*]] = call ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.VulkanBuffer_a0i8_12_1_1t.i32(target("spirv.VulkanBuffer", [0 x i8], 12, 1, 1) %[[HANDLE]], i32 %{{.*}}) // SPVCHECK: %[[R:.*]] = atomicrmw xor ptr addrspace(11) %[[PTR]], i64 %{{.*}} syncscope("device") monotonic // SPVCHECK: store i64 %[[R]], ptr {{.*}} export void test_bab_uint64_3arg(uint off, uint64_t v, out uint64_t orig) { _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
