Author: Henrich Lauko Date: 2026-10-08T12:42:20+02:00 New Revision: 423d5de4f16b6366433c17b4745c39f6d8a1e863
URL: https://github.com/llvm/llvm-project/commit/423d5de4f16b6366433c17b4745c39f6d8a1e863 DIFF: https://github.com/llvm/llvm-project/commit/423d5de4f16b6366433c17b4745c39f6d8a1e863.diff LOG: [CIR][CodeGen][NFC] Share hasExtraNeonArgument (#227260) Deduplicates `hasExtraNeonArgument` between CIR and classic CodeGen into `TargetUtils.h`. Assisted-by: Claude Code (Claude Fable 5.1). Added: Modified: clang/include/clang/CodeGenUtils/TargetUtils.h clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp clang/lib/CodeGen/TargetBuiltins/ARM.cpp clang/lib/CodeGenUtils/TargetUtils.cpp Removed: ################################################################################ diff --git a/clang/include/clang/CodeGenUtils/TargetUtils.h b/clang/include/clang/CodeGenUtils/TargetUtils.h index c0227ea4f1c84..a741c77b1e6cb 100644 --- a/clang/include/clang/CodeGenUtils/TargetUtils.h +++ b/clang/include/clang/CodeGenUtils/TargetUtils.h @@ -47,6 +47,12 @@ enum class ArmSMEInlinability : uint8_t { ArmSMEInlinability getArmSMEInlinability(const FunctionDecl *Caller, const FunctionDecl *Callee); +/// Returns whether the Neon builtin \p BuiltinID takes a trailing argument +/// that discriminates the operand type. This should be kept consistent with +/// the logic in Sema. +/// TODO: Make this return false for SISD builtins. +bool hasExtraNeonArgument(unsigned BuiltinID); + } // namespace clang::CodeGenUtils #endif // LLVM_CLANG_CODEGENUTILS_TARGETUTILS_H diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp index e1c6e306002cf..ba7355cffbaf0 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp @@ -16,6 +16,7 @@ #include "clang/Basic/TargetBuiltins.h" #include "clang/CIR/Dialect/IR/CIRTypes.h" #include "clang/CIR/MissingFeatures.h" +#include "clang/CodeGenUtils/TargetUtils.h" // TODO(cir): once all builtins are covered, decide whether we still // need to use LLVM intrinsics or if there's a better approach to follow. Right @@ -90,43 +91,6 @@ static llvm::StringRef getLLVMIntrNameNoPrefix(llvm::Intrinsic::ID intrID) { return llvmIntrName.drop_front(/*strlen("llvm.")=*/5); } -//===----------------------------------------------------------------------===// -// NEON helpers -//===----------------------------------------------------------------------===// -/// Return true if BuiltinID is an overloaded Neon intrinsic with an extra -/// argument that specifies the vector type. The additional argument is meant -/// for Sema checking (see `CheckNeonBuiltinFunctionCall`) and this function -/// should be kept consistent with the logic in Sema. -/// TODO: Make this return false for SISD builtins. -/// TODO(cir): Share this with ARM.cpp -static bool hasExtraNeonArgument(unsigned builtinID) { - // Required by the headers included below, but not in this particular - // function. - [[maybe_unused]] int PtrArgNum = -1; - [[maybe_unused]] bool HasConstPtr = false; - - // The mask encodes the type. We don't care about the actual value. Instead, - // we just check whether its been set. - uint64_t mask = 0; - switch (builtinID) { -#define GET_NEON_OVERLOAD_CHECK -#include "clang/Basic/arm_fp16.inc" -#include "clang/Basic/arm_neon.inc" -#undef GET_NEON_OVERLOAD_CHECK - // Non-neon builtins for controling VFP that take extra argument for - // discriminating the type. - case ARM::BI__builtin_arm_vcvtr_f: - case ARM::BI__builtin_arm_vcvtr_d: - mask = 1; - } - switch (builtinID) { - default: - break; - } - - return mask != 0; -} - static cir::VectorType getFloatNeonType(CIRGenFunction &cgf, NeonTypeFlags intTypeFlags) { int isQuad = intTypeFlags.isQuad(); @@ -2757,7 +2721,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned builtinID, const CallExpr *expr, // Skip extra arguments used to discriminate vector types and that are // intended for Sema checking. - bool hasExtraArg = hasExtraNeonArgument(builtinID); + bool hasExtraArg = CodeGenUtils::hasExtraNeonArgument(builtinID); unsigned numArgs = expr->getNumArgs() - (hasExtraArg ? 1 : 0); for (unsigned i = 0, e = numArgs; i != e; i++) { if (i == 0) { diff --git a/clang/lib/CodeGen/TargetBuiltins/ARM.cpp b/clang/lib/CodeGen/TargetBuiltins/ARM.cpp index 0b716826602a4..fcd765aa64d0e 100644 --- a/clang/lib/CodeGen/TargetBuiltins/ARM.cpp +++ b/clang/lib/CodeGen/TargetBuiltins/ARM.cpp @@ -16,6 +16,7 @@ #include "TargetInfo.h" #include "clang/Basic/AArch64CodeGenUtils.h" #include "clang/Basic/TargetBuiltins.h" +#include "clang/CodeGenUtils/TargetUtils.h" #include "llvm/IR/InlineAsm.h" #include "llvm/IR/IntrinsicsAArch64.h" #include "llvm/IR/IntrinsicsARM.h" @@ -2127,38 +2128,6 @@ static Value *EmitAtomicStoreWithHintBuiltin(CodeGenFunction &CGF, return Store; } -/// Return true if BuiltinID is an overloaded Neon intrinsic with an extra -/// argument that specifies the vector type. The additional argument is meant -/// for Sema checking (see `CheckNeonBuiltinFunctionCall`) and this function -/// should be kept consistent with the logic in Sema. -/// TODO: Make this return false for SISD builtins. -static bool HasExtraNeonArgument(unsigned BuiltinID) { - // Required by the headers included below, but not in this particular - // function. - [[maybe_unused]] int PtrArgNum = -1; - [[maybe_unused]] bool HasConstPtr = false; - - // The mask encodes the type. We don't care about the actual value. Instead, - // we just check whether its been set. - uint64_t mask = 0; - switch (BuiltinID) { -#define GET_NEON_OVERLOAD_CHECK -#include "clang/Basic/arm_fp16.inc" -#include "clang/Basic/arm_neon.inc" -#undef GET_NEON_OVERLOAD_CHECK - // Non-neon builtins for controling VFP that take extra argument for - // discriminating the type. - case ARM::BI__builtin_arm_vcvtr_f: - case ARM::BI__builtin_arm_vcvtr_d: - mask = 1; - } - - if (mask) - return true; - - return false; -} - Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, const CallExpr *E, ReturnValueSlot ReturnValue, @@ -2538,7 +2507,7 @@ Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, Address PtrOp0 = Address::invalid(); Address PtrOp1 = Address::invalid(); SmallVector<Value*, 4> Ops; - bool HasExtraArg = HasExtraNeonArgument(BuiltinID); + bool HasExtraArg = CodeGenUtils::hasExtraNeonArgument(BuiltinID); unsigned NumArgs = E->getNumArgs() - (HasExtraArg ? 1 : 0); for (unsigned i = 0, e = NumArgs; i != e; i++) { if (i == 0) { @@ -5401,7 +5370,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID, // Note the assumption that SISD intrinsics do not contain extra arguments. // TODO: Fold this into a single function call instead of, effectively, two // separate checks. - bool HasExtraArg = !IsSISD && HasExtraNeonArgument(BuiltinID); + bool HasExtraArg = !IsSISD && CodeGenUtils::hasExtraNeonArgument(BuiltinID); unsigned NumArgs = E->getNumArgs() - (HasExtraArg ? 1 : 0); for (unsigned i = 0, e = NumArgs; i != e; i++) { if (i == 0) { diff --git a/clang/lib/CodeGenUtils/TargetUtils.cpp b/clang/lib/CodeGenUtils/TargetUtils.cpp index 215d8a252182c..44645791bfa3c 100644 --- a/clang/lib/CodeGenUtils/TargetUtils.cpp +++ b/clang/lib/CodeGenUtils/TargetUtils.cpp @@ -9,6 +9,7 @@ #include "clang/CodeGenUtils/TargetUtils.h" #include "clang/AST/Attr.h" #include "clang/AST/Decl.h" +#include "clang/Basic/TargetBuiltins.h" namespace clang::CodeGenUtils { @@ -51,4 +52,28 @@ ArmSMEInlinability getArmSMEInlinability(const FunctionDecl *Caller, return Inlinability; } +bool hasExtraNeonArgument(unsigned BuiltinID) { + // Required by the headers included below, but not in this particular + // function. + [[maybe_unused]] int PtrArgNum = -1; + [[maybe_unused]] bool HasConstPtr = false; + + // The mask encodes the type. We don't care about the actual value. Instead, + // we just check whether its been set. + uint64_t mask = 0; + switch (BuiltinID) { +#define GET_NEON_OVERLOAD_CHECK +#include "clang/Basic/arm_fp16.inc" +#include "clang/Basic/arm_neon.inc" +#undef GET_NEON_OVERLOAD_CHECK + // Non-neon builtins for controling VFP that take extra argument for + // discriminating the type. + case ARM::BI__builtin_arm_vcvtr_f: + case ARM::BI__builtin_arm_vcvtr_d: + mask = 1; + } + + return mask != 0; +} + } // namespace clang::CodeGenUtils _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
