================
@@ -55,9 +55,40 @@ void test_atomic_store_hint_array_consexpr_hint(int *ptr,
int value) {
__builtin_arm_atomic_store_with_hint(ptr, value, __ATOMIC_RELAXED,
HintVal{});
}
+template <unsigned Order>
+int test_atomic_fetch_hint_template_order(int *ptr, int val) {
+ return __arm_atomic_fetch_add_with_hint(ptr, val, Order, 3);
+}
+
+template int test_atomic_fetch_hint_template_order<__ATOMIC_ACQUIRE>(int *,
int);
+
+template <unsigned Hint>
+int test_atomic_fetch_hint_template_hint(int *ptr, int val) {
+ return __arm_atomic_fetch_xor_with_hint(ptr, val, __ATOMIC_SEQ_CST, Hint);
+}
+
+template int test_atomic_fetch_hint_template_hint<4>(int *, int);
+
+// CHECK-LABEL: define weak_odr noundef i32
@_Z37test_atomic_fetch_hint_template_orderILj2EEiPii(
+// CHECK-SAME: ptr noundef [[PTR:%.*]], i32 noundef [[VAL:%.*]]) #[[ATTR0]]
comdat {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = atomicrmw add ptr [[PTR]], i32 [[VAL]]
acquire, align 4, !mem.cache_hint [[META8:![0-9]+]]
+// CHECK-NEXT: ret i32 [[TMP0]]
+//
+//
+// CHECK-LABEL: define weak_odr noundef i32
@_Z36test_atomic_fetch_hint_template_hintILj4EEiPii(
+// CHECK-SAME: ptr noundef [[PTR:%.*]], i32 noundef [[VAL:%.*]]) #[[ATTR0]]
comdat {
+// CHECK-NEXT: [[ENTRY:.*:]]
+// CHECK-NEXT: [[TMP0:%.*]] = atomicrmw xor ptr [[PTR]], i32 [[VAL]]
seq_cst, align 4, !mem.cache_hint [[META10:![0-9]+]]
+// CHECK-NEXT: ret i32 [[TMP0]]
+//
----------------
kmclaughlin-arm wrote:
Please can you move these checks into the tests they relate to, similar to the
existing ones above?
https://github.com/llvm/llvm-project/pull/227711
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