https://github.com/srividya-sundaram updated https://github.com/llvm/llvm-project/pull/229248
>From 162e5ec9b56859055a03fa4c6cc4420d4ce6a09d Mon Sep 17 00:00:00 2001 From: srividya sundaram <[email protected]> Date: Fri, 30 Oct 2026 11:36:54 -0700 Subject: [PATCH 1/2] [Clang][SYCL] Infer the SPIR-V target from an Intel offload architecture For SYCL, an Intel GPU or CPU name, an IGCA target or "generic" in --offload-arch now selects spirv64-unknown-unknown on a 64-bit host and spirv32-unknown-unknown otherwise, so --offload-targets is no longer needed. --- clang/docs/ReleaseNotes.md | 4 +++ clang/lib/Driver/Driver.cpp | 17 +++++++--- clang/test/Driver/sycl-intel-gpu-arch.cpp | 38 +++++++++++++++++++++++ 3 files changed, 55 insertions(+), 4 deletions(-) diff --git a/clang/docs/ReleaseNotes.md b/clang/docs/ReleaseNotes.md index 4b9e9228380d1d..ab3762e4473c52 100644 --- a/clang/docs/ReleaseNotes.md +++ b/clang/docs/ReleaseNotes.md @@ -1532,6 +1532,10 @@ The `alpha.cplusplus.UseAfterLifetimeEnd` checker was renamed to `alpha.core.Use #### Improvements +- `-fsycl --offload-arch=<arch>` now selects the SPIR-V target without + `--offload-targets` when `<arch>` is an Intel GPU (e.g. `xe-pvc`), an IGCA + target (e.g. `igca_20ca`) or `generic`. + ### Clang IR Improvements - Clang builds now build ClangIR support by default. Clang IR is expected to work with most Linux/X86-64 workloads. Normal builds are unchanged, however those who wish to test out the experimental `-fclangir` flag can now do so with a Clang build. diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp index ae6aae4d0d6991..90f6b4fb25a4c3 100644 --- a/clang/lib/Driver/Driver.cpp +++ b/clang/lib/Driver/Driver.cpp @@ -985,6 +985,13 @@ getSystemOffloadArchs(Compilation &C, Action::OffloadKind Kind) { using TripleSet = std::multiset<llvm::Triple>; +/// \return the SPIR-V target for SYCL on \p HostTriple: spirv64 on a 64-bit +/// host, spirv32 otherwise. +static llvm::Triple getSYCLDefaultTriple(const llvm::Triple &HostTriple) { + return llvm::Triple(HostTriple.isArch64Bit() ? llvm::Triple::spirv64 + : llvm::Triple::spirv32); +} + // Attempts to infer the correct offloading toolchain triple by looking at the // requested offloading kind and architectures. static TripleSet inferOffloadToolchains(Compilation &C, @@ -1045,6 +1052,11 @@ static TripleSet inferOffloadToolchains(Compilation &C, llvm::Triple Triple = OffloadArchToTriple(C.getDefaultToolChain().getTriple(), ID); + // For SYCL, compile an Intel GPU or CPU, or "generic", for SPIR-V: + // spirv64-unknown-unknown on a 64-bit host, spirv32-unknown-unknown + // otherwise. + if (Kind == Action::OFK_SYCL && (ID.isIntel() || ID.isGeneric())) + Triple = getSYCLDefaultTriple(C.getDefaultToolChain().getTriple()); if (UsesLLVMOffloading) Triple.setEnvironment(llvm::Triple::LLVM); @@ -1077,10 +1089,7 @@ static TripleSet inferOffloadToolchains(Compilation &C, Triples.insert(llvm::Triple(Arch, llvm::Triple::NoSubArch, llvm::Triple::NVIDIA, llvm::Triple::CUDA)); } else if (Archs.empty() && Kind == Action::OFK_SYCL) - Triples.insert( - llvm::Triple(C.getDefaultToolChain().getTriple().isArch64Bit() - ? llvm::Triple::spirv64 - : llvm::Triple::spirv32)); + Triples.insert(getSYCLDefaultTriple(C.getDefaultToolChain().getTriple())); // We need to dispatch these to the appropriate toolchain now. C.getArgs().eraseArg(options::OPT_offload_arch_EQ); diff --git a/clang/test/Driver/sycl-intel-gpu-arch.cpp b/clang/test/Driver/sycl-intel-gpu-arch.cpp index 555391b379ac0e..117488939760c8 100644 --- a/clang/test/Driver/sycl-intel-gpu-arch.cpp +++ b/clang/test/Driver/sycl-intel-gpu-arch.cpp @@ -16,3 +16,41 @@ // CHK-AS-GIVEN-DAG: offload, "device-sycl (spirv64-unknown-unknown:xe-mtl-u)" // CHK-AS-GIVEN-DAG: offload, "device-sycl (spirv64-unknown-unknown:xe-arl-u)" // CHK-AS-GIVEN-DAG: offload, "device-sycl (spirv64-unknown-unknown:xe_12.70.0)" + +/// Without --offload-targets, an Intel device, an IGCA target or "generic" picks +/// SPIR-V of the host's width. +// RUN: %clang -ccc-print-phases --target=x86_64-unknown-linux-gnu -fsycl \ +// RUN: --offload-arch=xe-pvc --offload-arch=xe-bmg-g21 --offload-arch=graniterapids \ +// RUN: --offload-arch=generic --offload-arch=igca_20ca -c %s 2>&1 \ +// RUN: | FileCheck -check-prefixes=CHK-NO-TARGETS %s +// CHK-NO-TARGETS-DAG: offload, "device-sycl (spirv64-unknown-unknown:generic)" +// CHK-NO-TARGETS-DAG: offload, "device-sycl (spirv64-unknown-unknown:graniterapids)" +// CHK-NO-TARGETS-DAG: offload, "device-sycl (spirv64-unknown-unknown:igca_20ca)" +// CHK-NO-TARGETS-DAG: offload, "device-sycl (spirv64-unknown-unknown:xe-bmg-g21)" +// CHK-NO-TARGETS-DAG: offload, "device-sycl (spirv64-unknown-unknown:xe-pvc)" +// RUN: %clang -ccc-print-phases --target=i386-unknown-linux-gnu -fsycl \ +// RUN: --offload-arch=xe-pvc --offload-arch=igca_20ca -c %s 2>&1 \ +// RUN: | FileCheck -check-prefixes=CHK-NO-TARGETS-32 %s +// CHK-NO-TARGETS-32-DAG: offload, "device-sycl (spirv32-unknown-unknown:xe-pvc)" +// CHK-NO-TARGETS-32-DAG: offload, "device-sycl (spirv32-unknown-unknown:igca_20ca)" +// RUN: %clang -ccc-print-phases --target=x86_64-unknown-linux-gnu -fsycl \ +// RUN: --offload-arch=xe-mtl-u --offload-arch=xe-arl-u --offload-arch=xe-pvc \ +// RUN: --no-offload-arch=xe-pvc -c %s 2>&1 \ +// RUN: | FileCheck -check-prefixes=CHK-NO-TARGETS-AS-GIVEN %s +// CHK-NO-TARGETS-AS-GIVEN-NOT: xe-pvc +// CHK-NO-TARGETS-AS-GIVEN-DAG: offload, "device-sycl (spirv64-unknown-unknown:xe-mtl-u)" +// CHK-NO-TARGETS-AS-GIVEN-DAG: offload, "device-sycl (spirv64-unknown-unknown:xe-arl-u)" +// CHK-NO-TARGETS-AS-GIVEN-NOT: xe-pvc + +/// As for CUDA and HIP, -foffload-via-llvm gives the inferred target the LLVM +/// environment. +// RUN: %clang -### --target=x86_64-unknown-linux-gnu -fsycl -foffload-via-llvm \ +// RUN: --offload-arch=xe-pvc -c %s 2>&1 \ +// RUN: | FileCheck -check-prefixes=CHK-VIA-LLVM %s +// CHK-VIA-LLVM: "-cc1" "-triple" "spirv64-unknown-unknown-llvm" + +/// Only SYCL infers a target from an Intel name. +// RUN: not %clang -### --target=x86_64-unknown-linux-gnu -x cuda -nocudainc \ +// RUN: -nocudalib --offload-arch=xe-pvc -c %s 2>&1 \ +// RUN: | FileCheck -check-prefixes=CHK-CUDA %s +// CHK-CUDA: error: unsupported CUDA gpu architecture: xe-pvc >From 614b4a5d158ee73a2c736fc5e332d09056da5a98 Mon Sep 17 00:00:00 2001 From: srividya sundaram <[email protected]> Date: Fri, 30 Oct 2026 11:45:53 -0700 Subject: [PATCH 2/2] [Clang][SYCL] Skip NVIDIA and AMD GPUs in --offload-arch=native for SYCL SYCL only supports Intel devices, so --offload-arch=native no longer creates SYCL device jobs for the NVIDIA and AMD GPUs that offload-arch reports. --- clang/docs/ReleaseNotes.md | 3 ++- clang/lib/Driver/Driver.cpp | 12 +++++++++--- .../offload_arch_sm_70_gfx906_xe_pvc | 5 +++++ clang/test/Driver/sycl-system-arch.cpp | 16 ++++++++++++++++ 4 files changed, 32 insertions(+), 4 deletions(-) create mode 100755 clang/test/Driver/Inputs/offload-arch/offload_arch_sm_70_gfx906_xe_pvc create mode 100644 clang/test/Driver/sycl-system-arch.cpp diff --git a/clang/docs/ReleaseNotes.md b/clang/docs/ReleaseNotes.md index ab3762e4473c52..42eb1252597fe7 100644 --- a/clang/docs/ReleaseNotes.md +++ b/clang/docs/ReleaseNotes.md @@ -1534,7 +1534,8 @@ The `alpha.cplusplus.UseAfterLifetimeEnd` checker was renamed to `alpha.core.Use - `-fsycl --offload-arch=<arch>` now selects the SPIR-V target without `--offload-targets` when `<arch>` is an Intel GPU (e.g. `xe-pvc`), an IGCA - target (e.g. `igca_20ca`) or `generic`. + target (e.g. `igca_20ca`) or `generic`. `--offload-arch=native` skips NVIDIA + and AMD GPUs, which SYCL does not support. ### Clang IR Improvements diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp index 90f6b4fb25a4c3..0d8add13291084 100644 --- a/clang/lib/Driver/Driver.cpp +++ b/clang/lib/Driver/Driver.cpp @@ -974,9 +974,15 @@ getSystemOffloadArchs(Compilation &C, Action::OffloadKind Kind) { return GPUArchs; } - for (StringRef Arch : llvm::split((*StdoutOrErr)->getBuffer(), "\n")) - if (!Arch.empty()) - GPUArchs.push_back(Arch.str()); + // SYCL only supports Intel devices, so skip NVIDIA and AMD GPUs. + for (StringRef Arch : llvm::split((*StdoutOrErr)->getBuffer(), "\n")) { + OffloadArch ID = StringToOffloadArch(Arch); + if (Arch.empty() || + (Kind == Action::OFK_SYCL && + (ID.isNVPTX() || ID.isAMDGPU() || ID.isAMDGCNSPIRV()))) + continue; + GPUArchs.push_back(Arch.str()); + } } else { C.getDriver().Diag(diag::err_drv_command_failure) << "offload-arch"; } diff --git a/clang/test/Driver/Inputs/offload-arch/offload_arch_sm_70_gfx906_xe_pvc b/clang/test/Driver/Inputs/offload-arch/offload_arch_sm_70_gfx906_xe_pvc new file mode 100755 index 00000000000000..d6f8f4872fca12 --- /dev/null +++ b/clang/test/Driver/Inputs/offload-arch/offload_arch_sm_70_gfx906_xe_pvc @@ -0,0 +1,5 @@ +#!/bin/sh +echo "sm_70" +echo "gfx906" +echo "xe-pvc" +exit 0 diff --git a/clang/test/Driver/sycl-system-arch.cpp b/clang/test/Driver/sycl-system-arch.cpp new file mode 100644 index 00000000000000..b5b7a288a07fb0 --- /dev/null +++ b/clang/test/Driver/sycl-system-arch.cpp @@ -0,0 +1,16 @@ +/// Needs chmod +// UNSUPPORTED: system-windows +// XFAIL: target={{.*}}-zos{{.*}} + +// RUN: mkdir -p %t +// RUN: cp %S/Inputs/offload-arch/offload_arch_sm_70_gfx906_xe_pvc %t/ +// RUN: chmod +x %t/offload_arch_sm_70_gfx906_xe_pvc + +/// SYCL only supports Intel devices, so --offload-arch=native skips NVIDIA and +/// AMD GPUs. +// RUN: %clang -ccc-print-phases --target=x86_64-unknown-linux-gnu -fsycl \ +// RUN: --offload-arch=native --offload-arch-tool=%t/offload_arch_sm_70_gfx906_xe_pvc \ +// RUN: -c %s 2>&1 | FileCheck %s +// CHECK-NOT: {{sm_70|gfx906}} +// CHECK: offload, "device-sycl (spirv64-unknown-unknown:xe-pvc)" +// CHECK-NOT: {{sm_70|gfx906}} _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
