> -----Original Message-----
> From: Ingraham, Andrew [mailto:[EMAIL PROTECTED]
> Sent: dinsdag 25 februari 2003 16:21
> To: Multiple recipients of list CHIPDIR-L
> Subject: RE: IRQ sharing on new m/bs?
> 
> 
> > As for sharing interrupts on an ISA bus:
> > As far as i know, the interrupts on an ISA bus are edge-triggered. 
>  
> You are very right.  ISA bus interrupts aren't meant to be shared, and
> they don't work when they end up that way.
> 
> Since the original note listed a bunch of PCI slots, and no apparent
> ISA bus, and since the title suggests new motherboards (which usually
> don't have ISA slots anymore), I was talking only about non-ISA bus
> situations.  Sorry I didn't make that clear.

Having obviously missed some of the preceeding discussion, i saw the part about
'Dos experience' and thought you where talking about a dos-time computer with
ISA bus. Apologies for the long and misplaced story.

> 
> Regards,
> Andy
> 
> 
> -- 
> Author: Ingraham, Andrew
>   INET: [EMAIL PROTECTED]

This does however lead me to ask another question: Why are there more than one
shared interrupt on a PCI bus at all. I can understand that one interrupt line per 
CPU makes sense on a multi-processor system (you can signal an interrupt to each 
of the CPU's), but on a single-CPU system: why not share *all* PCI interrupts 
to one interrupt line? Multiple interrupts on a PCI bus can provide prioritized 
interrupts. But most of the time, i have no a-priori idea what interrupt a PCI 
card will end up using anyway. The PC BIOS assigns 'some interrupt' to my PCI card,
and never asks any questions about what my ideas in that respect are. This indicates 
that the priority can hardly be the reason.

A device driver will normally do little else than tell the device that it has 
'seen' the interrupt, and leave all 'real' work to another mechanism (DPC on 
WinNT, driver thread on Linux). This means that the real work will start only 
after the complete poll list for all drivers that have registered for the interrupt 
has been processed. The only difference i can see is the length of the poll list.
With more interrupts, the poll list is shorter (assuming the devices are evenly 
distributed over the interrupts..). Is that the mean reason, or did i miss something
(again..)?

bye,

Peter Faasse


-- 
Author: Faasse, P.R.
  INET: [EMAIL PROTECTED]

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