> On Jan 10, 2017, at 03:21, Miroslav Lichvar <mlich...@redhat.com> wrote:
> On Mon, Jan 09, 2017 at 09:02:14AM -0800, Denny Page wrote:
>> The program up if you want to have a look. I am still working on the 
>> guidelines for use.
>>  https://github.com/dennypage/ethtscal
>> My testing has been principally focused on the i354. I will also be testing 
>> the i211, which I believe should be very close to the i210, but I need to 
>> finish the i354 first. Unfortunately it’s a long iterative process to 
>> balance the tx and rx values. 
> This is very interesting and I'm curious to see how you balance the
> tx and rx values. If I know the expected delay is x and I measure
> delay y, how do I distribute the (x-y) difference to the tx and rx
> comp values? Is there some symmetry in the RX and TX timestamping
> error?

Well, that’s the bad part—without a scope or other interval hardware device the 
only way to determine the values is by trial and error. The short version is 
that you establish a baseline for different speeds using loopback cables, and 
then work the values with different speeds through a switch until all the 
values fit. A long and painful process. And it doesn’t help that switches 
change latency between 10/100Mb and 1Gb.

The tx and rx compensation values are asymmetric on the Intel chips I’ve 
tested. Between 1:2.1 and 1:2.6 depending upon speed.


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