> On Jan 18, 2017, at 09:56, Miroslav Lichvar <mlich...@redhat.com> wrote:
> 
> Avoiding the asymmetry on the PCIe bus is what I'm most interested in.

I’m not sure how much asymmetry on the PICe bus there is. Or how it affects 
PTP_SYS_OFFSET.

PCIe asymmetry/delay  won't affect the actual timestamps. To my knowledge, the 
only asymmetry there is the PHY connection.

Denny

Reply via email to