Hi, When there is a refclock with a lock directive, for example a PPS locked to SOCK, naturally the SOCK must provide time close enough to avoid ambiguity.
This threshold seems to be hardcoded at: https://git.tuxfamily.org/chrony/chrony.git/tree/refclock.c#n538 It is a maximum of 0.2s, but can be significantly less when dispersion is high. There are GPS chips with much higher offset variance, which leads to pulses being ignored. Currently this value is not configurable nor part of the documentation. Is the way to go to patch this for the specific chip? Thanks, Nuno -- To unsubscribe email chrony-users-requ...@chrony.tuxfamily.org with "unsubscribe" in the subject. For help email chrony-users-requ...@chrony.tuxfamily.org with "help" in the subject. Trouble? Email listmas...@chrony.tuxfamily.org.