On Thu, Jun 13, 2024 at 08:22:03PM +0000, Sviatoslav Feshchenko wrote: > - Is the 1PPS signal buffered if "low_latency" is NOT set?
I don't think it is. It should trigger the interrupt immediately. > - Is it necessary to configure the serial port for "low_latency" if 1PPS > signal is available on the DCD pin, when the goal is to maximize the accuracy > of the 1PPS signal? > For PPS it shouldn't matter. Easy to verify. Plot the raw offset from the refclocks log, switch the low_latency flag, and see if there are any jumps or changes in stability. -- Miroslav Lichvar -- To unsubscribe email chrony-users-requ...@chrony.tuxfamily.org with "unsubscribe" in the subject. For help email chrony-users-requ...@chrony.tuxfamily.org with "help" in the subject. Trouble? Email listmas...@chrony.tuxfamily.org.
